[llvm] [X86][NFC] Simplify definition of TMM registers (PR #226779)
Ben Shi via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 27 04:52:36 PDT 2026
https://github.com/benshi001 created https://github.com/llvm/llvm-project/pull/226779
None
>From aa81410fa11fe836be5492848c70ff239e4c0471 Mon Sep 17 00:00:00 2001
From: Ben Shi <bennshi at tencent.com>
Date: Sun, 27 Sep 2026 19:49:55 +0800
Subject: [PATCH] [X86][NFC] Simplify definition of TMM registers
---
llvm/lib/Target/X86/X86RegisterInfo.td | 17 ++++++-----------
1 file changed, 6 insertions(+), 11 deletions(-)
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.td b/llvm/lib/Target/X86/X86RegisterInfo.td
index 63ad4b2bae5ac..397aeb4747290 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.td
+++ b/llvm/lib/Target/X86/X86RegisterInfo.td
@@ -419,17 +419,12 @@ def KPAIRS : RegisterTuples<[sub_mask_0, sub_mask_1],
// TMM registers, used by AMX instructions.
let PositionOrder = 3 in {
-// Tile config registers.
-def TMMCFG: X86Reg<"tmmcfg", 0>;
-// Tile "registers".
-def TMM0: X86Reg<"tmm0", 0>;
-def TMM1: X86Reg<"tmm1", 1>;
-def TMM2: X86Reg<"tmm2", 2>;
-def TMM3: X86Reg<"tmm3", 3>;
-def TMM4: X86Reg<"tmm4", 4>;
-def TMM5: X86Reg<"tmm5", 5>;
-def TMM6: X86Reg<"tmm6", 6>;
-def TMM7: X86Reg<"tmm7", 7>;
+ // Tile config registers.
+ def TMMCFG: X86Reg<"tmmcfg", 0>;
+ // Tile "registers".
+ foreach Index = 0-7 in {
+ def TMM#Index : X86Reg<"tmm"#Index, Index>;
+ }
}
// Floating point stack registers. These don't map one-to-one to the FP
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