[llvm] [AMDGPU][MC] Fixed an issue where VOPD instruction doesn't accept a relocatable symbol (PR #226755)

[via llvm-commits]

llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: Shilei Tian (shiltian)

<details>
<summary>Changes</summary>

Fixes LCOMPILER-2797.


---
Full diff: https://github.com/llvm/llvm-project/pull/226755.diff


2 Files Affected:

- (modified) llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp (+8-2) 
- (added) llvm/test/MC/AMDGPU/reloc-operands-vopd.s (+21) 


``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 812acc8f8be85..92eaeb8c37627 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -3465,6 +3465,7 @@ bool AMDGPUAsmParser::isRegOrOperandModifier(const AsmToken &Token,
 //   -|...|
 //   -abs(...)
 //   name:...
+// "name ::" is the VOPD separator, not an opcode modifier.
 //
 bool AMDGPUAsmParser::isModifier() {
 
@@ -3472,10 +3473,15 @@ bool AMDGPUAsmParser::isModifier() {
   AsmToken NextToken[2];
   peekTokens(NextToken);
 
+  // "name:value" is an opcode modifier. The second colon of "::" is the
+  // VOPD separator, so a symbol written immediately before "::" is a literal.
+  bool IsOpcodeModifier = isOpcodeModifierWithVal(Tok, NextToken[0]) &&
+                          !NextToken[1].is(AsmToken::Colon);
+
   return isOperandModifier(Tok, NextToken[0]) ||
          (Tok.is(AsmToken::Minus) &&
           isRegOrOperandModifier(NextToken[0], NextToken[1])) ||
-         isOpcodeModifierWithVal(Tok, NextToken[0]);
+         IsOpcodeModifier;
 }
 
 // Check if the current token is an SP3 'neg' modifier.
@@ -10235,7 +10241,7 @@ void AMDGPUAsmParser::cvtVOPD(MCInst &Inst, const OperandVector &Operands) {
       Op.addRegOperands(Inst, 1);
       return;
     }
-    if (Op.isImm()) {
+    if (Op.isImm() || Op.isExpr()) {
       Op.addImmOperands(Inst, 1);
       return;
     }
diff --git a/llvm/test/MC/AMDGPU/reloc-operands-vopd.s b/llvm/test/MC/AMDGPU/reloc-operands-vopd.s
new file mode 100644
index 0000000000000..600200c799450
--- /dev/null
+++ b/llvm/test/MC/AMDGPU/reloc-operands-vopd.s
@@ -0,0 +1,21 @@
+// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 6
+// RUN: llvm-mc -triple=amdgpu11.00 -mattr=+wavefrontsize32 -show-encoding < %s | FileCheck --check-prefix=GCN %s
+// RUN: llvm-mc -triple=amdgpu12.01 -mattr=+wavefrontsize32 -show-encoding < %s | FileCheck --check-prefix=GCN %s
+
+// A relocatable symbol is a literal operand. It can be src0 of either VOPD component.
+
+v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, g0 at abs32@lo
+// GCN: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, g0 at abs32@lo ; encoding: [0x80,0x00,0x10,0xca,0xff,0x00,0x00,0x00,A,A,A,A]
+// GCN-NEXT: ;   fixup A - offset: 8, value: g0 at abs32@lo, kind: FK_Data_4
+
+v_dual_mov_b32 v0, g0 at abs32@lo :: v_dual_mov_b32 v1, 0
+// GCN: v_dual_mov_b32 v0, g0 at abs32@lo :: v_dual_mov_b32 v1, 0 ; encoding: [0xff,0x00,0x10,0xca,0x80,0x00,0x00,0x00,A,A,A,A]
+// GCN-NEXT: ;   fixup A - offset: 8, value: g0 at abs32@lo, kind: FK_Data_4
+
+v_dual_add_f32 v0, g0 at abs32@lo, v1 :: v_dual_mov_b32 v3, 0
+// GCN: v_dual_add_f32 v0, g0 at abs32@lo, v1 :: v_dual_mov_b32 v3, 0 ; encoding: [0xff,0x02,0x10,0xc9,0x80,0x00,0x02,0x00,A,A,A,A]
+// GCN-NEXT: ;   fixup A - offset: 8, value: g0 at abs32@lo, kind: FK_Data_4
+
+v_dual_mov_b32 v0, 0 :: v_dual_add_f32 v1, g0 at abs32@hi, v2
+// GCN: v_dual_mov_b32 v0, 0 :: v_dual_add_f32 v1, g0 at abs32@hi, v2 ; encoding: [0x80,0x00,0x08,0xca,0xff,0x04,0x00,0x00,A,A,A,A]
+// GCN-NEXT: ;   fixup A - offset: 8, value: g0 at abs32@hi, kind: FK_Data_4

``````````

</details>


https://github.com/llvm/llvm-project/pull/226755