[llvm] [AVX-512] make vpternlogq more aggressive for longer chains of bitmanipulations (PR #189971)

[Julian Pokrovsky via llvm-commits]

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@@ -4696,8 +4697,17 @@ bool X86DAGToDAGISel::matchVPTERNLOG(SDNode *Root, SDNode *ParentA,
                                      SDNode *ParentB, SDNode *ParentC,
                                      SDValue A, SDValue B, SDValue C,
                                      uint8_t Imm) {
-  assert(A.isOperandOf(ParentA) && B.isOperandOf(ParentB) &&
-         C.isOperandOf(ParentC) && "Incorrect parent node");
+  // Unused operand slots may be padded with an IMPLICIT_DEF (e.g. when a tree
+  // folds to a VPTERNLOG with fewer than three distinct inputs); padding has no
+  // parent node.
+  auto IsPad = [](SDValue V) {
+    return V.isMachineOpcode() &&
+           V.getMachineOpcode() == TargetOpcode::IMPLICIT_DEF;
+  };
+  assert((IsPad(A) || A.isOperandOf(ParentA)) &&
+         (IsPad(B) || B.isOperandOf(ParentB)) &&
+         (IsPad(C) || C.isOperandOf(ParentC)) && "Incorrect parent node");
+  (void)IsPad;
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raventid wrote:

totally makes sense, fixed in https://github.com/llvm/llvm-project/pull/189971/changes/fa198307d4aefc4e279dd4a7f9240d8972ce0b89

https://github.com/llvm/llvm-project/pull/189971