[llvm] Mips: Properly account for target-abi in subtarget construction (PR #226721)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Sat Sep 26 10:59:03 PDT 2026


https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/226721

Store the used ABI from the target-abi module flag and add it to the
subtarget map key, so the module flag is properly respected.

Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>

>From 06ee0568b22eaf2c1104f341d334c1f21d48bb27 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Fri, 25 Sep 2026 16:09:46 +0200
Subject: [PATCH] Mips: Properly account for target-abi in subtarget
 construction

Store the used ABI from the target-abi module flag and add it to the
subtarget map key, so the module flag is properly respected.

Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
---
 llvm/lib/Target/Mips/MipsAsmPrinter.cpp       |  4 +-
 llvm/lib/Target/Mips/MipsSubtarget.cpp        |  5 ++-
 llvm/lib/Target/Mips/MipsSubtarget.h          |  9 ++--
 llvm/lib/Target/Mips/MipsTargetMachine.cpp    | 10 +++--
 llvm/lib/Target/Mips/MipsTargetMachine.h      |  3 --
 .../CodeGen/Mips/target-abi-module-flag.ll    | 42 +++++++++++++++++++
 6 files changed, 59 insertions(+), 14 deletions(-)
 create mode 100644 llvm/test/CodeGen/Mips/target-abi-module-flag.ll

diff --git a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
index 6e9999077b3c7..4db0409e4837e 100644
--- a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
+++ b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
@@ -746,8 +746,8 @@ void MipsAsmPrinter::emitStartOfAsmFile(Module &M) {
     // for a feature string that doesn't match the default one.
     StringRef CPU = MIPS_MC::selectMipsCPU(TT, TM.getTargetCPU());
     const MipsTargetMachine &MTM = static_cast<const MipsTargetMachine &>(TM);
-    const MipsSubtarget STI(TT, CPU, StringRef(strFS), MTM.isLittleEndian(),
-                            MTM, std::nullopt);
+    const MipsSubtarget STI(TT, CPU, StringRef(strFS), MTM.getTargetABIName(M),
+                            MTM.isLittleEndian(), MTM, std::nullopt);
 
     bool IsABICalls = STI.isABICalls();
     const MipsABIInfo &ABI = STI.getABI();
diff --git a/llvm/lib/Target/Mips/MipsSubtarget.cpp b/llvm/lib/Target/Mips/MipsSubtarget.cpp
index ba0182f7f2cd8..0d21f5d7982e8 100644
--- a/llvm/lib/Target/Mips/MipsSubtarget.cpp
+++ b/llvm/lib/Target/Mips/MipsSubtarget.cpp
@@ -65,7 +65,8 @@ bool MipsSubtarget::GINVWarningPrinted = false;
 void MipsSubtarget::anchor() {}
 
 MipsSubtarget::MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
-                             bool little, const MipsTargetMachine &TM,
+                             StringRef ABIName, bool little,
+                             const MipsTargetMachine &TM,
                              MaybeAlign StackAlignOverride)
     : MipsGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS),
       MipsArchVersion(MipsDefault), IsLittle(little), IsSoftFloat(false),
@@ -81,6 +82,7 @@ MipsSubtarget::MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
       HasGINV(false), UseIndirectJumpsHazard(false), StrictAlign(false),
       UseCompactBranches(MipsCompactBranchPolicy != CB_Never),
       StackAlignOverride(StackAlignOverride), TM(TM),
+      ABI(MipsABIInfo::computeTargetABI(TT, ABIName)),
       InstrInfo(
           MipsInstrInfo::create(initializeSubtargetDependencies(CPU, FS, TM))),
       FrameLowering(MipsFrameLowering::create(*this)),
@@ -276,7 +278,6 @@ Reloc::Model MipsSubtarget::getRelocationModel() const {
 bool MipsSubtarget::isABI_N64() const { return getABI().IsN64(); }
 bool MipsSubtarget::isABI_N32() const { return getABI().IsN32(); }
 bool MipsSubtarget::isABI_O32() const { return getABI().IsO32(); }
-const MipsABIInfo &MipsSubtarget::getABI() const { return TM.getABI(); }
 
 const SelectionDAGTargetInfo *MipsSubtarget::getSelectionDAGInfo() const {
   return TSInfo.get();
diff --git a/llvm/lib/Target/Mips/MipsSubtarget.h b/llvm/lib/Target/Mips/MipsSubtarget.h
index 1211fff013ae8..f431299784052 100644
--- a/llvm/lib/Target/Mips/MipsSubtarget.h
+++ b/llvm/lib/Target/Mips/MipsSubtarget.h
@@ -221,6 +221,8 @@ class MipsSubtarget : public MipsGenSubtargetInfo {
 
   const MipsTargetMachine &TM;
 
+  MipsABIInfo ABI;
+
   std::unique_ptr<const SelectionDAGTargetInfo> TSInfo;
   std::unique_ptr<const MipsInstrInfo> InstrInfo;
   std::unique_ptr<const MipsFrameLowering> FrameLowering;
@@ -236,7 +238,7 @@ class MipsSubtarget : public MipsGenSubtargetInfo {
   bool isABI_N64() const;
   bool isABI_N32() const;
   bool isABI_O32() const;
-  const MipsABIInfo &getABI() const;
+  const MipsABIInfo &getABI() const { return ABI; }
   bool isABI_FPXX() const { return isABI_O32() && IsFPXX; }
 
   bool isGPRReservedByUser(unsigned GPR) const {
@@ -246,8 +248,9 @@ class MipsSubtarget : public MipsGenSubtargetInfo {
 
   /// This constructor initializes the data members to match that
   /// of the specified triple.
-  MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS, bool little,
-                const MipsTargetMachine &TM, MaybeAlign StackAlignOverride);
+  MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
+                StringRef ABIName, bool little, const MipsTargetMachine &TM,
+                MaybeAlign StackAlignOverride);
 
   ~MipsSubtarget() override;
 
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
index 0aa14d6171d5e..041a7be78d4ad 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
@@ -107,8 +107,8 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, const Triple &TT,
                                getEffectiveRelocModel(JIT, RM),
                                getEffectiveCodeModel(CM, CodeModel::Small), OL),
       isLittle(isLittle),
-      ABI(MipsABIInfo::computeTargetABI(TT, Options.MCOptions.getABIName())),
-      DefaultSubtarget(TT, CPU, FS, isLittle, *this, std::nullopt),
+      DefaultSubtarget(TT, CPU, FS, Options.MCOptions.getABIName(), isLittle,
+                       *this, std::nullopt),
       TLOF(createTLOF(TT, DefaultSubtarget.useSmallSection())) {
   initAsmInfo();
 
@@ -169,10 +169,12 @@ MipsTargetMachine::getSubtargetImpl(const Function &F) const {
   if (softFloat)
     FS += FS.empty() ? "+soft-float" : ",+soft-float";
 
-  auto &I = SubtargetMap[CPU + FS];
+  StringRef ABIName = getTargetABIName(*F.getParent());
+
+  auto &I = SubtargetMap[CPU + FS + ABIName.str()];
   if (!I) {
     I = std::make_unique<MipsSubtarget>(
-        TargetTriple, CPU, FS, isLittle, *this,
+        TargetTriple, CPU, FS, ABIName, isLittle, *this,
         MaybeAlign(F.getParent()->getOverrideStackAlignment()));
   }
   return I.get();
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.h b/llvm/lib/Target/Mips/MipsTargetMachine.h
index a7292a7f6787c..4923ad62f33ac 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.h
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.h
@@ -26,8 +26,6 @@ namespace llvm {
 
 class MipsTargetMachine : public CodeGenTargetMachineImpl {
   bool isLittle;
-  // Selected ABI
-  MipsABIInfo ABI;
   // Used to initialize module-wide object-file policy.
   MipsSubtarget DefaultSubtarget;
   std::unique_ptr<TargetLoweringObjectFile> TLOF;
@@ -66,7 +64,6 @@ class MipsTargetMachine : public CodeGenTargetMachineImpl {
   }
 
   bool isLittleEndian() const { return isLittle; }
-  const MipsABIInfo &getABI() const { return ABI; }
 };
 
 /// Mips32/64 big endian target machine.
diff --git a/llvm/test/CodeGen/Mips/target-abi-module-flag.ll b/llvm/test/CodeGen/Mips/target-abi-module-flag.ll
new file mode 100644
index 0000000000000..299a3aa45cb1f
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/target-abi-module-flag.ll
@@ -0,0 +1,42 @@
+; The "target-abi" module flag selects the ABI used for codegen. N32
+; adjusts the stack with addiu while N64 uses daddiu, and the two ABIs
+; are recorded in different .mdebug sections.
+
+; RUN: split-file %s %t
+
+; mips64 defaults to N64; an n32 module flag overrides that.
+; RUN: llc -mtriple=mips64 -mcpu=mips64r2 < %t/n32.ll | FileCheck --check-prefix=N32 %s
+; RUN: llc -mtriple=mips64 -mcpu=mips64r2 < %t/default.ll | FileCheck --check-prefix=N64 %s
+
+; A matching -target-abi option is accepted.
+; RUN: llc -mtriple=mips64 -mcpu=mips64r2 -target-abi=n32 < %t/n32.ll | FileCheck --check-prefix=N32 %s
+
+; A conflicting -target-abi option is rejected.
+; RUN: not llc -mtriple=mips64 -mcpu=mips64r2 -target-abi=n64 < %t/n32.ll 2>&1 | FileCheck --check-prefix=CONFLICT %s
+
+; N32: .section .mdebug.abiN32
+; N32: {{[[:space:]]}}addiu $sp, $sp, -16
+
+; N64: .section .mdebug.abi64
+; N64: {{[[:space:]]}}daddiu $sp, $sp, -16
+
+; CONFLICT: -target-abi option != target-abi module flag
+
+;--- n32.ll
+declare void @g(i32)
+
+define void @f(i32 %x) {
+  call void @g(i32 %x)
+  ret void
+}
+
+!llvm.module.flags = !{!0}
+!0 = !{i32 1, !"target-abi", !"n32"}
+
+;--- default.ll
+declare void @g(i32)
+
+define void @f(i32 %x) {
+  call void @g(i32 %x)
+  ret void
+}



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