[llvm] Mips: Route ABI queries through the subtarget (PR #226667)
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llvm-commits at lists.llvm.org
Sat Sep 26 02:21:45 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-mips
Author: Matt Arsenault (arsenm)
<details>
<summary>Changes</summary>
MipsSubtarget::getABI() already forwards to the target machine, so every
direct MipsTargetMachine::getABI() reader can use the subtarget instead.
Co-Authored-By: Claude Opus 5 <noreply@<!-- -->anthropic.com>
---
Full diff: https://github.com/llvm/llvm-project/pull/226667.diff
10 Files Affected:
- (modified) llvm/lib/Target/Mips/MipsAsmPrinter.cpp (+4-4)
- (modified) llvm/lib/Target/Mips/MipsAsmPrinter.h (-1)
- (modified) llvm/lib/Target/Mips/MipsBranchExpansion.cpp (+1-2)
- (modified) llvm/lib/Target/Mips/MipsCallLowering.cpp (+2-4)
- (modified) llvm/lib/Target/Mips/MipsFastISel.cpp (+1-4)
- (modified) llvm/lib/Target/Mips/MipsISelLowering.cpp (+2-2)
- (modified) llvm/lib/Target/Mips/MipsMachineFunction.cpp (+4-8)
- (modified) llvm/lib/Target/Mips/MipsRegisterInfo.cpp (+1-3)
- (modified) llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp (+1-2)
- (modified) llvm/lib/Target/Mips/MipsSERegisterInfo.cpp (+1-3)
``````````diff
diff --git a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
index adda6154e15a54..6e9999077b3c7e 100644
--- a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
+++ b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
@@ -383,8 +383,8 @@ void MipsAsmPrinter::emitFrameDirective() {
}
/// Emit Set directives.
-const char *MipsAsmPrinter::getCurrentABIString() const {
- switch (static_cast<MipsTargetMachine &>(TM).getABI().GetEnumValue()) {
+static const char *getABIString(const MipsABIInfo &ABI) {
+ switch (ABI.GetEnumValue()) {
case MipsABIInfo::ABI::O32: return "abi32";
case MipsABIInfo::ABI::N32: return "abiN32";
case MipsABIInfo::ABI::N64: return "abi64";
@@ -750,7 +750,7 @@ void MipsAsmPrinter::emitStartOfAsmFile(Module &M) {
MTM, std::nullopt);
bool IsABICalls = STI.isABICalls();
- const MipsABIInfo &ABI = MTM.getABI();
+ const MipsABIInfo &ABI = STI.getABI();
if (IsABICalls) {
TS.emitDirectiveAbiCalls();
// FIXME: This condition should be a lot more complicated that it is here.
@@ -762,7 +762,7 @@ void MipsAsmPrinter::emitStartOfAsmFile(Module &M) {
}
// Tell the assembler which ABI we are using
- std::string SectionName = std::string(".mdebug.") + getCurrentABIString();
+ std::string SectionName = std::string(".mdebug.") + getABIString(ABI);
OutStreamer->switchSection(
OutContext.getELFSection(SectionName, ELF::SHT_PROGBITS, 0));
diff --git a/llvm/lib/Target/Mips/MipsAsmPrinter.h b/llvm/lib/Target/Mips/MipsAsmPrinter.h
index 3ba333095e801a..a7e18ab008c7c2 100644
--- a/llvm/lib/Target/Mips/MipsAsmPrinter.h
+++ b/llvm/lib/Target/Mips/MipsAsmPrinter.h
@@ -139,7 +139,6 @@ class LLVM_LIBRARY_VISIBILITY MipsAsmPrinter : public AsmPrinter {
void emitInstruction(const MachineInstr *MI) override;
void printSavedRegsBitmask();
void emitFrameDirective();
- const char *getCurrentABIString() const;
void emitFunctionEntryLabel() override;
void emitFunctionBodyStart() override;
void emitFunctionBodyEnd() override;
diff --git a/llvm/lib/Target/Mips/MipsBranchExpansion.cpp b/llvm/lib/Target/Mips/MipsBranchExpansion.cpp
index 80c255401a265e..9d84ac0159fe1d 100644
--- a/llvm/lib/Target/Mips/MipsBranchExpansion.cpp
+++ b/llvm/lib/Target/Mips/MipsBranchExpansion.cpp
@@ -79,7 +79,6 @@
#include "MipsInstrInfo.h"
#include "MipsMachineFunction.h"
#include "MipsSubtarget.h"
-#include "MipsTargetMachine.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/StringRef.h"
@@ -922,8 +921,8 @@ bool MipsBranchExpansion::handlePossibleLongBranch() {
bool MipsBranchExpansion::runOnMachineFunction(MachineFunction &MF) {
const TargetMachine &TM = MF.getTarget();
IsPIC = TM.isPositionIndependent();
- ABI = static_cast<const MipsTargetMachine &>(TM).getABI();
STI = &MF.getSubtarget<MipsSubtarget>();
+ ABI = STI->getABI();
TII = STI->getInstrInfo();
if (IsPIC && ABI.IsO32() &&
diff --git a/llvm/lib/Target/Mips/MipsCallLowering.cpp b/llvm/lib/Target/Mips/MipsCallLowering.cpp
index 6a1b14c7982fd0..8b0a85bdfe61ae 100644
--- a/llvm/lib/Target/Mips/MipsCallLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsCallLowering.cpp
@@ -335,9 +335,7 @@ bool MipsCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs,
F.getContext());
- const MipsTargetMachine &TM =
- static_cast<const MipsTargetMachine &>(MF.getTarget());
- const MipsABIInfo &ABI = TM.getABI();
+ const MipsABIInfo &ABI = MF.getSubtarget<MipsSubtarget>().getABI();
CCInfo.AllocateStack(ABI.GetCalleeAllocdArgSizeInBytes(F.getCallingConv()),
Align(1));
@@ -411,7 +409,7 @@ bool MipsCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
const MipsTargetLowering &TLI = *getTLI<MipsTargetLowering>();
const MipsTargetMachine &TM =
static_cast<const MipsTargetMachine &>(MF.getTarget());
- const MipsABIInfo &ABI = TM.getABI();
+ const MipsABIInfo &ABI = MF.getSubtarget<MipsSubtarget>().getABI();
MachineInstrBuilder CallSeqStart =
MIRBuilder.buildInstr(Mips::ADJCALLSTACKDOWN);
diff --git a/llvm/lib/Target/Mips/MipsFastISel.cpp b/llvm/lib/Target/Mips/MipsFastISel.cpp
index 600402152f7eca..8e79160c131f3c 100644
--- a/llvm/lib/Target/Mips/MipsFastISel.cpp
+++ b/llvm/lib/Target/Mips/MipsFastISel.cpp
@@ -20,7 +20,6 @@
#include "MipsInstrInfo.h"
#include "MipsMachineFunction.h"
#include "MipsSubtarget.h"
-#include "MipsTargetMachine.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
@@ -240,9 +239,7 @@ class MipsFastISel final : public FastISel {
unsigned &NumBytes);
bool finishCall(CallLoweringInfo &CLI, MVT RetVT, unsigned NumBytes);
- const MipsABIInfo &getABI() const {
- return static_cast<const MipsTargetMachine &>(TM).getABI();
- }
+ const MipsABIInfo &getABI() const { return Subtarget->getABI(); }
public:
// Backend specific FastISel code.
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index be89192121ac9c..ffe2e40b8c5d77 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -179,7 +179,7 @@ SDValue MipsTargetLowering::getTargetNode(ConstantPoolSDNode *N, EVT Ty,
MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
const MipsSubtarget &STI)
- : TargetLowering(TM, STI), Subtarget(STI), ABI(TM.getABI()) {
+ : TargetLowering(TM, STI), Subtarget(STI), ABI(STI.getABI()) {
// Mips does not have i1 type, so use i32 for
// setcc operations results (slt, sgt, ...).
setBooleanContents(ZeroOrOneBooleanContent);
@@ -470,7 +470,7 @@ FastISel *MipsTargetLowering::createFastISel(
// Disable if either of the following is true:
// We do not generate PIC, the ABI is not O32, XGOT is being used.
- if (!TM.isPositionIndependent() || !TM.getABI().IsO32() ||
+ if (!TM.isPositionIndependent() || !Subtarget.getABI().IsO32() ||
Subtarget.useXGOT())
UseFastISel = false;
diff --git a/llvm/lib/Target/Mips/MipsMachineFunction.cpp b/llvm/lib/Target/Mips/MipsMachineFunction.cpp
index 27206b4c3d19d2..eeb0f1ac03180f 100644
--- a/llvm/lib/Target/Mips/MipsMachineFunction.cpp
+++ b/llvm/lib/Target/Mips/MipsMachineFunction.cpp
@@ -9,7 +9,6 @@
#include "MipsMachineFunction.h"
#include "MCTargetDesc/MipsABIInfo.h"
#include "MipsSubtarget.h"
-#include "MipsTargetMachine.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/PseudoSourceValue.h"
@@ -38,7 +37,6 @@ bool MipsFunctionInfo::globalBaseRegSet() const {
static const TargetRegisterClass &getGlobalBaseRegClass(MachineFunction &MF) {
auto &STI = MF.getSubtarget<MipsSubtarget>();
- auto &TM = static_cast<const MipsTargetMachine &>(MF.getTarget());
if (STI.inMips16Mode())
return Mips::CPU16RegsRegClass;
@@ -46,7 +44,7 @@ static const TargetRegisterClass &getGlobalBaseRegClass(MachineFunction &MF) {
if (STI.inMicroMipsMode())
return Mips::GPRMM16RegClass;
- if (TM.getABI().IsN64())
+ if (STI.getABI().IsN64())
return Mips::GPR64RegClass;
return Mips::GPR32RegClass;
@@ -77,8 +75,7 @@ void MipsFunctionInfo::initGlobalBaseReg(MachineFunction &MF) {
const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
DebugLoc DL;
const TargetRegisterClass *RC;
- const MipsABIInfo &ABI =
- static_cast<const MipsTargetMachine &>(MF.getTarget()).getABI();
+ const MipsABIInfo &ABI = MF.getSubtarget<MipsSubtarget>().getABI();
RC = (ABI.IsN64()) ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;
Register V0 = RegInfo.createVirtualRegister(RC);
@@ -160,9 +157,8 @@ void MipsFunctionInfo::createEhDataRegsFI(MachineFunction &MF) {
const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
for (int &I : EhDataRegFI) {
const TargetRegisterClass &RC =
- static_cast<const MipsTargetMachine &>(MF.getTarget()).getABI().IsN64()
- ? Mips::GPR64RegClass
- : Mips::GPR32RegClass;
+ MF.getSubtarget<MipsSubtarget>().getABI().IsN64() ? Mips::GPR64RegClass
+ : Mips::GPR32RegClass;
I = MF.getFrameInfo().CreateStackObject(TRI.getSpillSize(RC),
TRI.getSpillAlign(RC), false);
diff --git a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
index 35d96e2785ab3e..d68ab86dd0efed 100644
--- a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -15,7 +15,6 @@
#include "Mips.h"
#include "MipsMachineFunction.h"
#include "MipsSubtarget.h"
-#include "MipsTargetMachine.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
@@ -287,8 +286,7 @@ Register MipsRegisterInfo::
getFrameRegister(const MachineFunction &MF) const {
const MipsSubtarget &Subtarget = MF.getSubtarget<MipsSubtarget>();
const TargetFrameLowering *TFI = Subtarget.getFrameLowering();
- bool IsN64 =
- static_cast<const MipsTargetMachine &>(MF.getTarget()).getABI().IsN64();
+ bool IsN64 = Subtarget.getABI().IsN64();
if (Subtarget.inMips16Mode())
return TFI->hasFP(MF) ? Mips::S0 : Mips::SP;
diff --git a/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp b/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
index e3599e268c88e1..71490f3b7a37cf 100644
--- a/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
@@ -1062,8 +1062,7 @@ bool MipsSEDAGToDAGISel::trySelect(SDNode *Node) {
// same set/ of registers. Similarly, ldi.h isn't capable of producing {
// 0x00000000, 0x00000001, 0x00000000, 0x00000001 } but 'ldi.d wd, 1' can.
- const MipsABIInfo &ABI =
- static_cast<const MipsTargetMachine &>(TM).getABI();
+ const MipsABIInfo &ABI = Subtarget->getABI();
BuildVectorSDNode *BVN = cast<BuildVectorSDNode>(Node);
APInt SplatValue, SplatUndef;
diff --git a/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp b/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
index e066aa9f194c06..4458bd29cd9c4a 100644
--- a/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
@@ -16,7 +16,6 @@
#include "MipsMachineFunction.h"
#include "MipsSEInstrInfo.h"
#include "MipsSubtarget.h"
-#include "MipsTargetMachine.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
@@ -145,8 +144,7 @@ void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
MachineFrameInfo &MFI = MF.getFrameInfo();
MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
- MipsABIInfo ABI =
- static_cast<const MipsTargetMachine &>(MF.getTarget()).getABI();
+ MipsABIInfo ABI = MF.getSubtarget<MipsSubtarget>().getABI();
const MipsRegisterInfo *RegInfo =
static_cast<const MipsRegisterInfo *>(MF.getSubtarget().getRegisterInfo());
``````````
</details>
https://github.com/llvm/llvm-project/pull/226667
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