[llvm] 19d72fd - [AArch64] Rename memory hints to avoid clash with arm_acle.h macros (#226432)

[via llvm-commits]

Author: Kerry McLaughlin
Date: 2026-09-25T21:03:59+01:00
New Revision: 19d72fd6deab2ea3addd8b945807abd02b1bbb70

URL: https://github.com/llvm/llvm-project/commit/19d72fd6deab2ea3addd8b945807abd02b1bbb70
DIFF: https://github.com/llvm/llvm-project/commit/19d72fd6deab2ea3addd8b945807abd02b1bbb70.diff

LOG: [AArch64] Rename memory hints to avoid clash with arm_acle.h macros (#226432)

Renames the hints in AArch64MemoryHints.h, as HINT_STSHH_KEEP and
HINT_STSHH_STRM are already defined in arm_acle.h.

Added: 
    

Modified: 
    clang/lib/CodeGen/TargetBuiltins/ARM.cpp
    clang/lib/Sema/SemaARM.cpp
    llvm/include/llvm/Support/AArch64MemoryHints.h
    llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

Removed: 
    


################################################################################
diff  --git a/clang/lib/CodeGen/TargetBuiltins/ARM.cpp b/clang/lib/CodeGen/TargetBuiltins/ARM.cpp
index 52a7564789fb7..e20fa60ee132b 100644
--- a/clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+++ b/clang/lib/CodeGen/TargetBuiltins/ARM.cpp
@@ -2112,7 +2112,7 @@ static Value *EmitAtomicStoreWithHintBuiltin(CodeGenFunction &CGF,
   unsigned HintArg = Result.Val.getInt().getExtValue();
 
   // Attach the hint if valid
-  if (toAArch64MemoryHint(HintArg) != AArch64MemoryHint::HINT_NONE) {
+  if (toAArch64MemoryHint(HintArg) != AArch64MemoryHint::NONE) {
     LLVMContext &Ctx = CGM.getLLVMContext();
     MDNode *MemHint = MDNode::get(
         Ctx, {MDString::get(Ctx, "aarch64.mem_hint"),

diff  --git a/clang/lib/Sema/SemaARM.cpp b/clang/lib/Sema/SemaARM.cpp
index 2bf6901bcc07f..a5037fce03c6b 100644
--- a/clang/lib/Sema/SemaARM.cpp
+++ b/clang/lib/Sema/SemaARM.cpp
@@ -434,7 +434,7 @@ bool SemaARM::BuiltinARMAtomicStoreHintCall(unsigned BuiltinID,
              << Hint->getType() << Hint->getSourceRange();
 
     if (llvm::toAArch64MemoryHint(HintAP->getZExtValue()) ==
-        llvm::AArch64MemoryHint::HINT_NONE) {
+        llvm::AArch64MemoryHint::NONE) {
       Diag(TheCall->getBeginLoc(), diag::warn_atomic_hint_has_invalid_hint_type)
           << *HintAP << Hint->getSourceRange();
       return false;

diff  --git a/llvm/include/llvm/Support/AArch64MemoryHints.h b/llvm/include/llvm/Support/AArch64MemoryHints.h
index 44ac64e481e80..b917191499cac 100644
--- a/llvm/include/llvm/Support/AArch64MemoryHints.h
+++ b/llvm/include/llvm/Support/AArch64MemoryHints.h
@@ -11,24 +11,24 @@
 
 namespace llvm {
 enum class AArch64MemoryHint {
-  HINT_NONE = 0,
-  HINT_STSHH_KEEP = 1,
-  HINT_STSHH_STRM = 2,
+  NONE = 0,
+  STSHH_KEEP = 1,
+  STSHH_STRM = 2,
 };
 
 template <typename Int> inline bool isValidAArch64MemoryHintValue(Int I) {
-  return (Int)AArch64MemoryHint::HINT_STSHH_KEEP <= I &&
-         I <= (Int)AArch64MemoryHint::HINT_STSHH_STRM;
+  return (Int)AArch64MemoryHint::STSHH_KEEP <= I &&
+         I <= (Int)AArch64MemoryHint::STSHH_STRM;
 }
 
 template <typename Int> inline AArch64MemoryHint toAArch64MemoryHint(Int I) {
   switch (I) {
   case 0:
-    return AArch64MemoryHint::HINT_STSHH_KEEP;
+    return AArch64MemoryHint::STSHH_KEEP;
   case 1:
-    return AArch64MemoryHint::HINT_STSHH_STRM;
+    return AArch64MemoryHint::STSHH_STRM;
   default:
-    return AArch64MemoryHint::HINT_NONE;
+    return AArch64MemoryHint::NONE;
   }
 }
 } // namespace llvm

diff  --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
index ee87070c12727..48c0e37151b9c 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
@@ -4624,7 +4624,7 @@ AArch64DAGToDAGISel::decodeMemoryHintFlags(MachineMemOperand *MMO) const {
   int MemoryHint = -1;
   const MDNode *MemCacheHint = MMO->getMemCacheHint();
   if (!MemCacheHint)
-    return AArch64MemoryHint::HINT_NONE;
+    return AArch64MemoryHint::NONE;
 
   for (unsigned I = 0; I + 1 < MemCacheHint->getNumOperands(); I += 2) {
     if (MemCacheHint->getOperand(I).equalsStr("aarch64.mem_hint")) {
@@ -4639,12 +4639,12 @@ AArch64DAGToDAGISel::decodeMemoryHintFlags(MachineMemOperand *MMO) const {
 
 bool AArch64DAGToDAGISel::isAtomicSTSHH_KEEP(SDNode *N) const {
   return decodeMemoryHintFlags(cast<MemSDNode>(N)->getMemOperand()) ==
-         AArch64MemoryHint::HINT_STSHH_KEEP;
+         AArch64MemoryHint::STSHH_KEEP;
 }
 
 bool AArch64DAGToDAGISel::isAtomicSTSHH_STRM(SDNode *N) const {
   return decodeMemoryHintFlags(cast<MemSDNode>(N)->getMemOperand()) ==
-         AArch64MemoryHint::HINT_STSHH_STRM;
+         AArch64MemoryHint::STSHH_STRM;
 }
 
 bool AArch64DAGToDAGISel::SelectSVEAddSubImm(SDValue N, MVT VT, SDValue &Imm,