[llvm] [CodeGen] Use shared RegClassInfo in basic, greedy and fast allocators (PR #226523)

Nikhil Kotikalapudi via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 25 09:57:03 PDT 2026

Previous message: [llvm] 07aec21 - [AMDGPU] merge 16bit mov pairs in post-RA peephole (#208625)
Next message: [llvm] [CodeGen] Use shared RegClassInfo in basic, greedy and fast allocators (PR #226523)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

https://github.com/nkotikal edited https://github.com/llvm/llvm-project/pull/226523

Previous message: [llvm] 07aec21 - [AMDGPU] merge 16bit mov pairs in post-RA peephole (#208625)
Next message: [llvm] [CodeGen] Use shared RegClassInfo in basic, greedy and fast allocators (PR #226523)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list