[llvm] [RISCV] Avoid early split for fixed-length VECTOR_DEINTERLEAVE (PR #226453)

[via llvm-commits]

compilersutra wrote:

> > This is a lot of code. I'd hope that vectorizers/the middle end generally wouldn't choose a fixed vector deinterleave larger than LMUL 8 to begin with. Does this improve codegen in any real world scenarios?
> 
> These >LMUL8 fixed cases still hit legalization (#222938). Agree the vectorizer preferably wouldn't pick them; this just makes that path cheaper. I don't have RISC-V hardware here only a QEMU microbench so far (~10–11% ns/iter).

Also pushed a refactor to share spill/vlseg with the existing path.

https://github.com/llvm/llvm-project/pull/226453