[llvm] ff5f397 - [AMDGPU] Fix dynamic LDS consistency check in setDynLDSAlign (#225825)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 25 08:02:47 PDT 2026
Author: Lei Zhang
Date: 2026-09-25T08:02:41-07:00
New Revision: ff5f397d6cd06d0eb72f798b4454d490050fb442
URL: https://github.com/llvm/llvm-project/commit/ff5f397d6cd06d0eb72f798b4454d490050fb442
DIFF: https://github.com/llvm/llvm-project/commit/ff5f397d6cd06d0eb72f798b4454d490050fb442.diff
LOG: [AMDGPU] Fix dynamic LDS consistency check in setDynLDSAlign (#225825)
5bf967cb132b ("[RFC][AMDGPU] Add BARRIER address space") changed the
absolute-address check in `setDynLDSAlign` to read the dynamic LDS
global being lowered (`GV`) instead of the kernel's representative
`llvm.amdgcn.<kernel>.dynlds` variable (`Dyn`).
`amdgpu-lower-module-lds` attaches `!absolute_symbol` only to the
representative; uses of the original dynamic LDS global inside the
kernel are left in place and never carry that metadata. As a result, a
kernel that accesses dynamic LDS both directly and through a non-inlined
callee now aborts with "Inconsistent metadata on dynamic LDS variable".
Added:
llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll
Modified:
llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
index 22e9d8ae06b4f..ea8265a2aae12 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
@@ -235,7 +235,7 @@ void AMDGPUMachineFunctionInfo::setDynLDSAlign(const Function &F,
if (Dyn) {
unsigned Offset = LDSSize; // return this?
std::optional<uint32_t> Expect =
- get32BitAbsoluteAddress(GV, AMDGPUAS::LOCAL_ADDRESS);
+ get32BitAbsoluteAddress(*Dyn, AMDGPUAS::LOCAL_ADDRESS);
if (!Expect || (Offset != *Expect)) {
report_fatal_error("Inconsistent metadata on dynamic LDS variable");
}
diff --git a/llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll b/llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll
new file mode 100644
index 0000000000000..5a4009f0398bc
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll
@@ -0,0 +1,64 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=amdgpu9.42-amd-amdhsa < %s | FileCheck -check-prefixes=GFX942,GFX942-SDAG %s
+; RUN: llc -mtriple=amdgpu9.42-amd-amdhsa -global-isel < %s | FileCheck -check-prefixes=GFX942,GFX942-GISEL %s
+
+; A kernel that accesses a dynamic LDS variable both directly and through a
+; non-inlined callee. amdgpu-lower-module-lds rewrites only the callee's uses
+; to go through llvm.amdgcn.dynlds.offset.table and gives the per-kernel
+; llvm.amdgcn.kernel.dynlds variable absolute_symbol metadata. The kernel's
+; direct use still refers to the original @dynlds, which has no such metadata.
+
+ at dynlds = external addrspace(3) global [0 x i8], align 16
+
+define internal void @helper() noinline {
+; GFX942-LABEL: helper:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: s_mov_b32 s0, s15
+; GFX942-NEXT: s_ashr_i32 s1, s15, 31
+; GFX942-NEXT: s_lshl_b64 s[0:1], s[0:1], 2
+; GFX942-NEXT: s_getpc_b64 s[2:3]
+; GFX942-NEXT: s_add_u32 s2, s2, llvm.amdgcn.dynlds.offset.table at rel32@lo+4
+; GFX942-NEXT: s_addc_u32 s3, s3, llvm.amdgcn.dynlds.offset.table at rel32@hi+12
+; GFX942-NEXT: s_add_u32 s0, s2, s0
+; GFX942-NEXT: s_addc_u32 s1, s3, s1
+; GFX942-NEXT: s_load_dword s0, s[0:1], 0x0
+; GFX942-NEXT: v_mov_b32_e32 v0, 1
+; GFX942-NEXT: s_waitcnt lgkmcnt(0)
+; GFX942-NEXT: v_mov_b32_e32 v1, s0
+; GFX942-NEXT: ds_write_b8 v1, v0
+; GFX942-NEXT: s_waitcnt lgkmcnt(0)
+; GFX942-NEXT: s_setpc_b64 s[30:31]
+ store volatile i8 1, ptr addrspace(3) @dynlds, align 1
+ ret void
+}
+
+define amdgpu_kernel void @kernel() {
+; GFX942-LABEL: kernel:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_mov_b32 s14, s10
+; GFX942-NEXT: s_mov_b32 s13, s9
+; GFX942-NEXT: s_mov_b32 s12, s8
+; GFX942-NEXT: s_mov_b64 s[10:11], s[6:7]
+; GFX942-NEXT: s_mov_b64 s[8:9], s[4:5]
+; GFX942-NEXT: v_mov_b32_e32 v1, 2
+; GFX942-NEXT: v_mov_b32_e32 v2, 0
+; GFX942-NEXT: s_getpc_b64 s[16:17]
+; GFX942-NEXT: s_add_u32 s16, s16, helper at rel32@lo+4
+; GFX942-NEXT: s_addc_u32 s17, s17, helper at rel32@hi+12
+; GFX942-NEXT: s_mov_b64 s[4:5], s[0:1]
+; GFX942-NEXT: s_mov_b64 s[6:7], s[2:3]
+; GFX942-NEXT: s_mov_b32 s15, 0
+; GFX942-NEXT: v_mov_b32_e32 v31, v0
+; GFX942-NEXT: s_mov_b32 s32, 0
+; GFX942-NEXT: ds_write_b8 v2, v1 offset:16
+; GFX942-NEXT: s_swappc_b64 s[30:31], s[16:17]
+; GFX942-NEXT: s_endpgm
+ %p = getelementptr i8, ptr addrspace(3) @dynlds, i32 16
+ store volatile i8 2, ptr addrspace(3) %p, align 1
+ call void @helper()
+ ret void
+}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GFX942-GISEL: {{.*}}
+; GFX942-SDAG: {{.*}}
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