[llvm] [AMDGPU] Unpack V_PK_MOV_B32 for MFMA co-issue (PR #211937)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp --diff_from_common_commit
``````````

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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp b/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
index 6386d712b..e451494b0 100644
--- a/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
+++ b/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
@@ -20,10 +20,10 @@
 
 #include "AMDGPU.h"
 #include "GCNSubtarget.h"
-#include "llvm/ADT/Statistic.h"
 #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
 #include "SIDefines.h"
 #include "llvm/ADT/SetVector.h"
+#include "llvm/ADT/Statistic.h"
 #include "llvm/CodeGen/MachineDominators.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
@@ -602,7 +602,7 @@ bool SIPreEmitPeephole::removeRedundantModeWrites(
 }
 
 bool SIPreEmitPeephole::canUnpackPkMov(const MachineInstr &MI,
-                                            bool &HighFirst) const {
+                                       bool &HighFirst) const {
   Register Dst = MI.getOperand(0).getReg();
   Register LoDst = TRI->getSubReg(Dst, AMDGPU::sub0);
   Register HiDst = TRI->getSubReg(Dst, AMDGPU::sub1);

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https://github.com/llvm/llvm-project/pull/211937