[clang] [llvm] [Clang][RISCV][P-ext] Add Packed Widening Multiply Accumulate intrinsics (PR #226505)

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@llvm/pr-subscribers-llvm-ir

Author: Q (StarryCSF)

<details>
<summary>Changes</summary>

Add intrinsics, Clang builtins and SelectionDAG support for the packed widening multiply-accumulate operations.
See https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#packed-widening-multiply-accumulate.

On RV32, the pwmacc.h family accumulates into the register pair holding rd.
On RV64, the operations are lowered according to the spec decomposition table, using zip16p and the pmacc.w.h01/pmaccu.w.h01 forms, or pwcvtu.wh followed by pmaccsu.w.h00 for the signed-unsigned form.

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Full diff: https://github.com/llvm/llvm-project/pull/226505.diff


10 Files Affected:

- (modified) clang/include/clang/Basic/BuiltinsRISCV.td (+5) 
- (modified) clang/lib/CodeGen/TargetBuiltins/RISCV.cpp (+21) 
- (modified) clang/lib/Headers/riscv_packed_simd.h (+5) 
- (modified) clang/test/CodeGen/RISCV/rvp-intrinsics.c (+73) 
- (modified) cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c (+25) 
- (modified) llvm/include/llvm/IR/IntrinsicsRISCV.td (+13) 
- (modified) llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp (+12) 
- (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+58) 
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfoP.td (+18) 
- (modified) llvm/test/CodeGen/RISCV/rvp-simd-64.ll (+49) 


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</details>


https://github.com/llvm/llvm-project/pull/226505