[llvm] [AMDGPU] Fix missed WMMA C-operand co-exec hazard (PR #226503)

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@llvm/pr-subscribers-backend-amdgpu

Author: Petar Jovanovic (petar-jovanovic)

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<summary>Changes</summary>

The gfx1250 WMMA co-execution hazard check treats only A, B and the SWMMAC index as registers the in-flight MMA still reads. C (src2 of a non-SWMMAC WMMA) is missing, so a VALU scheduled into the MMA's shadow can clobber C and the MMA consumes the new value.

This is latent while C is tied to vdst, since the existing D check then covers it. It miscompiles where the tie does not hold: for v_wmma_bf16f32_16x16x32_bf16, whose D is narrower than C, and for the _threeaddr form of any WMMA.

Add src2 to the checked set for non-SWMMAC WMMAs.

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Full diff: https://github.com/llvm/llvm-project/pull/226503.diff


2 Files Affected:

- (modified) llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp (+5) 
- (modified) llvm/test/CodeGen/AMDGPU/wmma-coexecution-valu-hazards.mir (+171-2) 


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https://github.com/llvm/llvm-project/pull/226503