[llvm] [AMDGPU][GISel] Match constrained shifts across regbank copies (PR #212097)

[Petar Avramovic via llvm-commits]

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@@ -293,40 +293,53 @@ def AMDGPUmul_i24_oneuse : HasOneUseBinOp<AMDGPUmul_i24>;
 
 // Constrained shift PatFrags.
 
+// G_CONSTANT is assigned the SGPR bank, so a VGPR G_AND reads the mask through
+// a COPY. An SGPR G_AND feeding a VGPR shift likewise has a COPY on the amount.
+// GIIgnoreCopies looks through those copies; the pattern shape is unchanged.
+let GIIgnoreCopies = 1 in {
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petar-avramovic wrote:

what is stopping us from putting this on base GCNPat so that all patterns look through? It is almost always better to have two instructions instead of one (assuming we are not that concerned about some corner cases that increase register pressure)

https://github.com/llvm/llvm-project/pull/212097