[llvm] [AArch64][CostModel] Allow more nxv1 operations on integers (PR #226146)
Gaëtan Bossu via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 25 05:25:54 PDT 2026
https://github.com/gbossu updated https://github.com/llvm/llvm-project/pull/226146
>From 3c282a7731a554752b118be42b7e92f7c56b1618 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ga=C3=ABtan=20Bossu?= <gaetan.bossu at arm.com>
Date: Thu, 24 Sep 2026 09:41:29 +0000
Subject: [PATCH 1/2] [AArch64][CostModel] Allow more nxv1 operations on
integers
This rewrite the "approved" list to become an explicit "exclusion" list.
At this point, we can expect all arithmetic int operation to be valid
for nxv1 types, with the exception of div/rem and overflow ops.
FP types will be looked into later.
The patch adds codegen and costmodel tests.
---
.../AArch64/AArch64TargetTransformInfo.cpp | 11 +-
.../CostModel/AArch64/sve-arith-overflow.ll | 108 +++++++++++
.../Analysis/CostModel/AArch64/sve-arith.ll | 172 ++++++++++++++++++
llvm/test/CodeGen/AArch64/sve-int-arith.ll | 47 ++++-
llvm/test/CodeGen/AArch64/sve-int-log.ll | 92 +++++++---
.../LoopVectorize/AArch64/invalid-costs.ll | 1 -
6 files changed, 395 insertions(+), 36 deletions(-)
create mode 100644 llvm/test/Analysis/CostModel/AArch64/sve-arith-overflow.ll
diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
index 40390801c20999..05b3941d9af0a9 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -958,6 +958,10 @@ AArch64TTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
{Intrinsic::umul_with_overflow, MVT::i64, 3}, // eg mul;umulh;cmp asr
};
EVT MTy = TLI->getValueType(DL, RetTy->getContainedType(0), true);
+ // Codegen does not handle nxv1 types for overflow ops.
+ if (MTy.isVector() &&
+ MTy.getVectorElementCount() == ElementCount::getScalable(1))
+ return InstructionCost::getInvalid();
if (MTy.isSimple())
if (const auto *Entry = CostTableLookup(WithOverflowCostTbl, ICA.getID(),
MTy.getSimpleVT()))
@@ -4932,12 +4936,13 @@ InstructionCost AArch64TTIImpl::getArithmeticInstrCost(
ArrayRef<const Value *> Args, const Instruction *CtxI) const {
// The code-generator is currently not able to handle scalable vectors
- // of <vscale x 1 x eltty> yet, so return an invalid cost to avoid selecting
- // it until all instructions are vetted.
+ // of <vscale x 1 x eltty> for all operations. Return an invalid cost for
+ // those that aren't supported.
int ISD = TLI->InstructionOpcodeToISD(Opcode);
if (auto *VTy = dyn_cast<ScalableVectorType>(Ty))
if (VTy->getElementCount() == ElementCount::getScalable(1))
- if (!is_contained({ISD::ADD, ISD::SUB, ISD::MUL}, ISD))
+ if (VTy->getElementType()->isFloatingPointTy() ||
+ is_contained({ISD::SDIV, ISD::SREM, ISD::UDIV, ISD::UREM}, ISD))
return InstructionCost::getInvalid();
// Legalize the type.
diff --git a/llvm/test/Analysis/CostModel/AArch64/sve-arith-overflow.ll b/llvm/test/Analysis/CostModel/AArch64/sve-arith-overflow.ll
new file mode 100644
index 00000000000000..7dc280507379c1
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/AArch64/sve-arith-overflow.ll
@@ -0,0 +1,108 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
+; RUN: opt < %s -passes="print<cost-model>" -cost-kind=all 2>&1 -disable-output -aarch64-sve-vector-bits-min=128 | FileCheck %s
+
+target triple = "aarch64-unknown-linux-gnu"
+
+define void @sadd_with_overflow() #0 {
+; CHECK-LABEL: 'sadd_with_overflow'
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.sadd.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.sadd.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.sadd.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.sadd.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.sadd.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
+;
+ %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.sadd.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
+ %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.sadd.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
+ %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.sadd.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
+ %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.sadd.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
+ %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.sadd.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+ ret void
+}
+
+define void @uadd_with_overflow() #0 {
+; CHECK-LABEL: 'uadd_with_overflow'
+; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.uadd.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
+; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.uadd.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
+; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.uadd.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
+; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.uadd.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.uadd.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
+;
+ %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.uadd.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
+ %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.uadd.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
+ %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.uadd.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
+ %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.uadd.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
+ %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.uadd.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+ ret void
+}
+
+define void @ssub_with_overflow() #0 {
+; CHECK-LABEL: 'ssub_with_overflow'
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.ssub.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.ssub.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.ssub.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.ssub.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.ssub.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
+;
+ %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.ssub.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
+ %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.ssub.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
+ %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.ssub.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
+ %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.ssub.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
+ %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.ssub.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+ ret void
+}
+
+define void @usub_with_overflow() #0 {
+; CHECK-LABEL: 'usub_with_overflow'
+; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.usub.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
+; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.usub.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
+; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.usub.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
+; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.usub.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.usub.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
+;
+ %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.usub.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
+ %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.usub.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
+ %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.usub.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
+ %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.usub.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
+ %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.usub.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+ ret void
+}
+
+define void @smul_with_overflow() #0 {
+; CHECK-LABEL: 'smul_with_overflow'
+; CHECK-NEXT: Cost Model: Found costs of 12 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.smul.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
+; CHECK-NEXT: Cost Model: Found costs of 12 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
+; CHECK-NEXT: Cost Model: Found costs of 12 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
+;
+ %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.smul.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
+ %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
+ %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
+ %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
+ %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+ ret void
+}
+
+define void @umul_with_overflow() #0 {
+; CHECK-LABEL: 'umul_with_overflow'
+; CHECK-NEXT: Cost Model: Found costs of 11 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.umul.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
+; CHECK-NEXT: Cost Model: Found costs of 11 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.umul.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
+; CHECK-NEXT: Cost Model: Found costs of 11 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.umul.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.umul.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.umul.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
+;
+ %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.umul.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
+ %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.umul.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
+ %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.umul.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
+ %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.umul.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
+ %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.umul.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+ ret void
+}
+
+attributes #0 = { "target-features"="+sve" }
diff --git a/llvm/test/Analysis/CostModel/AArch64/sve-arith.ll b/llvm/test/Analysis/CostModel/AArch64/sve-arith.ll
index ecca4fea2e5205..4a88b088daff29 100644
--- a/llvm/test/Analysis/CostModel/AArch64/sve-arith.ll
+++ b/llvm/test/Analysis/CostModel/AArch64/sve-arith.ll
@@ -66,12 +66,139 @@ entry:
ret void
}
+define void @scalable_and() #0 {
+; CHECK-LABEL: 'scalable_and'
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = and <vscale x 16 x i8> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = and <vscale x 8 x i16> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = and <vscale x 4 x i32> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = and <vscale x 2 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = and <vscale x 1 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = and <vscale x 2 x i128> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
+;
+entry:
+ %nxv16i8 = and <vscale x 16 x i8> undef, undef
+ %nxv8i16 = and <vscale x 8 x i16> undef, undef
+ %nxv4i32 = and <vscale x 4 x i32> undef, undef
+ %nxv2i64 = and <vscale x 2 x i64> undef, undef
+ %nxv1i64 = and <vscale x 1 x i64> undef, undef
+ %nxv2i128 = and <vscale x 2 x i128> undef, undef
+
+ ret void
+}
+
+define void @scalable_or() #0 {
+; CHECK-LABEL: 'scalable_or'
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = or <vscale x 16 x i8> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = or <vscale x 8 x i16> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = or <vscale x 4 x i32> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = or <vscale x 2 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = or <vscale x 1 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = or <vscale x 2 x i128> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
+;
+entry:
+ %nxv16i8 = or <vscale x 16 x i8> undef, undef
+ %nxv8i16 = or <vscale x 8 x i16> undef, undef
+ %nxv4i32 = or <vscale x 4 x i32> undef, undef
+ %nxv2i64 = or <vscale x 2 x i64> undef, undef
+ %nxv1i64 = or <vscale x 1 x i64> undef, undef
+ %nxv2i128 = or <vscale x 2 x i128> undef, undef
+
+ ret void
+}
+
+define void @scalable_xor() #0 {
+; CHECK-LABEL: 'scalable_xor'
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = xor <vscale x 16 x i8> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = xor <vscale x 8 x i16> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = xor <vscale x 4 x i32> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = xor <vscale x 2 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = xor <vscale x 1 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = xor <vscale x 2 x i128> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
+;
+entry:
+ %nxv16i8 = xor <vscale x 16 x i8> undef, undef
+ %nxv8i16 = xor <vscale x 8 x i16> undef, undef
+ %nxv4i32 = xor <vscale x 4 x i32> undef, undef
+ %nxv2i64 = xor <vscale x 2 x i64> undef, undef
+ %nxv1i64 = xor <vscale x 1 x i64> undef, undef
+ %nxv2i128 = xor <vscale x 2 x i128> undef, undef
+
+ ret void
+}
+
+define void @scalable_ashr() #0 {
+; CHECK-LABEL: 'scalable_ashr'
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = ashr <vscale x 16 x i8> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = ashr <vscale x 8 x i16> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = ashr <vscale x 4 x i32> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = ashr <vscale x 2 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = ashr <vscale x 1 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = ashr <vscale x 2 x i128> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
+;
+entry:
+ %nxv16i8 = ashr <vscale x 16 x i8> undef, undef
+ %nxv8i16 = ashr <vscale x 8 x i16> undef, undef
+ %nxv4i32 = ashr <vscale x 4 x i32> undef, undef
+ %nxv2i64 = ashr <vscale x 2 x i64> undef, undef
+ %nxv1i64 = ashr <vscale x 1 x i64> undef, undef
+ %nxv2i128 = ashr <vscale x 2 x i128> undef, undef
+
+ ret void
+}
+
+define void @scalable_lshr() #0 {
+; CHECK-LABEL: 'scalable_lshr'
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = lshr <vscale x 16 x i8> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = lshr <vscale x 8 x i16> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = lshr <vscale x 4 x i32> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = lshr <vscale x 2 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = lshr <vscale x 1 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = lshr <vscale x 2 x i128> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
+;
+entry:
+ %nxv16i8 = lshr <vscale x 16 x i8> undef, undef
+ %nxv8i16 = lshr <vscale x 8 x i16> undef, undef
+ %nxv4i32 = lshr <vscale x 4 x i32> undef, undef
+ %nxv2i64 = lshr <vscale x 2 x i64> undef, undef
+ %nxv1i64 = lshr <vscale x 1 x i64> undef, undef
+ %nxv2i128 = lshr <vscale x 2 x i128> undef, undef
+
+ ret void
+}
+
+define void @scalable_shl() #0 {
+; CHECK-LABEL: 'scalable_shl'
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = shl <vscale x 16 x i8> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = shl <vscale x 8 x i16> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = shl <vscale x 4 x i32> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = shl <vscale x 2 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = shl <vscale x 1 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = shl <vscale x 2 x i128> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
+;
+entry:
+ %nxv16i8 = shl <vscale x 16 x i8> undef, undef
+ %nxv8i16 = shl <vscale x 8 x i16> undef, undef
+ %nxv4i32 = shl <vscale x 4 x i32> undef, undef
+ %nxv2i64 = shl <vscale x 2 x i64> undef, undef
+ %nxv1i64 = shl <vscale x 1 x i64> undef, undef
+ %nxv2i128 = shl <vscale x 2 x i128> undef, undef
+
+ ret void
+}
+
define void @scalable_sdiv() #0 {
; CHECK-LABEL: 'scalable_sdiv'
; CHECK-NEXT: Cost Model: Found costs of RThru:16 CodeSize:32 Lat:32 SizeLat:32 for: %nxv16i8 = sdiv <vscale x 16 x i8> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:16 Lat:16 SizeLat:16 for: %nxv8i16 = sdiv <vscale x 8 x i16> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %nxv4i32 = sdiv <vscale x 4 x i32> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %nxv2i64 = sdiv <vscale x 2 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = sdiv <vscale x 1 x i64> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %nxv2i128 = sdiv <vscale x 2 x i128> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
@@ -80,6 +207,7 @@ entry:
%nxv8i16 = sdiv <vscale x 8 x i16> undef, undef
%nxv4i32 = sdiv <vscale x 4 x i32> undef, undef
%nxv2i64 = sdiv <vscale x 2 x i64> undef, undef
+ %nxv1i64 = sdiv <vscale x 1 x i64> undef, undef
%nxv2i128 = sdiv <vscale x 2 x i128> undef, undef
ret void
@@ -91,6 +219,7 @@ define void @scalable_udiv() #0 {
; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:16 Lat:16 SizeLat:16 for: %nxv8i16 = udiv <vscale x 8 x i16> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %nxv4i32 = udiv <vscale x 4 x i32> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %nxv2i64 = udiv <vscale x 2 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = udiv <vscale x 1 x i64> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %nxv2i128 = udiv <vscale x 2 x i128> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
@@ -99,9 +228,52 @@ entry:
%nxv8i16 = udiv <vscale x 8 x i16> undef, undef
%nxv4i32 = udiv <vscale x 4 x i32> undef, undef
%nxv2i64 = udiv <vscale x 2 x i64> undef, undef
+ %nxv1i64 = udiv <vscale x 1 x i64> undef, undef
%nxv2i128 = udiv <vscale x 2 x i128> undef, undef
ret void
}
+define void @scalable_srem() #0 {
+; CHECK-LABEL: 'scalable_srem'
+; CHECK-NEXT: Cost Model: Found costs of RThru:18 CodeSize:4 Lat:4 SizeLat:4 for: %nxv16i8 = srem <vscale x 16 x i8> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %nxv8i16 = srem <vscale x 8 x i16> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv4i32 = srem <vscale x 4 x i32> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv2i64 = srem <vscale x 2 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = srem <vscale x 1 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %nxv2i128 = srem <vscale x 2 x i128> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
+;
+entry:
+ %nxv16i8 = srem <vscale x 16 x i8> undef, undef
+ %nxv8i16 = srem <vscale x 8 x i16> undef, undef
+ %nxv4i32 = srem <vscale x 4 x i32> undef, undef
+ %nxv2i64 = srem <vscale x 2 x i64> undef, undef
+ %nxv1i64 = srem <vscale x 1 x i64> undef, undef
+ %nxv2i128 = srem <vscale x 2 x i128> undef, undef
+
+ ret void
+}
+
+define void @scalable_urem() #0 {
+; CHECK-LABEL: 'scalable_urem'
+; CHECK-NEXT: Cost Model: Found costs of RThru:18 CodeSize:4 Lat:4 SizeLat:4 for: %nxv16i8 = urem <vscale x 16 x i8> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %nxv8i16 = urem <vscale x 8 x i16> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv4i32 = urem <vscale x 4 x i32> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv2i64 = urem <vscale x 2 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = urem <vscale x 1 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %nxv2i128 = urem <vscale x 2 x i128> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
+;
+entry:
+ %nxv16i8 = urem <vscale x 16 x i8> undef, undef
+ %nxv8i16 = urem <vscale x 8 x i16> undef, undef
+ %nxv4i32 = urem <vscale x 4 x i32> undef, undef
+ %nxv2i64 = urem <vscale x 2 x i64> undef, undef
+ %nxv1i64 = urem <vscale x 1 x i64> undef, undef
+ %nxv2i128 = urem <vscale x 2 x i128> undef, undef
+
+ ret void
+}
+
attributes #0 = { "target-features"="+sve" }
diff --git a/llvm/test/CodeGen/AArch64/sve-int-arith.ll b/llvm/test/CodeGen/AArch64/sve-int-arith.ll
index 6c6c8aea46ec74..d8cd99f643deb0 100644
--- a/llvm/test/CodeGen/AArch64/sve-int-arith.ll
+++ b/llvm/test/CodeGen/AArch64/sve-int-arith.ll
@@ -138,6 +138,45 @@ define <vscale x 2 x i64> @mul_nxv1i64(<vscale x 2 x i64> %a, <vscale x 2 x i64>
ret <vscale x 2 x i64> %res
}
+define <vscale x 2 x i64> @shl_nxv1i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {
+; CHECK-LABEL: shl_nxv1i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: lsl z0.d, p0/m, z0.d, z1.d
+; CHECK-NEXT: ret
+ %a.nxv1 = call <vscale x 1 x i64> @llvm.vector.extract.nxv1i64.nxv2i64(<vscale x 2 x i64> %a, i64 0)
+ %b.nxv1 = call <vscale x 1 x i64> @llvm.vector.extract.nxv1i64.nxv2i64(<vscale x 2 x i64> %b, i64 0)
+ %res.nxv1 = shl <vscale x 1 x i64> %a.nxv1, %b.nxv1
+ %res = call <vscale x 2 x i64> @llvm.vector.insert.nxv2i64.nxv1i64(<vscale x 2 x i64> poison, <vscale x 1 x i64> %res.nxv1, i64 0)
+ ret <vscale x 2 x i64> %res
+}
+
+define <vscale x 2 x i64> @ashr_nxv1i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {
+; CHECK-LABEL: ashr_nxv1i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: asr z0.d, p0/m, z0.d, z1.d
+; CHECK-NEXT: ret
+ %a.nxv1 = call <vscale x 1 x i64> @llvm.vector.extract.nxv1i64.nxv2i64(<vscale x 2 x i64> %a, i64 0)
+ %b.nxv1 = call <vscale x 1 x i64> @llvm.vector.extract.nxv1i64.nxv2i64(<vscale x 2 x i64> %b, i64 0)
+ %res.nxv1 = ashr <vscale x 1 x i64> %a.nxv1, %b.nxv1
+ %res = call <vscale x 2 x i64> @llvm.vector.insert.nxv2i64.nxv1i64(<vscale x 2 x i64> poison, <vscale x 1 x i64> %res.nxv1, i64 0)
+ ret <vscale x 2 x i64> %res
+}
+
+define <vscale x 2 x i64> @lshr_nxv1i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {
+; CHECK-LABEL: lshr_nxv1i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.d
+; CHECK-NEXT: lsr z0.d, p0/m, z0.d, z1.d
+; CHECK-NEXT: ret
+ %a.nxv1 = call <vscale x 1 x i64> @llvm.vector.extract.nxv1i64.nxv2i64(<vscale x 2 x i64> %a, i64 0)
+ %b.nxv1 = call <vscale x 1 x i64> @llvm.vector.extract.nxv1i64.nxv2i64(<vscale x 2 x i64> %b, i64 0)
+ %res.nxv1 = lshr <vscale x 1 x i64> %a.nxv1, %b.nxv1
+ %res = call <vscale x 2 x i64> @llvm.vector.insert.nxv2i64.nxv1i64(<vscale x 2 x i64> poison, <vscale x 1 x i64> %res.nxv1, i64 0)
+ ret <vscale x 2 x i64> %res
+}
+
define <vscale x 16 x i8> @abs_nxv16i8(<vscale x 16 x i8> %a) {
; CHECK-LABEL: abs_nxv16i8:
; CHECK: // %bb.0:
@@ -806,7 +845,7 @@ define void @mad_in_loop(ptr %dst, ptr %src1, ptr %src2, i32 %n) {
; CHECK-LABEL: mad_in_loop:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: cmp w3, #1
-; CHECK-NEXT: b.lt .LBB73_3
+; CHECK-NEXT: b.lt .LBB76_3
; CHECK-NEXT: // %bb.1: // %for.body.preheader
; CHECK-NEXT: mov w9, w3
; CHECK-NEXT: mov z0.s, #1 // =0x1
@@ -814,7 +853,7 @@ define void @mad_in_loop(ptr %dst, ptr %src1, ptr %src2, i32 %n) {
; CHECK-NEXT: whilelo p1.s, xzr, x9
; CHECK-NEXT: mov x8, xzr
; CHECK-NEXT: cntw x10
-; CHECK-NEXT: .LBB73_2: // %vector.body
+; CHECK-NEXT: .LBB76_2: // %vector.body
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: ld1w { z1.s }, p1/z, [x1, x8, lsl #2]
; CHECK-NEXT: ld1w { z2.s }, p1/z, [x2, x8, lsl #2]
@@ -822,8 +861,8 @@ define void @mad_in_loop(ptr %dst, ptr %src1, ptr %src2, i32 %n) {
; CHECK-NEXT: st1w { z1.s }, p1, [x0, x8, lsl #2]
; CHECK-NEXT: add x8, x8, x10
; CHECK-NEXT: whilelo p1.s, x8, x9
-; CHECK-NEXT: b.mi .LBB73_2
-; CHECK-NEXT: .LBB73_3: // %for.cond.cleanup
+; CHECK-NEXT: b.mi .LBB76_2
+; CHECK-NEXT: .LBB76_3: // %for.cond.cleanup
; CHECK-NEXT: ret
entry:
%cmp9 = icmp sgt i32 %n, 0
diff --git a/llvm/test/CodeGen/AArch64/sve-int-log.ll b/llvm/test/CodeGen/AArch64/sve-int-log.ll
index 00ec235e7154d5..5c4fda0483242e 100644
--- a/llvm/test/CodeGen/AArch64/sve-int-log.ll
+++ b/llvm/test/CodeGen/AArch64/sve-int-log.ll
@@ -11,6 +11,18 @@ define <vscale x 2 x i64> @and_d(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {
ret <vscale x 2 x i64> %res
}
+define <vscale x 2 x i64> @and_nxv1i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {
+; CHECK-LABEL: and_nxv1i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: and z0.d, z0.d, z1.d
+; CHECK-NEXT: ret
+ %a.nxv1 = call <vscale x 1 x i64> @llvm.vector.extract.nxv1i64.nxv2i64(<vscale x 2 x i64> %a, i64 0)
+ %b.nxv1 = call <vscale x 1 x i64> @llvm.vector.extract.nxv1i64.nxv2i64(<vscale x 2 x i64> %b, i64 0)
+ %res.nxv1 = and <vscale x 1 x i64> %a.nxv1, %b.nxv1
+ %res = call <vscale x 2 x i64> @llvm.vector.insert.nxv2i64.nxv1i64(<vscale x 2 x i64> poison, <vscale x 1 x i64> %res.nxv1, i64 0)
+ ret <vscale x 2 x i64> %res
+}
+
define <vscale x 4 x i32> @and_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
; CHECK-LABEL: and_s:
; CHECK: // %bb.0:
@@ -191,6 +203,18 @@ define <vscale x 2 x i64> @or_d(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {
ret <vscale x 2 x i64> %res
}
+define <vscale x 2 x i64> @or_nxv1i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {
+; CHECK-LABEL: or_nxv1i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: orr z0.d, z0.d, z1.d
+; CHECK-NEXT: ret
+ %a.nxv1 = call <vscale x 1 x i64> @llvm.vector.extract.nxv1i64.nxv2i64(<vscale x 2 x i64> %a, i64 0)
+ %b.nxv1 = call <vscale x 1 x i64> @llvm.vector.extract.nxv1i64.nxv2i64(<vscale x 2 x i64> %b, i64 0)
+ %res.nxv1 = or <vscale x 1 x i64> %a.nxv1, %b.nxv1
+ %res = call <vscale x 2 x i64> @llvm.vector.insert.nxv2i64.nxv1i64(<vscale x 2 x i64> poison, <vscale x 1 x i64> %res.nxv1, i64 0)
+ ret <vscale x 2 x i64> %res
+}
+
define <vscale x 4 x i32> @or_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
; CHECK-LABEL: or_s:
; CHECK: // %bb.0:
@@ -280,6 +304,18 @@ define <vscale x 2 x i64> @xor_d(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {
ret <vscale x 2 x i64> %res
}
+define <vscale x 2 x i64> @xor_nxv1i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {
+; CHECK-LABEL: xor_nxv1i64:
+; CHECK: // %bb.0:
+; CHECK-NEXT: eor z0.d, z0.d, z1.d
+; CHECK-NEXT: ret
+ %a.nxv1 = call <vscale x 1 x i64> @llvm.vector.extract.nxv1i64.nxv2i64(<vscale x 2 x i64> %a, i64 0)
+ %b.nxv1 = call <vscale x 1 x i64> @llvm.vector.extract.nxv1i64.nxv2i64(<vscale x 2 x i64> %b, i64 0)
+ %res.nxv1 = xor <vscale x 1 x i64> %a.nxv1, %b.nxv1
+ %res = call <vscale x 2 x i64> @llvm.vector.insert.nxv2i64.nxv1i64(<vscale x 2 x i64> poison, <vscale x 1 x i64> %res.nxv1, i64 0)
+ ret <vscale x 2 x i64> %res
+}
+
define <vscale x 4 x i32> @xor_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
; CHECK-LABEL: xor_s:
; CHECK: // %bb.0:
@@ -371,14 +407,14 @@ define void @array_and_not_nxv16i8(ptr %a, <vscale x 16 x i8> %m) {
; SVE-NEXT: ptrue p0.b
; SVE-NEXT: mov x8, xzr
; SVE-NEXT: rdvl x9, #1
-; SVE-NEXT: .LBB39_1: // %vector.body
+; SVE-NEXT: .LBB42_1: // %vector.body
; SVE-NEXT: // =>This Inner Loop Header: Depth=1
; SVE-NEXT: ld1b { z1.b }, p0/z, [x0, x8]
; SVE-NEXT: bic z1.d, z1.d, z0.d
; SVE-NEXT: st1b { z1.b }, p0, [x0, x8]
; SVE-NEXT: add x8, x8, x9
; SVE-NEXT: cmp x8, #256
-; SVE-NEXT: b.ne .LBB39_1
+; SVE-NEXT: b.ne .LBB42_1
; SVE-NEXT: // %bb.2: // %for.cond.cleanup
; SVE-NEXT: ret
;
@@ -386,14 +422,14 @@ define void @array_and_not_nxv16i8(ptr %a, <vscale x 16 x i8> %m) {
; SVE2: // %bb.0: // %entry
; SVE2-NEXT: ptrue p0.b
; SVE2-NEXT: mov x8, xzr
-; SVE2-NEXT: .LBB39_1: // %vector.body
+; SVE2-NEXT: .LBB42_1: // %vector.body
; SVE2-NEXT: // =>This Inner Loop Header: Depth=1
; SVE2-NEXT: ld1b { z1.b }, p0/z, [x0, x8]
; SVE2-NEXT: bic z1.d, z1.d, z0.d
; SVE2-NEXT: st1b { z1.b }, p0, [x0, x8]
; SVE2-NEXT: incb x8
; SVE2-NEXT: cmp x8, #256
-; SVE2-NEXT: b.ne .LBB39_1
+; SVE2-NEXT: b.ne .LBB42_1
; SVE2-NEXT: // %bb.2: // %for.cond.cleanup
; SVE2-NEXT: ret
entry:
@@ -422,14 +458,14 @@ define void @array_and_not_nxv8i16(ptr %a, <vscale x 8 x i16> %m) {
; SVE-NEXT: ptrue p0.h
; SVE-NEXT: mov x8, xzr
; SVE-NEXT: cnth x9
-; SVE-NEXT: .LBB40_1: // %vector.body
+; SVE-NEXT: .LBB43_1: // %vector.body
; SVE-NEXT: // =>This Inner Loop Header: Depth=1
; SVE-NEXT: ld1h { z1.h }, p0/z, [x0, x8, lsl #1]
; SVE-NEXT: bic z1.d, z1.d, z0.d
; SVE-NEXT: st1h { z1.h }, p0, [x0, x8, lsl #1]
; SVE-NEXT: add x8, x8, x9
; SVE-NEXT: cmp x8, #256
-; SVE-NEXT: b.ne .LBB40_1
+; SVE-NEXT: b.ne .LBB43_1
; SVE-NEXT: // %bb.2: // %for.cond.cleanup
; SVE-NEXT: ret
;
@@ -437,14 +473,14 @@ define void @array_and_not_nxv8i16(ptr %a, <vscale x 8 x i16> %m) {
; SVE2: // %bb.0: // %entry
; SVE2-NEXT: ptrue p0.h
; SVE2-NEXT: mov x8, xzr
-; SVE2-NEXT: .LBB40_1: // %vector.body
+; SVE2-NEXT: .LBB43_1: // %vector.body
; SVE2-NEXT: // =>This Inner Loop Header: Depth=1
; SVE2-NEXT: ld1h { z1.h }, p0/z, [x0, x8, lsl #1]
; SVE2-NEXT: bic z1.d, z1.d, z0.d
; SVE2-NEXT: st1h { z1.h }, p0, [x0, x8, lsl #1]
; SVE2-NEXT: inch x8
; SVE2-NEXT: cmp x8, #256
-; SVE2-NEXT: b.ne .LBB40_1
+; SVE2-NEXT: b.ne .LBB43_1
; SVE2-NEXT: // %bb.2: // %for.cond.cleanup
; SVE2-NEXT: ret
entry:
@@ -473,14 +509,14 @@ define void @array_and_not_nxv4i32(ptr %a, <vscale x 4 x i32> %m) {
; SVE-NEXT: ptrue p0.s
; SVE-NEXT: mov x8, xzr
; SVE-NEXT: cntw x9
-; SVE-NEXT: .LBB41_1: // %vector.body
+; SVE-NEXT: .LBB44_1: // %vector.body
; SVE-NEXT: // =>This Inner Loop Header: Depth=1
; SVE-NEXT: ld1w { z1.s }, p0/z, [x0, x8, lsl #2]
; SVE-NEXT: bic z1.d, z1.d, z0.d
; SVE-NEXT: st1w { z1.s }, p0, [x0, x8, lsl #2]
; SVE-NEXT: add x8, x8, x9
; SVE-NEXT: cmp x8, #256
-; SVE-NEXT: b.ne .LBB41_1
+; SVE-NEXT: b.ne .LBB44_1
; SVE-NEXT: // %bb.2: // %for.cond.cleanup
; SVE-NEXT: ret
;
@@ -488,14 +524,14 @@ define void @array_and_not_nxv4i32(ptr %a, <vscale x 4 x i32> %m) {
; SVE2: // %bb.0: // %entry
; SVE2-NEXT: ptrue p0.s
; SVE2-NEXT: mov x8, xzr
-; SVE2-NEXT: .LBB41_1: // %vector.body
+; SVE2-NEXT: .LBB44_1: // %vector.body
; SVE2-NEXT: // =>This Inner Loop Header: Depth=1
; SVE2-NEXT: ld1w { z1.s }, p0/z, [x0, x8, lsl #2]
; SVE2-NEXT: bic z1.d, z1.d, z0.d
; SVE2-NEXT: st1w { z1.s }, p0, [x0, x8, lsl #2]
; SVE2-NEXT: incw x8
; SVE2-NEXT: cmp x8, #256
-; SVE2-NEXT: b.ne .LBB41_1
+; SVE2-NEXT: b.ne .LBB44_1
; SVE2-NEXT: // %bb.2: // %for.cond.cleanup
; SVE2-NEXT: ret
entry:
@@ -524,14 +560,14 @@ define void @array_and_not_nxv2i64(ptr %a, <vscale x 2 x i64> %m) {
; SVE-NEXT: ptrue p0.d
; SVE-NEXT: mov x8, xzr
; SVE-NEXT: cntd x9
-; SVE-NEXT: .LBB42_1: // %vector.body
+; SVE-NEXT: .LBB45_1: // %vector.body
; SVE-NEXT: // =>This Inner Loop Header: Depth=1
; SVE-NEXT: ld1d { z1.d }, p0/z, [x0, x8, lsl #3]
; SVE-NEXT: bic z1.d, z1.d, z0.d
; SVE-NEXT: st1d { z1.d }, p0, [x0, x8, lsl #3]
; SVE-NEXT: add x8, x8, x9
; SVE-NEXT: cmp x8, #256
-; SVE-NEXT: b.ne .LBB42_1
+; SVE-NEXT: b.ne .LBB45_1
; SVE-NEXT: // %bb.2: // %for.cond.cleanup
; SVE-NEXT: ret
;
@@ -539,14 +575,14 @@ define void @array_and_not_nxv2i64(ptr %a, <vscale x 2 x i64> %m) {
; SVE2: // %bb.0: // %entry
; SVE2-NEXT: ptrue p0.d
; SVE2-NEXT: mov x8, xzr
-; SVE2-NEXT: .LBB42_1: // %vector.body
+; SVE2-NEXT: .LBB45_1: // %vector.body
; SVE2-NEXT: // =>This Inner Loop Header: Depth=1
; SVE2-NEXT: ld1d { z1.d }, p0/z, [x0, x8, lsl #3]
; SVE2-NEXT: bic z1.d, z1.d, z0.d
; SVE2-NEXT: st1d { z1.d }, p0, [x0, x8, lsl #3]
; SVE2-NEXT: incd x8
; SVE2-NEXT: cmp x8, #256
-; SVE2-NEXT: b.ne .LBB42_1
+; SVE2-NEXT: b.ne .LBB45_1
; SVE2-NEXT: // %bb.2: // %for.cond.cleanup
; SVE2-NEXT: ret
entry:
@@ -576,14 +612,14 @@ define void @array_or_not_nxv4i32(ptr %a, <vscale x 4 x i32> %m) {
; SVE-NEXT: ptrue p0.s
; SVE-NEXT: mov x8, xzr
; SVE-NEXT: cntw x9
-; SVE-NEXT: .LBB43_1: // %vector.body
+; SVE-NEXT: .LBB46_1: // %vector.body
; SVE-NEXT: // =>This Inner Loop Header: Depth=1
; SVE-NEXT: ld1w { z1.s }, p0/z, [x0, x8, lsl #2]
; SVE-NEXT: orr z1.d, z1.d, z0.d
; SVE-NEXT: st1w { z1.s }, p0, [x0, x8, lsl #2]
; SVE-NEXT: add x8, x8, x9
; SVE-NEXT: cmp x8, #256
-; SVE-NEXT: b.ne .LBB43_1
+; SVE-NEXT: b.ne .LBB46_1
; SVE-NEXT: // %bb.2: // %for.cond.cleanup
; SVE-NEXT: ret
;
@@ -592,14 +628,14 @@ define void @array_or_not_nxv4i32(ptr %a, <vscale x 4 x i32> %m) {
; SVE2-NEXT: subr z0.b, z0.b, #255 // =0xff
; SVE2-NEXT: ptrue p0.s
; SVE2-NEXT: mov x8, xzr
-; SVE2-NEXT: .LBB43_1: // %vector.body
+; SVE2-NEXT: .LBB46_1: // %vector.body
; SVE2-NEXT: // =>This Inner Loop Header: Depth=1
; SVE2-NEXT: ld1w { z1.s }, p0/z, [x0, x8, lsl #2]
; SVE2-NEXT: orr z1.d, z1.d, z0.d
; SVE2-NEXT: st1w { z1.s }, p0, [x0, x8, lsl #2]
; SVE2-NEXT: incw x8
; SVE2-NEXT: cmp x8, #256
-; SVE2-NEXT: b.ne .LBB43_1
+; SVE2-NEXT: b.ne .LBB46_1
; SVE2-NEXT: // %bb.2: // %for.cond.cleanup
; SVE2-NEXT: ret
entry:
@@ -629,14 +665,14 @@ define void @array_xor_not_nxv4i32(ptr %a, <vscale x 4 x i32> %m) {
; SVE-NEXT: ptrue p0.s
; SVE-NEXT: mov x8, xzr
; SVE-NEXT: cntw x9
-; SVE-NEXT: .LBB44_1: // %vector.body
+; SVE-NEXT: .LBB47_1: // %vector.body
; SVE-NEXT: // =>This Inner Loop Header: Depth=1
; SVE-NEXT: ld1w { z1.s }, p0/z, [x0, x8, lsl #2]
; SVE-NEXT: eor z1.d, z1.d, z0.d
; SVE-NEXT: st1w { z1.s }, p0, [x0, x8, lsl #2]
; SVE-NEXT: add x8, x8, x9
; SVE-NEXT: cmp x8, #256
-; SVE-NEXT: b.ne .LBB44_1
+; SVE-NEXT: b.ne .LBB47_1
; SVE-NEXT: // %bb.2: // %for.cond.cleanup
; SVE-NEXT: ret
;
@@ -644,14 +680,14 @@ define void @array_xor_not_nxv4i32(ptr %a, <vscale x 4 x i32> %m) {
; SVE2: // %bb.0: // %entry
; SVE2-NEXT: ptrue p0.s
; SVE2-NEXT: mov x8, xzr
-; SVE2-NEXT: .LBB44_1: // %vector.body
+; SVE2-NEXT: .LBB47_1: // %vector.body
; SVE2-NEXT: // =>This Inner Loop Header: Depth=1
; SVE2-NEXT: ld1w { z1.s }, p0/z, [x0, x8, lsl #2]
; SVE2-NEXT: bsl2n z1.d, z1.d, z1.d, z0.d
; SVE2-NEXT: st1w { z1.s }, p0, [x0, x8, lsl #2]
; SVE2-NEXT: incw x8
; SVE2-NEXT: cmp x8, #256
-; SVE2-NEXT: b.ne .LBB44_1
+; SVE2-NEXT: b.ne .LBB47_1
; SVE2-NEXT: // %bb.2: // %for.cond.cleanup
; SVE2-NEXT: ret
entry:
@@ -679,14 +715,14 @@ define void @array_xor_not_v4i32(ptr %a, <4 x i32> %m) {
; SVE: // %bb.0: // %entry
; SVE-NEXT: mvn v0.16b, v0.16b
; SVE-NEXT: mov x8, xzr
-; SVE-NEXT: .LBB45_1: // %for.body
+; SVE-NEXT: .LBB48_1: // %for.body
; SVE-NEXT: // =>This Inner Loop Header: Depth=1
; SVE-NEXT: ldr q1, [x0, x8]
; SVE-NEXT: eor v1.16b, v1.16b, v0.16b
; SVE-NEXT: str q1, [x0, x8]
; SVE-NEXT: add x8, x8, #16
; SVE-NEXT: cmp x8, #1, lsl #12 // =4096
-; SVE-NEXT: b.ne .LBB45_1
+; SVE-NEXT: b.ne .LBB48_1
; SVE-NEXT: // %bb.2: // %for.cond.cleanup
; SVE-NEXT: ret
;
@@ -694,14 +730,14 @@ define void @array_xor_not_v4i32(ptr %a, <4 x i32> %m) {
; SVE2: // %bb.0: // %entry
; SVE2-NEXT: mov x8, xzr
; SVE2-NEXT: // kill: def $q0 killed $q0 def $z0
-; SVE2-NEXT: .LBB45_1: // %for.body
+; SVE2-NEXT: .LBB48_1: // %for.body
; SVE2-NEXT: // =>This Inner Loop Header: Depth=1
; SVE2-NEXT: ldr q1, [x0, x8]
; SVE2-NEXT: bsl2n z1.d, z1.d, z1.d, z0.d
; SVE2-NEXT: str q1, [x0, x8]
; SVE2-NEXT: add x8, x8, #16
; SVE2-NEXT: cmp x8, #1, lsl #12 // =4096
-; SVE2-NEXT: b.ne .LBB45_1
+; SVE2-NEXT: b.ne .LBB48_1
; SVE2-NEXT: // %bb.2: // %for.cond.cleanup
; SVE2-NEXT: ret
entry:
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/invalid-costs.ll b/llvm/test/Transforms/LoopVectorize/AArch64/invalid-costs.ll
index 2e83614f1f529d..c7b78369a243f2 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/invalid-costs.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/invalid-costs.ll
@@ -4,7 +4,6 @@
target triple = "arm64-apple-macosx"
-; REMARKS: Recipe with invalid costs prevented vectorization at VF=(vscale x 1): ashr
; REMARKS: Recipe with invalid costs prevented vectorization at VF=(vscale x 1): call to llvm.masked.sdiv
; Test case for https://github.com/llvm/llvm-project/issues/160792.
define void @replicate_sdiv_conditional(ptr noalias %a, ptr noalias %b, ptr noalias %c) #0 {
>From 597ae7aa27bdb0f3ef14ed27dd670ac7ffeb8e16 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ga=C3=ABtan=20Bossu?= <gaetan.bossu at arm.com>
Date: Fri, 25 Sep 2026 12:24:51 +0000
Subject: [PATCH 2/2] Use poison instead of undef
---
.../CostModel/AArch64/sve-arith-overflow.ll | 120 +++++------
.../Analysis/CostModel/AArch64/sve-arith.ll | 200 +++++++++---------
2 files changed, 160 insertions(+), 160 deletions(-)
diff --git a/llvm/test/Analysis/CostModel/AArch64/sve-arith-overflow.ll b/llvm/test/Analysis/CostModel/AArch64/sve-arith-overflow.ll
index 7dc280507379c1..9f34ce95235ee9 100644
--- a/llvm/test/Analysis/CostModel/AArch64/sve-arith-overflow.ll
+++ b/llvm/test/Analysis/CostModel/AArch64/sve-arith-overflow.ll
@@ -5,103 +5,103 @@ target triple = "aarch64-unknown-linux-gnu"
define void @sadd_with_overflow() #0 {
; CHECK-LABEL: 'sadd_with_overflow'
-; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.sadd.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
-; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.sadd.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
-; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.sadd.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
-; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.sadd.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.sadd.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.sadd.with.overflow.nxv16i8(<vscale x 16 x i8> poison, <vscale x 16 x i8> poison)
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.sadd.with.overflow.nxv8i16(<vscale x 8 x i16> poison, <vscale x 8 x i16> poison)
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.sadd.with.overflow.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> poison)
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.sadd.with.overflow.nxv2i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> poison)
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.sadd.with.overflow.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> poison)
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
- %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.sadd.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
- %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.sadd.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
- %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.sadd.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
- %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.sadd.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
- %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.sadd.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+ %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.sadd.with.overflow.nxv16i8(<vscale x 16 x i8> poison, <vscale x 16 x i8> poison)
+ %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.sadd.with.overflow.nxv8i16(<vscale x 8 x i16> poison, <vscale x 8 x i16> poison)
+ %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.sadd.with.overflow.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> poison)
+ %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.sadd.with.overflow.nxv2i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> poison)
+ %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.sadd.with.overflow.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> poison)
ret void
}
define void @uadd_with_overflow() #0 {
; CHECK-LABEL: 'uadd_with_overflow'
-; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.uadd.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
-; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.uadd.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
-; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.uadd.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
-; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.uadd.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.uadd.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.uadd.with.overflow.nxv16i8(<vscale x 16 x i8> poison, <vscale x 16 x i8> poison)
+; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.uadd.with.overflow.nxv8i16(<vscale x 8 x i16> poison, <vscale x 8 x i16> poison)
+; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.uadd.with.overflow.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> poison)
+; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.uadd.with.overflow.nxv2i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> poison)
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.uadd.with.overflow.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> poison)
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
- %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.uadd.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
- %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.uadd.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
- %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.uadd.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
- %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.uadd.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
- %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.uadd.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+ %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.uadd.with.overflow.nxv16i8(<vscale x 16 x i8> poison, <vscale x 16 x i8> poison)
+ %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.uadd.with.overflow.nxv8i16(<vscale x 8 x i16> poison, <vscale x 8 x i16> poison)
+ %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.uadd.with.overflow.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> poison)
+ %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.uadd.with.overflow.nxv2i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> poison)
+ %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.uadd.with.overflow.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> poison)
ret void
}
define void @ssub_with_overflow() #0 {
; CHECK-LABEL: 'ssub_with_overflow'
-; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.ssub.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
-; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.ssub.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
-; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.ssub.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
-; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.ssub.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.ssub.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.ssub.with.overflow.nxv16i8(<vscale x 16 x i8> poison, <vscale x 16 x i8> poison)
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.ssub.with.overflow.nxv8i16(<vscale x 8 x i16> poison, <vscale x 8 x i16> poison)
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.ssub.with.overflow.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> poison)
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.ssub.with.overflow.nxv2i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> poison)
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.ssub.with.overflow.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> poison)
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
- %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.ssub.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
- %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.ssub.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
- %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.ssub.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
- %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.ssub.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
- %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.ssub.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+ %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.ssub.with.overflow.nxv16i8(<vscale x 16 x i8> poison, <vscale x 16 x i8> poison)
+ %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.ssub.with.overflow.nxv8i16(<vscale x 8 x i16> poison, <vscale x 8 x i16> poison)
+ %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.ssub.with.overflow.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> poison)
+ %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.ssub.with.overflow.nxv2i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> poison)
+ %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.ssub.with.overflow.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> poison)
ret void
}
define void @usub_with_overflow() #0 {
; CHECK-LABEL: 'usub_with_overflow'
-; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.usub.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
-; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.usub.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
-; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.usub.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
-; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.usub.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.usub.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.usub.with.overflow.nxv16i8(<vscale x 16 x i8> poison, <vscale x 16 x i8> poison)
+; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.usub.with.overflow.nxv8i16(<vscale x 8 x i16> poison, <vscale x 8 x i16> poison)
+; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.usub.with.overflow.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> poison)
+; CHECK-NEXT: Cost Model: Found costs of 2 for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.usub.with.overflow.nxv2i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> poison)
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.usub.with.overflow.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> poison)
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
- %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.usub.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
- %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.usub.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
- %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.usub.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
- %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.usub.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
- %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.usub.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+ %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.usub.with.overflow.nxv16i8(<vscale x 16 x i8> poison, <vscale x 16 x i8> poison)
+ %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.usub.with.overflow.nxv8i16(<vscale x 8 x i16> poison, <vscale x 8 x i16> poison)
+ %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.usub.with.overflow.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> poison)
+ %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.usub.with.overflow.nxv2i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> poison)
+ %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.usub.with.overflow.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> poison)
ret void
}
define void @smul_with_overflow() #0 {
; CHECK-LABEL: 'smul_with_overflow'
-; CHECK-NEXT: Cost Model: Found costs of 12 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.smul.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
-; CHECK-NEXT: Cost Model: Found costs of 12 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
-; CHECK-NEXT: Cost Model: Found costs of 12 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of 12 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.smul.with.overflow.nxv16i8(<vscale x 16 x i8> poison, <vscale x 16 x i8> poison)
+; CHECK-NEXT: Cost Model: Found costs of 12 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i16(<vscale x 8 x i16> poison, <vscale x 8 x i16> poison)
+; CHECK-NEXT: Cost Model: Found costs of 12 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> poison)
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> poison)
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> poison)
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
- %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.smul.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
- %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
- %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
- %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
- %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+ %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.smul.with.overflow.nxv16i8(<vscale x 16 x i8> poison, <vscale x 16 x i8> poison)
+ %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i16(<vscale x 8 x i16> poison, <vscale x 8 x i16> poison)
+ %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> poison)
+ %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> poison)
+ %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> poison)
ret void
}
define void @umul_with_overflow() #0 {
; CHECK-LABEL: 'umul_with_overflow'
-; CHECK-NEXT: Cost Model: Found costs of 11 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.umul.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
-; CHECK-NEXT: Cost Model: Found costs of 11 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.umul.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
-; CHECK-NEXT: Cost Model: Found costs of 11 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.umul.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.umul.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.umul.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+; CHECK-NEXT: Cost Model: Found costs of 11 for: %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.umul.with.overflow.nxv16i8(<vscale x 16 x i8> poison, <vscale x 16 x i8> poison)
+; CHECK-NEXT: Cost Model: Found costs of 11 for: %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.umul.with.overflow.nxv8i16(<vscale x 8 x i16> poison, <vscale x 8 x i16> poison)
+; CHECK-NEXT: Cost Model: Found costs of 11 for: %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.umul.with.overflow.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> poison)
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.umul.with.overflow.nxv2i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> poison)
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.umul.with.overflow.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> poison)
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
- %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.umul.with.overflow.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i8> undef)
- %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.umul.with.overflow.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i16> undef)
- %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.umul.with.overflow.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i32> undef)
- %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.umul.with.overflow.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i64> undef)
- %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.umul.with.overflow.nxv1i64(<vscale x 1 x i64> undef, <vscale x 1 x i64> undef)
+ %nxv16i8 = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.umul.with.overflow.nxv16i8(<vscale x 16 x i8> poison, <vscale x 16 x i8> poison)
+ %nxv8i16 = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.umul.with.overflow.nxv8i16(<vscale x 8 x i16> poison, <vscale x 8 x i16> poison)
+ %nxv4i32 = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.umul.with.overflow.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> poison)
+ %nxv2i64 = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.umul.with.overflow.nxv2i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> poison)
+ %nxv1i64 = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.umul.with.overflow.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> poison)
ret void
}
diff --git a/llvm/test/Analysis/CostModel/AArch64/sve-arith.ll b/llvm/test/Analysis/CostModel/AArch64/sve-arith.ll
index 4a88b088daff29..8c881c03cfcd72 100644
--- a/llvm/test/Analysis/CostModel/AArch64/sve-arith.ll
+++ b/llvm/test/Analysis/CostModel/AArch64/sve-arith.ll
@@ -68,126 +68,126 @@ entry:
define void @scalable_and() #0 {
; CHECK-LABEL: 'scalable_and'
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = and <vscale x 16 x i8> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = and <vscale x 8 x i16> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = and <vscale x 4 x i32> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = and <vscale x 2 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = and <vscale x 1 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = and <vscale x 2 x i128> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = and <vscale x 16 x i8> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = and <vscale x 8 x i16> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = and <vscale x 4 x i32> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = and <vscale x 2 x i64> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = and <vscale x 1 x i64> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = and <vscale x 2 x i128> poison, poison
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
entry:
- %nxv16i8 = and <vscale x 16 x i8> undef, undef
- %nxv8i16 = and <vscale x 8 x i16> undef, undef
- %nxv4i32 = and <vscale x 4 x i32> undef, undef
- %nxv2i64 = and <vscale x 2 x i64> undef, undef
- %nxv1i64 = and <vscale x 1 x i64> undef, undef
- %nxv2i128 = and <vscale x 2 x i128> undef, undef
+ %nxv16i8 = and <vscale x 16 x i8> poison, poison
+ %nxv8i16 = and <vscale x 8 x i16> poison, poison
+ %nxv4i32 = and <vscale x 4 x i32> poison, poison
+ %nxv2i64 = and <vscale x 2 x i64> poison, poison
+ %nxv1i64 = and <vscale x 1 x i64> poison, poison
+ %nxv2i128 = and <vscale x 2 x i128> poison, poison
ret void
}
define void @scalable_or() #0 {
; CHECK-LABEL: 'scalable_or'
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = or <vscale x 16 x i8> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = or <vscale x 8 x i16> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = or <vscale x 4 x i32> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = or <vscale x 2 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = or <vscale x 1 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = or <vscale x 2 x i128> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = or <vscale x 16 x i8> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = or <vscale x 8 x i16> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = or <vscale x 4 x i32> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = or <vscale x 2 x i64> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = or <vscale x 1 x i64> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = or <vscale x 2 x i128> poison, poison
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
entry:
- %nxv16i8 = or <vscale x 16 x i8> undef, undef
- %nxv8i16 = or <vscale x 8 x i16> undef, undef
- %nxv4i32 = or <vscale x 4 x i32> undef, undef
- %nxv2i64 = or <vscale x 2 x i64> undef, undef
- %nxv1i64 = or <vscale x 1 x i64> undef, undef
- %nxv2i128 = or <vscale x 2 x i128> undef, undef
+ %nxv16i8 = or <vscale x 16 x i8> poison, poison
+ %nxv8i16 = or <vscale x 8 x i16> poison, poison
+ %nxv4i32 = or <vscale x 4 x i32> poison, poison
+ %nxv2i64 = or <vscale x 2 x i64> poison, poison
+ %nxv1i64 = or <vscale x 1 x i64> poison, poison
+ %nxv2i128 = or <vscale x 2 x i128> poison, poison
ret void
}
define void @scalable_xor() #0 {
; CHECK-LABEL: 'scalable_xor'
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = xor <vscale x 16 x i8> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = xor <vscale x 8 x i16> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = xor <vscale x 4 x i32> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = xor <vscale x 2 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = xor <vscale x 1 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = xor <vscale x 2 x i128> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = xor <vscale x 16 x i8> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = xor <vscale x 8 x i16> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = xor <vscale x 4 x i32> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = xor <vscale x 2 x i64> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = xor <vscale x 1 x i64> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = xor <vscale x 2 x i128> poison, poison
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
entry:
- %nxv16i8 = xor <vscale x 16 x i8> undef, undef
- %nxv8i16 = xor <vscale x 8 x i16> undef, undef
- %nxv4i32 = xor <vscale x 4 x i32> undef, undef
- %nxv2i64 = xor <vscale x 2 x i64> undef, undef
- %nxv1i64 = xor <vscale x 1 x i64> undef, undef
- %nxv2i128 = xor <vscale x 2 x i128> undef, undef
+ %nxv16i8 = xor <vscale x 16 x i8> poison, poison
+ %nxv8i16 = xor <vscale x 8 x i16> poison, poison
+ %nxv4i32 = xor <vscale x 4 x i32> poison, poison
+ %nxv2i64 = xor <vscale x 2 x i64> poison, poison
+ %nxv1i64 = xor <vscale x 1 x i64> poison, poison
+ %nxv2i128 = xor <vscale x 2 x i128> poison, poison
ret void
}
define void @scalable_ashr() #0 {
; CHECK-LABEL: 'scalable_ashr'
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = ashr <vscale x 16 x i8> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = ashr <vscale x 8 x i16> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = ashr <vscale x 4 x i32> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = ashr <vscale x 2 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = ashr <vscale x 1 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = ashr <vscale x 2 x i128> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = ashr <vscale x 16 x i8> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = ashr <vscale x 8 x i16> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = ashr <vscale x 4 x i32> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = ashr <vscale x 2 x i64> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = ashr <vscale x 1 x i64> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = ashr <vscale x 2 x i128> poison, poison
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
entry:
- %nxv16i8 = ashr <vscale x 16 x i8> undef, undef
- %nxv8i16 = ashr <vscale x 8 x i16> undef, undef
- %nxv4i32 = ashr <vscale x 4 x i32> undef, undef
- %nxv2i64 = ashr <vscale x 2 x i64> undef, undef
- %nxv1i64 = ashr <vscale x 1 x i64> undef, undef
- %nxv2i128 = ashr <vscale x 2 x i128> undef, undef
+ %nxv16i8 = ashr <vscale x 16 x i8> poison, poison
+ %nxv8i16 = ashr <vscale x 8 x i16> poison, poison
+ %nxv4i32 = ashr <vscale x 4 x i32> poison, poison
+ %nxv2i64 = ashr <vscale x 2 x i64> poison, poison
+ %nxv1i64 = ashr <vscale x 1 x i64> poison, poison
+ %nxv2i128 = ashr <vscale x 2 x i128> poison, poison
ret void
}
define void @scalable_lshr() #0 {
; CHECK-LABEL: 'scalable_lshr'
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = lshr <vscale x 16 x i8> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = lshr <vscale x 8 x i16> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = lshr <vscale x 4 x i32> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = lshr <vscale x 2 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = lshr <vscale x 1 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = lshr <vscale x 2 x i128> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = lshr <vscale x 16 x i8> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = lshr <vscale x 8 x i16> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = lshr <vscale x 4 x i32> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = lshr <vscale x 2 x i64> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = lshr <vscale x 1 x i64> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = lshr <vscale x 2 x i128> poison, poison
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
entry:
- %nxv16i8 = lshr <vscale x 16 x i8> undef, undef
- %nxv8i16 = lshr <vscale x 8 x i16> undef, undef
- %nxv4i32 = lshr <vscale x 4 x i32> undef, undef
- %nxv2i64 = lshr <vscale x 2 x i64> undef, undef
- %nxv1i64 = lshr <vscale x 1 x i64> undef, undef
- %nxv2i128 = lshr <vscale x 2 x i128> undef, undef
+ %nxv16i8 = lshr <vscale x 16 x i8> poison, poison
+ %nxv8i16 = lshr <vscale x 8 x i16> poison, poison
+ %nxv4i32 = lshr <vscale x 4 x i32> poison, poison
+ %nxv2i64 = lshr <vscale x 2 x i64> poison, poison
+ %nxv1i64 = lshr <vscale x 1 x i64> poison, poison
+ %nxv2i128 = lshr <vscale x 2 x i128> poison, poison
ret void
}
define void @scalable_shl() #0 {
; CHECK-LABEL: 'scalable_shl'
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = shl <vscale x 16 x i8> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = shl <vscale x 8 x i16> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = shl <vscale x 4 x i32> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = shl <vscale x 2 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = shl <vscale x 1 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = shl <vscale x 2 x i128> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv16i8 = shl <vscale x 16 x i8> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv8i16 = shl <vscale x 8 x i16> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv4i32 = shl <vscale x 4 x i32> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv2i64 = shl <vscale x 2 x i64> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 1 for: %nxv1i64 = shl <vscale x 1 x i64> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv2i128 = shl <vscale x 2 x i128> poison, poison
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
entry:
- %nxv16i8 = shl <vscale x 16 x i8> undef, undef
- %nxv8i16 = shl <vscale x 8 x i16> undef, undef
- %nxv4i32 = shl <vscale x 4 x i32> undef, undef
- %nxv2i64 = shl <vscale x 2 x i64> undef, undef
- %nxv1i64 = shl <vscale x 1 x i64> undef, undef
- %nxv2i128 = shl <vscale x 2 x i128> undef, undef
+ %nxv16i8 = shl <vscale x 16 x i8> poison, poison
+ %nxv8i16 = shl <vscale x 8 x i16> poison, poison
+ %nxv4i32 = shl <vscale x 4 x i32> poison, poison
+ %nxv2i64 = shl <vscale x 2 x i64> poison, poison
+ %nxv1i64 = shl <vscale x 1 x i64> poison, poison
+ %nxv2i128 = shl <vscale x 2 x i128> poison, poison
ret void
}
@@ -198,7 +198,7 @@ define void @scalable_sdiv() #0 {
; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:16 Lat:16 SizeLat:16 for: %nxv8i16 = sdiv <vscale x 8 x i16> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %nxv4i32 = sdiv <vscale x 4 x i32> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %nxv2i64 = sdiv <vscale x 2 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = sdiv <vscale x 1 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = sdiv <vscale x 1 x i64> poison, poison
; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %nxv2i128 = sdiv <vscale x 2 x i128> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
@@ -207,7 +207,7 @@ entry:
%nxv8i16 = sdiv <vscale x 8 x i16> undef, undef
%nxv4i32 = sdiv <vscale x 4 x i32> undef, undef
%nxv2i64 = sdiv <vscale x 2 x i64> undef, undef
- %nxv1i64 = sdiv <vscale x 1 x i64> undef, undef
+ %nxv1i64 = sdiv <vscale x 1 x i64> poison, poison
%nxv2i128 = sdiv <vscale x 2 x i128> undef, undef
ret void
@@ -219,7 +219,7 @@ define void @scalable_udiv() #0 {
; CHECK-NEXT: Cost Model: Found costs of RThru:8 CodeSize:16 Lat:16 SizeLat:16 for: %nxv8i16 = udiv <vscale x 8 x i16> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %nxv4i32 = udiv <vscale x 4 x i32> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:2 CodeSize:4 Lat:4 SizeLat:4 for: %nxv2i64 = udiv <vscale x 2 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = udiv <vscale x 1 x i64> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = udiv <vscale x 1 x i64> poison, poison
; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %nxv2i128 = udiv <vscale x 2 x i128> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
@@ -228,7 +228,7 @@ entry:
%nxv8i16 = udiv <vscale x 8 x i16> undef, undef
%nxv4i32 = udiv <vscale x 4 x i32> undef, undef
%nxv2i64 = udiv <vscale x 2 x i64> undef, undef
- %nxv1i64 = udiv <vscale x 1 x i64> undef, undef
+ %nxv1i64 = udiv <vscale x 1 x i64> poison, poison
%nxv2i128 = udiv <vscale x 2 x i128> undef, undef
ret void
@@ -236,42 +236,42 @@ entry:
define void @scalable_srem() #0 {
; CHECK-LABEL: 'scalable_srem'
-; CHECK-NEXT: Cost Model: Found costs of RThru:18 CodeSize:4 Lat:4 SizeLat:4 for: %nxv16i8 = srem <vscale x 16 x i8> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %nxv8i16 = srem <vscale x 8 x i16> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv4i32 = srem <vscale x 4 x i32> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv2i64 = srem <vscale x 2 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = srem <vscale x 1 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %nxv2i128 = srem <vscale x 2 x i128> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of RThru:18 CodeSize:4 Lat:4 SizeLat:4 for: %nxv16i8 = srem <vscale x 16 x i8> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %nxv8i16 = srem <vscale x 8 x i16> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv4i32 = srem <vscale x 4 x i32> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv2i64 = srem <vscale x 2 x i64> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = srem <vscale x 1 x i64> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %nxv2i128 = srem <vscale x 2 x i128> poison, poison
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
entry:
- %nxv16i8 = srem <vscale x 16 x i8> undef, undef
- %nxv8i16 = srem <vscale x 8 x i16> undef, undef
- %nxv4i32 = srem <vscale x 4 x i32> undef, undef
- %nxv2i64 = srem <vscale x 2 x i64> undef, undef
- %nxv1i64 = srem <vscale x 1 x i64> undef, undef
- %nxv2i128 = srem <vscale x 2 x i128> undef, undef
+ %nxv16i8 = srem <vscale x 16 x i8> poison, poison
+ %nxv8i16 = srem <vscale x 8 x i16> poison, poison
+ %nxv4i32 = srem <vscale x 4 x i32> poison, poison
+ %nxv2i64 = srem <vscale x 2 x i64> poison, poison
+ %nxv1i64 = srem <vscale x 1 x i64> poison, poison
+ %nxv2i128 = srem <vscale x 2 x i128> poison, poison
ret void
}
define void @scalable_urem() #0 {
; CHECK-LABEL: 'scalable_urem'
-; CHECK-NEXT: Cost Model: Found costs of RThru:18 CodeSize:4 Lat:4 SizeLat:4 for: %nxv16i8 = urem <vscale x 16 x i8> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %nxv8i16 = urem <vscale x 8 x i16> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv4i32 = urem <vscale x 4 x i32> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv2i64 = urem <vscale x 2 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = urem <vscale x 1 x i64> undef, undef
-; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %nxv2i128 = urem <vscale x 2 x i128> undef, undef
+; CHECK-NEXT: Cost Model: Found costs of RThru:18 CodeSize:4 Lat:4 SizeLat:4 for: %nxv16i8 = urem <vscale x 16 x i8> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of RThru:10 CodeSize:4 Lat:4 SizeLat:4 for: %nxv8i16 = urem <vscale x 8 x i16> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv4i32 = urem <vscale x 4 x i32> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of 4 for: %nxv2i64 = urem <vscale x 2 x i64> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of Invalid for: %nxv1i64 = urem <vscale x 1 x i64> poison, poison
+; CHECK-NEXT: Cost Model: Found costs of RThru:Invalid CodeSize:4 Lat:4 SizeLat:4 for: %nxv2i128 = urem <vscale x 2 x i128> poison, poison
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
entry:
- %nxv16i8 = urem <vscale x 16 x i8> undef, undef
- %nxv8i16 = urem <vscale x 8 x i16> undef, undef
- %nxv4i32 = urem <vscale x 4 x i32> undef, undef
- %nxv2i64 = urem <vscale x 2 x i64> undef, undef
- %nxv1i64 = urem <vscale x 1 x i64> undef, undef
- %nxv2i128 = urem <vscale x 2 x i128> undef, undef
+ %nxv16i8 = urem <vscale x 16 x i8> poison, poison
+ %nxv8i16 = urem <vscale x 8 x i16> poison, poison
+ %nxv4i32 = urem <vscale x 4 x i32> poison, poison
+ %nxv2i64 = urem <vscale x 2 x i64> poison, poison
+ %nxv1i64 = urem <vscale x 1 x i64> poison, poison
+ %nxv2i128 = urem <vscale x 2 x i128> poison, poison
ret void
}
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