[llvm] [AMDGPU] Exclude gfx1251 (w/ FullRate64Ops) from using GFX1250VALUBlockingCycles. (PR #226314)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 25 04:50:29 PDT 2026
================
@@ -1024,8 +1024,11 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
}
/// True if VALU pipe occupancy is modeled with GFX1250BlockingCycles
- /// (gfx1250 pipeline property, not gfx1250 ISA feature).
- bool hasGFX1250VALUBlockingCycles() const { return AMDGPU::isGFX1250(*this); }
+ /// (gfx1250 pipeline property, not gfx1250 ISA feature). Full-rate 64-bit
+ /// chips (gfx1251) do not use this occupancy table.
+ bool hasGFX1250VALUBlockingCycles() const {
+ return AMDGPU::isGFX1250(*this) && !hasFullRate64Ops();
----------------
arsenm wrote:
Shouldn't use the AMDGPU:: predicates, this is already the subtarget. This also really should be its own feature. The 1250 in the name is confusing given it applies more broadly
https://github.com/llvm/llvm-project/pull/226314
More information about the llvm-commits
mailing list