[llvm] [SystemZ] Expand and automate .insn directive coverage (PR #222031)

[Ulrich Weigand via llvm-commits]

uweigand wrote:

The new logic to support optional operands makes the patch a bit unwieldy again.   I'm wondering if it isn't possible to get back to a single insn definition per format.  The only place that needs to handle optional operands is the AsmParser, and there you have special code anyway.  (For the disassembler, if appropriate, it would be best to always display all operands anyway.)

Could you change the `InsnMatchEntry` record to add a field holding the number of optional operands (in addition to the total number of operands)?   Then the AsmParser code should be able to handle optional operands without requiring multiple `InsnMatchEntry` records.  (We would have to hard-code the default value for missing fields, but I think that's fine - the default is always zero anyway.)

The question is, how the tablegen pass would determine this number.   I could think of either an extra field in the .td records, e.g. something like
```
let NumOptionalOperands = 2 in
  def InsnRRFa : InstRRFa<0, (outs),
                            (ins imm64zx32:$enc, AnyReg:$R1, AnyReg:$R2, AnyReg:$R3,
                                 imm32zx4:$M4),
                            ".insn rrf_a,$enc,$R1,$R2,$R3,$M4", []>;
```

or maybe have some marker in the format string that gets parsed by the tablegen pass ...

https://github.com/llvm/llvm-project/pull/222031