[llvm] [X86] Fix failure to lower i8/i16 bzhi pattern to bzhi (PR #226401)

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git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp --diff_from_common_commit
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``````````diff
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index 75dd37d52..fe3fc3e0d 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -4250,9 +4250,8 @@ bool X86DAGToDAGISel::matchBitExtract(SDNode *Node) {
 
   // Try to match potentially-truncated shift amount as `(bitwidth - y)`,
   // or leave the shift amount as-is, but then we'll have to negate it.
-  auto canonicalizeShiftAmt = [&NBits, &NegateNBits,
-                               &MatchedBitwidth](SDValue ShiftAmt,
-                                                 unsigned Bitwidth) {
+  auto canonicalizeShiftAmt = [&NBits, &NegateNBits, &MatchedBitwidth](
+                                  SDValue ShiftAmt, unsigned Bitwidth) {
     MatchedBitwidth = Bitwidth;
     NBits = ShiftAmt;
     NegateNBits = true;
@@ -4413,8 +4412,7 @@ bool X86DAGToDAGISel::matchBitExtract(SDNode *Node) {
   // We might have matched the amount of high bits to be cleared,
   // but we want the amount of low bits to be kept, so negate it then.
   if (NegateNBits) {
-    SDValue BitWidthC =
-        CurDAG->getConstant(MatchedBitwidth, DL, MVT::i32);
+    SDValue BitWidthC = CurDAG->getConstant(MatchedBitwidth, DL, MVT::i32);
     insertDAGNode(*CurDAG, SDValue(Node, 0), BitWidthC);
 
     NBits = CurDAG->getNode(ISD::SUB, DL, MVT::i32, BitWidthC, NBits);

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https://github.com/llvm/llvm-project/pull/226401