[llvm] [AMDGPU] Fix dynamic LDS consistency check in setDynLDSAlign (PR #225825)
Lei Zhang via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 24 22:54:32 PDT 2026
https://github.com/antiagainst updated https://github.com/llvm/llvm-project/pull/225825
>From 0564d715b4e3e22747fe6222b93b190a1ff8ae4f Mon Sep 17 00:00:00 2001
From: Lei Zhang <antiagainst at gmail.com>
Date: Wed, 23 Sep 2026 08:32:54 -0700
Subject: [PATCH 1/3] [AMDGPU] Fix dynamic LDS consistency check in
setDynLDSAlign
5bf967cb132b ("[RFC][AMDGPU] Add BARRIER address space") changed the
absolute-address check in `setDynLDSAlign` to read the dynamic LDS global
being lowered (`GV`) instead of the kernel's representative
`llvm.amdgcn.<kernel>.dynlds` variable (`Dyn`).
`amdgpu-lower-module-lds` attaches `!absolute_symbol` only to the
representative; uses of the original dynamic LDS global inside the
kernel are left in place and never carry that metadata. As a result, a
kernel that accesses dynamic LDS both directly and through a non-inlined
callee now aborts with "Inconsistent metadata on dynamic LDS variable".
---
.../AMDGPU/AMDGPUMachineFunctionInfo.cpp | 2 +-
.../lds-dynamic-direct-and-indirect-use.ll | 28 +++++++++++++++++++
2 files changed, 29 insertions(+), 1 deletion(-)
create mode 100644 llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
index 22e9d8ae06b4f9..ea8265a2aae124 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
@@ -235,7 +235,7 @@ void AMDGPUMachineFunctionInfo::setDynLDSAlign(const Function &F,
if (Dyn) {
unsigned Offset = LDSSize; // return this?
std::optional<uint32_t> Expect =
- get32BitAbsoluteAddress(GV, AMDGPUAS::LOCAL_ADDRESS);
+ get32BitAbsoluteAddress(*Dyn, AMDGPUAS::LOCAL_ADDRESS);
if (!Expect || (Offset != *Expect)) {
report_fatal_error("Inconsistent metadata on dynamic LDS variable");
}
diff --git a/llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll b/llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll
new file mode 100644
index 00000000000000..445dc04ca87d3e
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll
@@ -0,0 +1,28 @@
+; RUN: llc -mtriple=amdgpu9.42-amd-amdhsa < %s | FileCheck %s
+; RUN: llc -mtriple=amdgpu9.42-amd-amdhsa -global-isel < %s | FileCheck %s
+
+; A kernel that accesses a dynamic LDS variable both directly and through a
+; non-inlined callee. amdgpu-lower-module-lds rewrites only the callee's uses
+; to go through llvm.amdgcn.dynlds.offset.table and gives the per-kernel
+; llvm.amdgcn.kernel.dynlds variable absolute_symbol metadata. The kernel's
+; direct use still refers to the original @dynlds, which has no such metadata.
+
+ at dynlds = external addrspace(3) global [0 x i8], align 16
+
+; CHECK-LABEL: helper:
+; CHECK: llvm.amdgcn.dynlds.offset.table at rel32@lo
+; CHECK: ds_write_b8
+define internal void @helper() noinline {
+ store volatile i8 1, ptr addrspace(3) @dynlds, align 1
+ ret void
+}
+
+; CHECK-LABEL: kernel:
+; CHECK: ds_write_b8 v{{[0-9]+}}, v{{[0-9]+}} offset:16
+; CHECK: s_swappc_b64
+define amdgpu_kernel void @kernel() {
+ %p = getelementptr i8, ptr addrspace(3) @dynlds, i32 16
+ store volatile i8 2, ptr addrspace(3) %p, align 1
+ call void @helper()
+ ret void
+}
>From 42c3a3e31180ad39a1e744b40a6ea4b568b63cee Mon Sep 17 00:00:00 2001
From: Lei Zhang <antiagainst at gmail.com>
Date: Wed, 23 Sep 2026 10:55:02 -0700
Subject: [PATCH 2/3] [AMDGPU] Autogenerate checks in
lds-dynamic-direct-and-indirect-use.ll
Regenerate the test assertions with update_llc_test_checks.py for
consistency with other tests, and add gfx1250 RUN lines alongside
gfx942 for both SelectionDAG and GlobalISel.
---
.../lds-dynamic-direct-and-indirect-use.ll | 132 ++++++++++++++++--
1 file changed, 124 insertions(+), 8 deletions(-)
diff --git a/llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll b/llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll
index 445dc04ca87d3e..bbaed811f2a6ea 100644
--- a/llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll
+++ b/llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll
@@ -1,5 +1,8 @@
-; RUN: llc -mtriple=amdgpu9.42-amd-amdhsa < %s | FileCheck %s
-; RUN: llc -mtriple=amdgpu9.42-amd-amdhsa -global-isel < %s | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=amdgpu9.42-amd-amdhsa < %s | FileCheck -check-prefixes=GFX942,GFX942-SDAG %s
+; RUN: llc -mtriple=amdgpu9.42-amd-amdhsa -global-isel < %s | FileCheck -check-prefixes=GFX942,GFX942-GISEL %s
+; RUN: llc -mtriple=amdgpu12.50-amd-amdhsa < %s | FileCheck -check-prefixes=GFX1250,GFX1250-SDAG %s
+; RUN: llc -mtriple=amdgpu12.50-amd-amdhsa -global-isel < %s | FileCheck -check-prefixes=GFX1250,GFX1250-GISEL %s
; A kernel that accesses a dynamic LDS variable both directly and through a
; non-inlined callee. amdgpu-lower-module-lds rewrites only the callee's uses
@@ -9,20 +12,133 @@
@dynlds = external addrspace(3) global [0 x i8], align 16
-; CHECK-LABEL: helper:
-; CHECK: llvm.amdgcn.dynlds.offset.table at rel32@lo
-; CHECK: ds_write_b8
define internal void @helper() noinline {
+; GFX942-LABEL: helper:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX942-NEXT: s_mov_b32 s0, s15
+; GFX942-NEXT: s_ashr_i32 s1, s15, 31
+; GFX942-NEXT: s_lshl_b64 s[0:1], s[0:1], 2
+; GFX942-NEXT: s_getpc_b64 s[2:3]
+; GFX942-NEXT: s_add_u32 s2, s2, llvm.amdgcn.dynlds.offset.table at rel32@lo+4
+; GFX942-NEXT: s_addc_u32 s3, s3, llvm.amdgcn.dynlds.offset.table at rel32@hi+12
+; GFX942-NEXT: s_add_u32 s0, s2, s0
+; GFX942-NEXT: s_addc_u32 s1, s3, s1
+; GFX942-NEXT: s_load_dword s0, s[0:1], 0x0
+; GFX942-NEXT: v_mov_b32_e32 v0, 1
+; GFX942-NEXT: s_waitcnt lgkmcnt(0)
+; GFX942-NEXT: v_mov_b32_e32 v1, s0
+; GFX942-NEXT: ds_write_b8 v1, v0
+; GFX942-NEXT: s_waitcnt lgkmcnt(0)
+; GFX942-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX1250-SDAG-LABEL: helper:
+; GFX1250-SDAG: ; %bb.0:
+; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1250-SDAG-NEXT: s_mov_b32 s0, s15
+; GFX1250-SDAG-NEXT: s_ashr_i32 s1, s15, 31
+; GFX1250-SDAG-NEXT: s_get_pc_i64 s[2:3]
+; GFX1250-SDAG-NEXT: s_add_nc_u64 s[2:3], s[2:3], llvm.amdgcn.dynlds.offset.table at rel64+4
+; GFX1250-SDAG-NEXT: s_lshl_b64 s[0:1], s[0:1], 2
+; GFX1250-SDAG-NEXT: v_mov_b16_e32 v0.l, 1
+; GFX1250-SDAG-NEXT: s_add_nc_u64 s[0:1], s[2:3], s[0:1]
+; GFX1250-SDAG-NEXT: s_load_b32 s0, s[0:1], 0x0 nv
+; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
+; GFX1250-SDAG-NEXT: v_mov_b32_e32 v1, s0
+; GFX1250-SDAG-NEXT: ds_store_b8 v1, v0
+; GFX1250-SDAG-NEXT: s_wait_dscnt 0x0
+; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
+;
+; GFX1250-GISEL-LABEL: helper:
+; GFX1250-GISEL: ; %bb.0:
+; GFX1250-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
+; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1250-GISEL-NEXT: s_mov_b32 s0, s15
+; GFX1250-GISEL-NEXT: s_ashr_i32 s1, s15, 31
+; GFX1250-GISEL-NEXT: s_get_pc_i64 s[2:3]
+; GFX1250-GISEL-NEXT: s_add_nc_u64 s[2:3], s[2:3], llvm.amdgcn.dynlds.offset.table at rel64+4
+; GFX1250-GISEL-NEXT: s_lshl_b64 s[0:1], s[0:1], 2
+; GFX1250-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1250-GISEL-NEXT: s_add_co_u32 s0, s2, s0
+; GFX1250-GISEL-NEXT: s_add_co_ci_u32 s1, s3, s1
+; GFX1250-GISEL-NEXT: s_load_b32 s0, s[0:1], 0x0 nv
+; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0
+; GFX1250-GISEL-NEXT: v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, s0
+; GFX1250-GISEL-NEXT: ds_store_b8 v1, v0
+; GFX1250-GISEL-NEXT: s_wait_dscnt 0x0
+; GFX1250-GISEL-NEXT: s_set_pc_i64 s[30:31]
store volatile i8 1, ptr addrspace(3) @dynlds, align 1
ret void
}
-; CHECK-LABEL: kernel:
-; CHECK: ds_write_b8 v{{[0-9]+}}, v{{[0-9]+}} offset:16
-; CHECK: s_swappc_b64
define amdgpu_kernel void @kernel() {
+; GFX942-LABEL: kernel:
+; GFX942: ; %bb.0:
+; GFX942-NEXT: s_mov_b32 s14, s10
+; GFX942-NEXT: s_mov_b32 s13, s9
+; GFX942-NEXT: s_mov_b32 s12, s8
+; GFX942-NEXT: s_mov_b64 s[10:11], s[6:7]
+; GFX942-NEXT: s_mov_b64 s[8:9], s[4:5]
+; GFX942-NEXT: v_mov_b32_e32 v1, 2
+; GFX942-NEXT: v_mov_b32_e32 v2, 0
+; GFX942-NEXT: s_getpc_b64 s[16:17]
+; GFX942-NEXT: s_add_u32 s16, s16, helper at rel32@lo+4
+; GFX942-NEXT: s_addc_u32 s17, s17, helper at rel32@hi+12
+; GFX942-NEXT: s_mov_b64 s[4:5], s[0:1]
+; GFX942-NEXT: s_mov_b64 s[6:7], s[2:3]
+; GFX942-NEXT: s_mov_b32 s15, 0
+; GFX942-NEXT: v_mov_b32_e32 v31, v0
+; GFX942-NEXT: s_mov_b32 s32, 0
+; GFX942-NEXT: ds_write_b8 v2, v1 offset:16
+; GFX942-NEXT: s_swappc_b64 s[30:31], s[16:17]
+; GFX942-NEXT: s_endpgm
+;
+; GFX1250-SDAG-LABEL: kernel:
+; GFX1250-SDAG: ; %bb.0:
+; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-SDAG-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-SDAG-NEXT: v_nop
+; GFX1250-SDAG-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-SDAG-NEXT: v_mov_b16_e32 v1.l, 2
+; GFX1250-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v31, v0
+; GFX1250-SDAG-NEXT: s_mov_b64 s[10:11], s[6:7]
+; GFX1250-SDAG-NEXT: s_mov_b64 s[8:9], s[4:5]
+; GFX1250-SDAG-NEXT: s_get_pc_i64 s[12:13]
+; GFX1250-SDAG-NEXT: s_add_nc_u64 s[12:13], s[12:13], helper at rel64+4
+; GFX1250-SDAG-NEXT: s_mov_b64 s[4:5], s[0:1]
+; GFX1250-SDAG-NEXT: s_mov_b64 s[6:7], s[2:3]
+; GFX1250-SDAG-NEXT: s_mov_b32 s15, 0
+; GFX1250-SDAG-NEXT: s_mov_b32 s32, 0
+; GFX1250-SDAG-NEXT: ds_store_b8 v2, v1 offset:16
+; GFX1250-SDAG-NEXT: s_swap_pc_i64 s[30:31], s[12:13]
+; GFX1250-SDAG-NEXT: s_endpgm
+;
+; GFX1250-GISEL-LABEL: kernel:
+; GFX1250-GISEL: ; %bb.0:
+; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
+; GFX1250-GISEL-NEXT: s_mov_b64 s[64:65], 0
+; GFX1250-GISEL-NEXT: v_nop
+; GFX1250-GISEL-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
+; GFX1250-GISEL-NEXT: v_dual_mov_b32 v1, 2 :: v_dual_mov_b32 v2, 0
+; GFX1250-GISEL-NEXT: v_mov_b32_e32 v31, v0
+; GFX1250-GISEL-NEXT: s_mov_b64 s[10:11], s[6:7]
+; GFX1250-GISEL-NEXT: s_mov_b64 s[8:9], s[4:5]
+; GFX1250-GISEL-NEXT: s_get_pc_i64 s[12:13]
+; GFX1250-GISEL-NEXT: s_add_nc_u64 s[12:13], s[12:13], helper at rel64+4
+; GFX1250-GISEL-NEXT: s_mov_b64 s[4:5], s[0:1]
+; GFX1250-GISEL-NEXT: s_mov_b64 s[6:7], s[2:3]
+; GFX1250-GISEL-NEXT: s_mov_b32 s15, 0
+; GFX1250-GISEL-NEXT: s_mov_b32 s32, 0
+; GFX1250-GISEL-NEXT: ds_store_b8 v2, v1 offset:16
+; GFX1250-GISEL-NEXT: s_swap_pc_i64 s[30:31], s[12:13]
+; GFX1250-GISEL-NEXT: s_endpgm
%p = getelementptr i8, ptr addrspace(3) @dynlds, i32 16
store volatile i8 2, ptr addrspace(3) %p, align 1
call void @helper()
ret void
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; GFX1250: {{.*}}
+; GFX942-GISEL: {{.*}}
+; GFX942-SDAG: {{.*}}
>From 8f7be7b009154024e72b920868a13a47d800c050 Mon Sep 17 00:00:00 2001
From: "github-actions[bot]" <github-actions[bot]@users.noreply.github.com>
Date: Fri, 25 Sep 2026 05:38:01 +0000
Subject: [PATCH 3/3] [AMDGPU] Limit dynamic LDS test to gfx942
---
.../lds-dynamic-direct-and-indirect-use.ll | 80 -------------------
1 file changed, 80 deletions(-)
diff --git a/llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll b/llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll
index bbaed811f2a6ea..5a4009f0398bce 100644
--- a/llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll
+++ b/llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll
@@ -1,8 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=amdgpu9.42-amd-amdhsa < %s | FileCheck -check-prefixes=GFX942,GFX942-SDAG %s
; RUN: llc -mtriple=amdgpu9.42-amd-amdhsa -global-isel < %s | FileCheck -check-prefixes=GFX942,GFX942-GISEL %s
-; RUN: llc -mtriple=amdgpu12.50-amd-amdhsa < %s | FileCheck -check-prefixes=GFX1250,GFX1250-SDAG %s
-; RUN: llc -mtriple=amdgpu12.50-amd-amdhsa -global-isel < %s | FileCheck -check-prefixes=GFX1250,GFX1250-GISEL %s
; A kernel that accesses a dynamic LDS variable both directly and through a
; non-inlined callee. amdgpu-lower-module-lds rewrites only the callee's uses
@@ -31,43 +29,6 @@ define internal void @helper() noinline {
; GFX942-NEXT: ds_write_b8 v1, v0
; GFX942-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX1250-SDAG-LABEL: helper:
-; GFX1250-SDAG: ; %bb.0:
-; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1250-SDAG-NEXT: s_mov_b32 s0, s15
-; GFX1250-SDAG-NEXT: s_ashr_i32 s1, s15, 31
-; GFX1250-SDAG-NEXT: s_get_pc_i64 s[2:3]
-; GFX1250-SDAG-NEXT: s_add_nc_u64 s[2:3], s[2:3], llvm.amdgcn.dynlds.offset.table at rel64+4
-; GFX1250-SDAG-NEXT: s_lshl_b64 s[0:1], s[0:1], 2
-; GFX1250-SDAG-NEXT: v_mov_b16_e32 v0.l, 1
-; GFX1250-SDAG-NEXT: s_add_nc_u64 s[0:1], s[2:3], s[0:1]
-; GFX1250-SDAG-NEXT: s_load_b32 s0, s[0:1], 0x0 nv
-; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
-; GFX1250-SDAG-NEXT: v_mov_b32_e32 v1, s0
-; GFX1250-SDAG-NEXT: ds_store_b8 v1, v0
-; GFX1250-SDAG-NEXT: s_wait_dscnt 0x0
-; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
-;
-; GFX1250-GISEL-LABEL: helper:
-; GFX1250-GISEL: ; %bb.0:
-; GFX1250-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
-; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1250-GISEL-NEXT: s_mov_b32 s0, s15
-; GFX1250-GISEL-NEXT: s_ashr_i32 s1, s15, 31
-; GFX1250-GISEL-NEXT: s_get_pc_i64 s[2:3]
-; GFX1250-GISEL-NEXT: s_add_nc_u64 s[2:3], s[2:3], llvm.amdgcn.dynlds.offset.table at rel64+4
-; GFX1250-GISEL-NEXT: s_lshl_b64 s[0:1], s[0:1], 2
-; GFX1250-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
-; GFX1250-GISEL-NEXT: s_add_co_u32 s0, s2, s0
-; GFX1250-GISEL-NEXT: s_add_co_ci_u32 s1, s3, s1
-; GFX1250-GISEL-NEXT: s_load_b32 s0, s[0:1], 0x0 nv
-; GFX1250-GISEL-NEXT: s_wait_kmcnt 0x0
-; GFX1250-GISEL-NEXT: v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, s0
-; GFX1250-GISEL-NEXT: ds_store_b8 v1, v0
-; GFX1250-GISEL-NEXT: s_wait_dscnt 0x0
-; GFX1250-GISEL-NEXT: s_set_pc_i64 s[30:31]
store volatile i8 1, ptr addrspace(3) @dynlds, align 1
ret void
}
@@ -93,52 +54,11 @@ define amdgpu_kernel void @kernel() {
; GFX942-NEXT: ds_write_b8 v2, v1 offset:16
; GFX942-NEXT: s_swappc_b64 s[30:31], s[16:17]
; GFX942-NEXT: s_endpgm
-;
-; GFX1250-SDAG-LABEL: kernel:
-; GFX1250-SDAG: ; %bb.0:
-; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-SDAG-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-SDAG-NEXT: v_nop
-; GFX1250-SDAG-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-SDAG-NEXT: v_mov_b16_e32 v1.l, 2
-; GFX1250-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v31, v0
-; GFX1250-SDAG-NEXT: s_mov_b64 s[10:11], s[6:7]
-; GFX1250-SDAG-NEXT: s_mov_b64 s[8:9], s[4:5]
-; GFX1250-SDAG-NEXT: s_get_pc_i64 s[12:13]
-; GFX1250-SDAG-NEXT: s_add_nc_u64 s[12:13], s[12:13], helper at rel64+4
-; GFX1250-SDAG-NEXT: s_mov_b64 s[4:5], s[0:1]
-; GFX1250-SDAG-NEXT: s_mov_b64 s[6:7], s[2:3]
-; GFX1250-SDAG-NEXT: s_mov_b32 s15, 0
-; GFX1250-SDAG-NEXT: s_mov_b32 s32, 0
-; GFX1250-SDAG-NEXT: ds_store_b8 v2, v1 offset:16
-; GFX1250-SDAG-NEXT: s_swap_pc_i64 s[30:31], s[12:13]
-; GFX1250-SDAG-NEXT: s_endpgm
-;
-; GFX1250-GISEL-LABEL: kernel:
-; GFX1250-GISEL: ; %bb.0:
-; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
-; GFX1250-GISEL-NEXT: s_mov_b64 s[64:65], 0
-; GFX1250-GISEL-NEXT: v_nop
-; GFX1250-GISEL-NEXT: global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
-; GFX1250-GISEL-NEXT: v_dual_mov_b32 v1, 2 :: v_dual_mov_b32 v2, 0
-; GFX1250-GISEL-NEXT: v_mov_b32_e32 v31, v0
-; GFX1250-GISEL-NEXT: s_mov_b64 s[10:11], s[6:7]
-; GFX1250-GISEL-NEXT: s_mov_b64 s[8:9], s[4:5]
-; GFX1250-GISEL-NEXT: s_get_pc_i64 s[12:13]
-; GFX1250-GISEL-NEXT: s_add_nc_u64 s[12:13], s[12:13], helper at rel64+4
-; GFX1250-GISEL-NEXT: s_mov_b64 s[4:5], s[0:1]
-; GFX1250-GISEL-NEXT: s_mov_b64 s[6:7], s[2:3]
-; GFX1250-GISEL-NEXT: s_mov_b32 s15, 0
-; GFX1250-GISEL-NEXT: s_mov_b32 s32, 0
-; GFX1250-GISEL-NEXT: ds_store_b8 v2, v1 offset:16
-; GFX1250-GISEL-NEXT: s_swap_pc_i64 s[30:31], s[12:13]
-; GFX1250-GISEL-NEXT: s_endpgm
%p = getelementptr i8, ptr addrspace(3) @dynlds, i32 16
store volatile i8 2, ptr addrspace(3) %p, align 1
call void @helper()
ret void
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX1250: {{.*}}
; GFX942-GISEL: {{.*}}
; GFX942-SDAG: {{.*}}
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