[llvm] [TLI] Add glibc 2.35 libmvec vector functions to the x86 table (PR #223817)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 24 21:53:59 PDT 2026
https://github.com/anun333 updated https://github.com/llvm/llvm-project/pull/223817
>From 4383dd37df6e534f4bafe92caef73f74c0f79149 Mon Sep 17 00:00:00 2001
From: anun333 <anun333 at posteo.net>
Date: Wed, 16 Sep 2026 00:43:56 -0500
Subject: [PATCH 1/3] [TLI] Add the remaining glibc 2.35 libmvec vector
functions to the x86 table
Completes the list in #206273. That issue names 19 functions missing from
TLI_DEFINE_LIBMVEC_X86_VECFUNCS; #206274 landed 8 of them (erf, erfc,
cbrt, expm1, log1p, asinh, acosh, atanh) and tan was already present, so
this adds the remaining 10 -- acos, asin, atan, cosh, sinh, tanh, exp2,
exp10, log2, log10 -- plus atan2 and hypot, which glibc 2.35 also exports
in vector form and the issue does not list.
Registers the llvm.* intrinsic name alongside the libcall name wherever an
intrinsic exists, as the AArch64 libmvec block already does. This is not
cosmetic: clang lowers exp2f/log2f/log10f to llvm.exp2/llvm.log2/
llvm.log10 under -fno-math-errno alone, which -ffast-math and -Ofast
imply, so libcall-only rows would leave those three scalar under exactly
the flags a -fveclib=libmvec user builds with. hypot has no LLVM
intrinsic, so it is libcall-only.
Follows the existing table convention: b (SSE2) and d (AVX2) classes only,
matching cos/exp/log/pow/sin/tan. All 50 distinct symbols verified present
in glibc 2.39, all tagged @@GLIBC_2.35, and each ABI class exercised
through a compiled shim calling the vector calling convention directly.
Tests:
- libm-vector-calls.ll gains libcall and intrinsic coverage for each
function at VF2/VF4/VF8, in the shape #206274 used.
- replace-with-veclib-libmvec.ll is new. ReplaceWithVeclib runs for every
target at -O1 and above and reads the same table, so the intrinsic rows
are reachable there too; x86 had no equivalent of the AArch64 test.
- add-TLI-mappings.ll carried a LIBMVEC-X86-NOT asserting that
llvm.log10.f32 is unmapped on x86. It is mapped now, so that line is
replaced by the positive checks.
Assisted-by: Claude Opus 5 (Claude Code)
Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
---
llvm/include/llvm/Analysis/VecFuncs.def | 145 ++
.../X86/replace-with-veclib-libmvec.ll | 668 ++++++++
.../LoopVectorize/X86/libm-vector-calls.ll | 1490 +++++++++++++++++
llvm/test/Transforms/Util/add-TLI-mappings.ll | 14 +-
4 files changed, 2313 insertions(+), 4 deletions(-)
create mode 100644 llvm/test/CodeGen/X86/replace-with-veclib-libmvec.ll
diff --git a/llvm/include/llvm/Analysis/VecFuncs.def b/llvm/include/llvm/Analysis/VecFuncs.def
index 58fe1248dae3b1..7e8d32ba3f7b78 100644
--- a/llvm/include/llvm/Analysis/VecFuncs.def
+++ b/llvm/include/llvm/Analysis/VecFuncs.def
@@ -287,6 +287,151 @@ TLI_DEFINE_VECFUNC("atanh", "_ZGVdN4v_atanh", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("atanhf", "_ZGVbN4v_atanhf", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("atanhf", "_ZGVdN8v_atanhf", FIXED(8), "_ZGV_LLVM_N8v")
+// The llvm.* rows are needed because clang lowers some of these to LLVM
+// intrinsics rather than libcalls. hypot has no intrinsic, so it is
+// libcall-only.
+TLI_DEFINE_VECFUNC("acos", "_ZGVbN2v_acos", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("acos", "_ZGVdN4v_acos", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("acosf", "_ZGVbN4v_acosf", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("acosf", "_ZGVdN8v_acosf", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("llvm.acos.f64", "_ZGVbN2v_acos", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("llvm.acos.f64", "_ZGVdN4v_acos", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("llvm.acos.f32", "_ZGVbN4v_acosf", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("llvm.acos.f32", "_ZGVdN8v_acosf", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("asin", "_ZGVbN2v_asin", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("asin", "_ZGVdN4v_asin", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("asinf", "_ZGVbN4v_asinf", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("asinf", "_ZGVdN8v_asinf", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("llvm.asin.f64", "_ZGVbN2v_asin", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("llvm.asin.f64", "_ZGVdN4v_asin", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("llvm.asin.f32", "_ZGVbN4v_asinf", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("llvm.asin.f32", "_ZGVdN8v_asinf", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("atan", "_ZGVbN2v_atan", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("atan", "_ZGVdN4v_atan", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("atanf", "_ZGVbN4v_atanf", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("atanf", "_ZGVdN8v_atanf", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("llvm.atan.f64", "_ZGVbN2v_atan", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("llvm.atan.f64", "_ZGVdN4v_atan", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("llvm.atan.f32", "_ZGVbN4v_atanf", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("llvm.atan.f32", "_ZGVdN8v_atanf", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("cosh", "_ZGVbN2v_cosh", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("cosh", "_ZGVdN4v_cosh", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("coshf", "_ZGVbN4v_coshf", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("coshf", "_ZGVdN8v_coshf", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("llvm.cosh.f64", "_ZGVbN2v_cosh", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("llvm.cosh.f64", "_ZGVdN4v_cosh", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("llvm.cosh.f32", "_ZGVbN4v_coshf", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("llvm.cosh.f32", "_ZGVdN8v_coshf", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("sinh", "_ZGVbN2v_sinh", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("sinh", "_ZGVdN4v_sinh", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("sinhf", "_ZGVbN4v_sinhf", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("sinhf", "_ZGVdN8v_sinhf", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("llvm.sinh.f64", "_ZGVbN2v_sinh", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("llvm.sinh.f64", "_ZGVdN4v_sinh", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("llvm.sinh.f32", "_ZGVbN4v_sinhf", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("llvm.sinh.f32", "_ZGVdN8v_sinhf", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("tanh", "_ZGVbN2v_tanh", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("tanh", "_ZGVdN4v_tanh", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("tanhf", "_ZGVbN4v_tanhf", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("tanhf", "_ZGVdN8v_tanhf", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("llvm.tanh.f64", "_ZGVbN2v_tanh", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("llvm.tanh.f64", "_ZGVdN4v_tanh", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("llvm.tanh.f32", "_ZGVbN4v_tanhf", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("llvm.tanh.f32", "_ZGVdN8v_tanhf", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("exp10", "_ZGVbN2v_exp10", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("exp10", "_ZGVdN4v_exp10", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("exp10f", "_ZGVbN4v_exp10f", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("exp10f", "_ZGVdN8v_exp10f", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("llvm.exp10.f64", "_ZGVbN2v_exp10", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("llvm.exp10.f64", "_ZGVdN4v_exp10", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("llvm.exp10.f32", "_ZGVbN4v_exp10f", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("llvm.exp10.f32", "_ZGVdN8v_exp10f", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("exp2", "_ZGVbN2v_exp2", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("exp2", "_ZGVdN4v_exp2", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("exp2f", "_ZGVbN4v_exp2f", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("exp2f", "_ZGVdN8v_exp2f", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("llvm.exp2.f64", "_ZGVbN2v_exp2", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("llvm.exp2.f64", "_ZGVdN4v_exp2", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("llvm.exp2.f32", "_ZGVbN4v_exp2f", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("llvm.exp2.f32", "_ZGVdN8v_exp2f", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("log10", "_ZGVbN2v_log10", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("log10", "_ZGVdN4v_log10", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("log10f", "_ZGVbN4v_log10f", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("log10f", "_ZGVdN8v_log10f", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("llvm.log10.f64", "_ZGVbN2v_log10", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("llvm.log10.f64", "_ZGVdN4v_log10", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("llvm.log10.f32", "_ZGVbN4v_log10f", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("llvm.log10.f32", "_ZGVdN8v_log10f", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("log2", "_ZGVbN2v_log2", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("log2", "_ZGVdN4v_log2", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("log2f", "_ZGVbN4v_log2f", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("log2f", "_ZGVdN8v_log2f", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("llvm.log2.f64", "_ZGVbN2v_log2", FIXED(2), "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("llvm.log2.f64", "_ZGVdN4v_log2", FIXED(4), "_ZGV_LLVM_N4v")
+
+TLI_DEFINE_VECFUNC("llvm.log2.f32", "_ZGVbN4v_log2f", FIXED(4), "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("llvm.log2.f32", "_ZGVdN8v_log2f", FIXED(8), "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("atan2", "_ZGVbN2vv_atan2", FIXED(2), "_ZGV_LLVM_N2vv")
+TLI_DEFINE_VECFUNC("atan2", "_ZGVdN4vv_atan2", FIXED(4), "_ZGV_LLVM_N4vv")
+
+TLI_DEFINE_VECFUNC("atan2f", "_ZGVbN4vv_atan2f", FIXED(4), "_ZGV_LLVM_N4vv")
+TLI_DEFINE_VECFUNC("atan2f", "_ZGVdN8vv_atan2f", FIXED(8), "_ZGV_LLVM_N8vv")
+
+TLI_DEFINE_VECFUNC("llvm.atan2.f64", "_ZGVbN2vv_atan2", FIXED(2), "_ZGV_LLVM_N2vv")
+TLI_DEFINE_VECFUNC("llvm.atan2.f64", "_ZGVdN4vv_atan2", FIXED(4), "_ZGV_LLVM_N4vv")
+
+TLI_DEFINE_VECFUNC("llvm.atan2.f32", "_ZGVbN4vv_atan2f", FIXED(4), "_ZGV_LLVM_N4vv")
+TLI_DEFINE_VECFUNC("llvm.atan2.f32", "_ZGVdN8vv_atan2f", FIXED(8), "_ZGV_LLVM_N8vv")
+
+TLI_DEFINE_VECFUNC("hypot", "_ZGVbN2vv_hypot", FIXED(2), "_ZGV_LLVM_N2vv")
+TLI_DEFINE_VECFUNC("hypot", "_ZGVdN4vv_hypot", FIXED(4), "_ZGV_LLVM_N4vv")
+
+TLI_DEFINE_VECFUNC("hypotf", "_ZGVbN4vv_hypotf", FIXED(4), "_ZGV_LLVM_N4vv")
+TLI_DEFINE_VECFUNC("hypotf", "_ZGVdN8vv_hypotf", FIXED(8), "_ZGV_LLVM_N8vv")
+
+// sincos/sincosf held out: glibc exports _ZGV{b,c,d,e}N?vvv_sincos
+// (three v's), which does not match the vl8l8 linear-pointer
+// convention every other sincos entry in this file uses.
+
#elif defined(TLI_DEFINE_LIBMVEC_AARCH64_VECFUNCS)
TLI_DEFINE_VECFUNC("acos", "_ZGVnN2v_acos", FIXED(2), NOMASK, "_ZGV_LLVM_N2v", CallingConv::AArch64_VectorCall)
diff --git a/llvm/test/CodeGen/X86/replace-with-veclib-libmvec.ll b/llvm/test/CodeGen/X86/replace-with-veclib-libmvec.ll
new file mode 100644
index 00000000000000..29cdb68d520e93
--- /dev/null
+++ b/llvm/test/CodeGen/X86/replace-with-veclib-libmvec.ll
@@ -0,0 +1,668 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals
+; RUN: opt -vector-library=LIBMVEC -replace-with-veclib -S < %s | FileCheck %s
+
+; Checks that the x86 libmvec table is reachable from ReplaceWithVeclib, which
+; runs for every target at -O1 and above. The AArch64 equivalent is
+; llvm/test/CodeGen/AArch64/replace-with-veclib-libmvec.ll; x86 had no
+; counterpart. Only functions whose llvm.* intrinsic name is in the table can
+; be replaced here, so this covers the intrinsic rows specifically.
+
+target triple = "x86_64-unknown-linux-gnu"
+
+;.
+; CHECK: @llvm.compiler.used = appending global [68 x ptr] [ptr @_ZGVbN2v_sin, ptr @_ZGVbN4v_sinf, ptr @_ZGVbN2v_cos, ptr @_ZGVbN4v_cosf, ptr @_ZGVbN2v_tan, ptr @_ZGVbN4v_tanf, ptr @_ZGVbN2v_exp, ptr @_ZGVbN4v_expf, ptr @_ZGVbN2v_log, ptr @_ZGVbN4v_logf, ptr @_ZGVbN2vv_pow, ptr @_ZGVbN4vv_powf, ptr @_ZGVbN2v_acos, ptr @_ZGVbN4v_acosf, ptr @_ZGVbN2v_asin, ptr @_ZGVbN4v_asinf, ptr @_ZGVbN2v_atan, ptr @_ZGVbN4v_atanf, ptr @_ZGVbN2vv_atan2, ptr @_ZGVbN4vv_atan2f, ptr @_ZGVbN2v_cosh, ptr @_ZGVbN4v_coshf, ptr @_ZGVbN2v_sinh, ptr @_ZGVbN4v_sinhf, ptr @_ZGVbN2v_tanh, ptr @_ZGVbN4v_tanhf, ptr @_ZGVbN2v_exp10, ptr @_ZGVbN4v_exp10f, ptr @_ZGVbN2v_exp2, ptr @_ZGVbN4v_exp2f, ptr @_ZGVbN2v_log10, ptr @_ZGVbN4v_log10f, ptr @_ZGVbN2v_log2, ptr @_ZGVbN4v_log2f, ptr @_ZGVdN4v_sin, ptr @_ZGVdN8v_sinf, ptr @_ZGVdN4v_cos, ptr @_ZGVdN8v_cosf, ptr @_ZGVdN4v_tan, ptr @_ZGVdN8v_tanf, ptr @_ZGVdN4v_exp, ptr @_ZGVdN8v_expf, ptr @_ZGVdN4v_log, ptr @_ZGVdN8v_logf, ptr @_ZGVdN4vv_pow, ptr @_ZGVdN8vv_powf, ptr @_ZGVdN4v_acos, ptr @_ZGVdN8v_acosf, ptr @_ZGVdN4v_asin, ptr @_ZGVdN8v_asinf, ptr @_ZGVdN4v_atan, ptr @_ZGVdN8v_atanf, ptr @_ZGVdN4vv_atan2, ptr @_ZGVdN8vv_atan2f, ptr @_ZGVdN4v_cosh, ptr @_ZGVdN8v_coshf, ptr @_ZGVdN4v_sinh, ptr @_ZGVdN8v_sinhf, ptr @_ZGVdN4v_tanh, ptr @_ZGVdN8v_tanhf, ptr @_ZGVdN4v_exp10, ptr @_ZGVdN8v_exp10f, ptr @_ZGVdN4v_exp2, ptr @_ZGVdN8v_exp2f, ptr @_ZGVdN4v_log10, ptr @_ZGVdN8v_log10f, ptr @_ZGVdN4v_log2, ptr @_ZGVdN8v_log2f], section "llvm.metadata"
+;.
+define <2 x double> @llvm_sin_f64(<2 x double> %in0) {
+; CHECK-LABEL: @llvm_sin_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_sin(<2 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.sin.v2f64(<2 x double> %in0)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_sin_f32(<4 x float> %in0) {
+; CHECK-LABEL: @llvm_sin_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_sinf(<4 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.sin.v4f32(<4 x float> %in0)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_cos_f64(<2 x double> %in0) {
+; CHECK-LABEL: @llvm_cos_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_cos(<2 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.cos.v2f64(<2 x double> %in0)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_cos_f32(<4 x float> %in0) {
+; CHECK-LABEL: @llvm_cos_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_cosf(<4 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.cos.v4f32(<4 x float> %in0)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_tan_f64(<2 x double> %in0) {
+; CHECK-LABEL: @llvm_tan_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_tan(<2 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.tan.v2f64(<2 x double> %in0)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_tan_f32(<4 x float> %in0) {
+; CHECK-LABEL: @llvm_tan_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_tanf(<4 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.tan.v4f32(<4 x float> %in0)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_exp_f64(<2 x double> %in0) {
+; CHECK-LABEL: @llvm_exp_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_exp(<2 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.exp.v2f64(<2 x double> %in0)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_exp_f32(<4 x float> %in0) {
+; CHECK-LABEL: @llvm_exp_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_expf(<4 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.exp.v4f32(<4 x float> %in0)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_log_f64(<2 x double> %in0) {
+; CHECK-LABEL: @llvm_log_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_log(<2 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.log.v2f64(<2 x double> %in0)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_log_f32(<4 x float> %in0) {
+; CHECK-LABEL: @llvm_log_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_logf(<4 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.log.v4f32(<4 x float> %in0)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_pow_f64(<2 x double> %in0, <2 x double> %in1) {
+; CHECK-LABEL: @llvm_pow_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2vv_pow(<2 x double> [[IN0:%.*]], <2 x double> [[IN1:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.pow.v2f64(<2 x double> %in0, <2 x double> %in1)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_pow_f32(<4 x float> %in0, <4 x float> %in1) {
+; CHECK-LABEL: @llvm_pow_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4vv_powf(<4 x float> [[IN0:%.*]], <4 x float> [[IN1:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.pow.v4f32(<4 x float> %in0, <4 x float> %in1)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_acos_f64(<2 x double> %in0) {
+; CHECK-LABEL: @llvm_acos_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_acos(<2 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.acos.v2f64(<2 x double> %in0)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_acos_f32(<4 x float> %in0) {
+; CHECK-LABEL: @llvm_acos_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_acosf(<4 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.acos.v4f32(<4 x float> %in0)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_asin_f64(<2 x double> %in0) {
+; CHECK-LABEL: @llvm_asin_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_asin(<2 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.asin.v2f64(<2 x double> %in0)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_asin_f32(<4 x float> %in0) {
+; CHECK-LABEL: @llvm_asin_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_asinf(<4 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.asin.v4f32(<4 x float> %in0)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_atan_f64(<2 x double> %in0) {
+; CHECK-LABEL: @llvm_atan_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_atan(<2 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.atan.v2f64(<2 x double> %in0)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_atan_f32(<4 x float> %in0) {
+; CHECK-LABEL: @llvm_atan_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_atanf(<4 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.atan.v4f32(<4 x float> %in0)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_atan2_f64(<2 x double> %in0, <2 x double> %in1) {
+; CHECK-LABEL: @llvm_atan2_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2vv_atan2(<2 x double> [[IN0:%.*]], <2 x double> [[IN1:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.atan2.v2f64(<2 x double> %in0, <2 x double> %in1)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_atan2_f32(<4 x float> %in0, <4 x float> %in1) {
+; CHECK-LABEL: @llvm_atan2_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4vv_atan2f(<4 x float> [[IN0:%.*]], <4 x float> [[IN1:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.atan2.v4f32(<4 x float> %in0, <4 x float> %in1)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_cosh_f64(<2 x double> %in0) {
+; CHECK-LABEL: @llvm_cosh_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_cosh(<2 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.cosh.v2f64(<2 x double> %in0)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_cosh_f32(<4 x float> %in0) {
+; CHECK-LABEL: @llvm_cosh_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_coshf(<4 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.cosh.v4f32(<4 x float> %in0)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_sinh_f64(<2 x double> %in0) {
+; CHECK-LABEL: @llvm_sinh_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_sinh(<2 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.sinh.v2f64(<2 x double> %in0)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_sinh_f32(<4 x float> %in0) {
+; CHECK-LABEL: @llvm_sinh_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_sinhf(<4 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.sinh.v4f32(<4 x float> %in0)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_tanh_f64(<2 x double> %in0) {
+; CHECK-LABEL: @llvm_tanh_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_tanh(<2 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.tanh.v2f64(<2 x double> %in0)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_tanh_f32(<4 x float> %in0) {
+; CHECK-LABEL: @llvm_tanh_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_tanhf(<4 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.tanh.v4f32(<4 x float> %in0)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_exp10_f64(<2 x double> %in0) {
+; CHECK-LABEL: @llvm_exp10_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_exp10(<2 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.exp10.v2f64(<2 x double> %in0)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_exp10_f32(<4 x float> %in0) {
+; CHECK-LABEL: @llvm_exp10_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_exp10f(<4 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.exp10.v4f32(<4 x float> %in0)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_exp2_f64(<2 x double> %in0) {
+; CHECK-LABEL: @llvm_exp2_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_exp2(<2 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.exp2.v2f64(<2 x double> %in0)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_exp2_f32(<4 x float> %in0) {
+; CHECK-LABEL: @llvm_exp2_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_exp2f(<4 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.exp2.v4f32(<4 x float> %in0)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_log10_f64(<2 x double> %in0) {
+; CHECK-LABEL: @llvm_log10_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_log10(<2 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.log10.v2f64(<2 x double> %in0)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_log10_f32(<4 x float> %in0) {
+; CHECK-LABEL: @llvm_log10_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_log10f(<4 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.log10.v4f32(<4 x float> %in0)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_log2_f64(<2 x double> %in0) {
+; CHECK-LABEL: @llvm_log2_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_log2(<2 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.log2.v2f64(<2 x double> %in0)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_log2_f32(<4 x float> %in0) {
+; CHECK-LABEL: @llvm_log2_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_log2f(<4 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.log2.v4f32(<4 x float> %in0)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_ceil_f64(<2 x double> %in0) {
+; CHECK-LABEL: @llvm_ceil_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @llvm.ceil.v2f64(<2 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.ceil.v2f64(<2 x double> %in0)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_ceil_f32(<4 x float> %in0) {
+; CHECK-LABEL: @llvm_ceil_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @llvm.ceil.v4f32(<4 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.ceil.v4f32(<4 x float> %in0)
+ ret <4 x float> %1
+}
+
+define <2 x double> @llvm_copysign_f64(<2 x double> %in0, <2 x double> %in1) {
+; CHECK-LABEL: @llvm_copysign_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @llvm.copysign.v2f64(<2 x double> [[IN0:%.*]], <2 x double> [[IN1:%.*]])
+; CHECK-NEXT: ret <2 x double> [[TMP1]]
+;
+ %1 = call fast <2 x double> @llvm.copysign.v2f64(<2 x double> %in0, <2 x double> %in1)
+ ret <2 x double> %1
+}
+
+define <4 x float> @llvm_copysign_f32(<4 x float> %in0, <4 x float> %in1) {
+; CHECK-LABEL: @llvm_copysign_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @llvm.copysign.v4f32(<4 x float> [[IN0:%.*]], <4 x float> [[IN1:%.*]])
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
+ %1 = call fast <4 x float> @llvm.copysign.v4f32(<4 x float> %in0, <4 x float> %in1)
+ ret <4 x float> %1
+}
+
+; Wider vectors select the d (AVX2) rows.
+
+define <4 x double> @llvm_sin_wide_f64(<4 x double> %in0) {
+; CHECK-LABEL: @llvm_sin_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_sin(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.sin.v4f64(<4 x double> %in0)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_sin_wide_f32(<8 x float> %in0) {
+; CHECK-LABEL: @llvm_sin_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_sinf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.sin.v8f32(<8 x float> %in0)
+ ret <8 x float> %1
+}
+
+define <4 x double> @llvm_cos_wide_f64(<4 x double> %in0) {
+; CHECK-LABEL: @llvm_cos_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_cos(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.cos.v4f64(<4 x double> %in0)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_cos_wide_f32(<8 x float> %in0) {
+; CHECK-LABEL: @llvm_cos_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_cosf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.cos.v8f32(<8 x float> %in0)
+ ret <8 x float> %1
+}
+
+define <4 x double> @llvm_tan_wide_f64(<4 x double> %in0) {
+; CHECK-LABEL: @llvm_tan_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_tan(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.tan.v4f64(<4 x double> %in0)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_tan_wide_f32(<8 x float> %in0) {
+; CHECK-LABEL: @llvm_tan_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_tanf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.tan.v8f32(<8 x float> %in0)
+ ret <8 x float> %1
+}
+
+define <4 x double> @llvm_exp_wide_f64(<4 x double> %in0) {
+; CHECK-LABEL: @llvm_exp_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_exp(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.exp.v4f64(<4 x double> %in0)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_exp_wide_f32(<8 x float> %in0) {
+; CHECK-LABEL: @llvm_exp_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_expf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.exp.v8f32(<8 x float> %in0)
+ ret <8 x float> %1
+}
+
+define <4 x double> @llvm_log_wide_f64(<4 x double> %in0) {
+; CHECK-LABEL: @llvm_log_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_log(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.log.v4f64(<4 x double> %in0)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_log_wide_f32(<8 x float> %in0) {
+; CHECK-LABEL: @llvm_log_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_logf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.log.v8f32(<8 x float> %in0)
+ ret <8 x float> %1
+}
+
+define <4 x double> @llvm_pow_wide_f64(<4 x double> %in0, <4 x double> %in1) {
+; CHECK-LABEL: @llvm_pow_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4vv_pow(<4 x double> [[IN0:%.*]], <4 x double> [[IN1:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.pow.v4f64(<4 x double> %in0, <4 x double> %in1)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_pow_wide_f32(<8 x float> %in0, <8 x float> %in1) {
+; CHECK-LABEL: @llvm_pow_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8vv_powf(<8 x float> [[IN0:%.*]], <8 x float> [[IN1:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.pow.v8f32(<8 x float> %in0, <8 x float> %in1)
+ ret <8 x float> %1
+}
+
+define <4 x double> @llvm_acos_wide_f64(<4 x double> %in0) {
+; CHECK-LABEL: @llvm_acos_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_acos(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.acos.v4f64(<4 x double> %in0)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_acos_wide_f32(<8 x float> %in0) {
+; CHECK-LABEL: @llvm_acos_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_acosf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.acos.v8f32(<8 x float> %in0)
+ ret <8 x float> %1
+}
+
+define <4 x double> @llvm_asin_wide_f64(<4 x double> %in0) {
+; CHECK-LABEL: @llvm_asin_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_asin(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.asin.v4f64(<4 x double> %in0)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_asin_wide_f32(<8 x float> %in0) {
+; CHECK-LABEL: @llvm_asin_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_asinf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.asin.v8f32(<8 x float> %in0)
+ ret <8 x float> %1
+}
+
+define <4 x double> @llvm_atan_wide_f64(<4 x double> %in0) {
+; CHECK-LABEL: @llvm_atan_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_atan(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.atan.v4f64(<4 x double> %in0)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_atan_wide_f32(<8 x float> %in0) {
+; CHECK-LABEL: @llvm_atan_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_atanf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.atan.v8f32(<8 x float> %in0)
+ ret <8 x float> %1
+}
+
+define <4 x double> @llvm_atan2_wide_f64(<4 x double> %in0, <4 x double> %in1) {
+; CHECK-LABEL: @llvm_atan2_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4vv_atan2(<4 x double> [[IN0:%.*]], <4 x double> [[IN1:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.atan2.v4f64(<4 x double> %in0, <4 x double> %in1)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_atan2_wide_f32(<8 x float> %in0, <8 x float> %in1) {
+; CHECK-LABEL: @llvm_atan2_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8vv_atan2f(<8 x float> [[IN0:%.*]], <8 x float> [[IN1:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.atan2.v8f32(<8 x float> %in0, <8 x float> %in1)
+ ret <8 x float> %1
+}
+
+define <4 x double> @llvm_cosh_wide_f64(<4 x double> %in0) {
+; CHECK-LABEL: @llvm_cosh_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_cosh(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.cosh.v4f64(<4 x double> %in0)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_cosh_wide_f32(<8 x float> %in0) {
+; CHECK-LABEL: @llvm_cosh_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_coshf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.cosh.v8f32(<8 x float> %in0)
+ ret <8 x float> %1
+}
+
+define <4 x double> @llvm_sinh_wide_f64(<4 x double> %in0) {
+; CHECK-LABEL: @llvm_sinh_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_sinh(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.sinh.v4f64(<4 x double> %in0)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_sinh_wide_f32(<8 x float> %in0) {
+; CHECK-LABEL: @llvm_sinh_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_sinhf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.sinh.v8f32(<8 x float> %in0)
+ ret <8 x float> %1
+}
+
+define <4 x double> @llvm_tanh_wide_f64(<4 x double> %in0) {
+; CHECK-LABEL: @llvm_tanh_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_tanh(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.tanh.v4f64(<4 x double> %in0)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_tanh_wide_f32(<8 x float> %in0) {
+; CHECK-LABEL: @llvm_tanh_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_tanhf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.tanh.v8f32(<8 x float> %in0)
+ ret <8 x float> %1
+}
+
+define <4 x double> @llvm_exp10_wide_f64(<4 x double> %in0) {
+; CHECK-LABEL: @llvm_exp10_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_exp10(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.exp10.v4f64(<4 x double> %in0)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_exp10_wide_f32(<8 x float> %in0) {
+; CHECK-LABEL: @llvm_exp10_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_exp10f(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.exp10.v8f32(<8 x float> %in0)
+ ret <8 x float> %1
+}
+
+define <4 x double> @llvm_exp2_wide_f64(<4 x double> %in0) {
+; CHECK-LABEL: @llvm_exp2_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_exp2(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.exp2.v4f64(<4 x double> %in0)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_exp2_wide_f32(<8 x float> %in0) {
+; CHECK-LABEL: @llvm_exp2_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_exp2f(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.exp2.v8f32(<8 x float> %in0)
+ ret <8 x float> %1
+}
+
+define <4 x double> @llvm_log10_wide_f64(<4 x double> %in0) {
+; CHECK-LABEL: @llvm_log10_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_log10(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.log10.v4f64(<4 x double> %in0)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_log10_wide_f32(<8 x float> %in0) {
+; CHECK-LABEL: @llvm_log10_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_log10f(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.log10.v8f32(<8 x float> %in0)
+ ret <8 x float> %1
+}
+
+define <4 x double> @llvm_log2_wide_f64(<4 x double> %in0) {
+; CHECK-LABEL: @llvm_log2_wide_f64(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_log2(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: ret <4 x double> [[TMP1]]
+;
+ %1 = call fast <4 x double> @llvm.log2.v4f64(<4 x double> %in0)
+ ret <4 x double> %1
+}
+
+define <8 x float> @llvm_log2_wide_f32(<8 x float> %in0) {
+; CHECK-LABEL: @llvm_log2_wide_f32(
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_log2f(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: ret <8 x float> [[TMP1]]
+;
+ %1 = call fast <8 x float> @llvm.log2.v8f32(<8 x float> %in0)
+ ret <8 x float> %1
+}
+
+;.
+; CHECK: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+; CHECK: attributes #[[ATTR1:[0-9]+]] = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }
+;.
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
index 84cab4bc959017..ebb2857cff705a 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
@@ -36,6 +36,32 @@ declare double @asinh(double) #0
declare double @acosh(double) #0
declare double @atanh(double) #0
+; GLIBC 2.35 libmvec functions that also have an LLVM intrinsic (plus hypot, which does not)
+declare float @acosf(float) #0
+declare double @acos(double) #0
+declare float @asinf(float) #0
+declare double @asin(double) #0
+declare float @atanf(float) #0
+declare double @atan(double) #0
+declare float @coshf(float) #0
+declare double @cosh(double) #0
+declare float @sinhf(float) #0
+declare double @sinh(double) #0
+declare float @tanhf(float) #0
+declare double @tanh(double) #0
+declare float @exp10f(float) #0
+declare double @exp10(double) #0
+declare float @exp2f(float) #0
+declare double @exp2(double) #0
+declare float @log10f(float) #0
+declare double @log10(double) #0
+declare float @log2f(float) #0
+declare double @log2(double) #0
+declare float @atan2f(float, float) #0
+declare double @atan2(double, double) #0
+declare float @hypotf(float, float) #0
+declare double @hypot(double, double) #0
+
define void @sin_f64(ptr nocapture %varray) {
; CHECK-VF2-LABEL: define void @sin_f64(
; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -1132,3 +1158,1467 @@ for.body:
for.end:
ret void
}
+
+define void @acos_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @acos_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x float> @llvm.acos.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @acos_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_acosf(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @acos_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_acosf(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call fast float @acosf(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %call, ptr %arrayidx, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @acos_f64(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @acos_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_acos(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @acos_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_acos(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @acos_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x double> @llvm.acos.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call fast double @acos(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %indvars.iv
+ store double %call, ptr %arrayidx, align 8
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @acos_f32_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @acos_f32_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.acos.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @acos_f32_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_acosf(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @acos_f32_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_acosf(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call float @llvm.acos.f32(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @acos_f64_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @acos_f64_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_acos(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @acos_f64_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_acos(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @acos_f64_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x double> @llvm.acos.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call double @llvm.acos.f64(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @asin_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @asin_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x float> @llvm.asin.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @asin_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_asinf(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @asin_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_asinf(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call fast float @asinf(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %call, ptr %arrayidx, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @asin_f64(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @asin_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_asin(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @asin_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_asin(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @asin_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x double> @llvm.asin.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call fast double @asin(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %indvars.iv
+ store double %call, ptr %arrayidx, align 8
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @asin_f32_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @asin_f32_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.asin.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @asin_f32_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_asinf(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @asin_f32_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_asinf(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call float @llvm.asin.f32(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @asin_f64_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @asin_f64_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_asin(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @asin_f64_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_asin(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @asin_f64_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x double> @llvm.asin.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call double @llvm.asin.f64(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @atan_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @atan_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x float> @llvm.atan.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @atan_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_atanf(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @atan_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_atanf(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call fast float @atanf(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %call, ptr %arrayidx, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @atan_f64(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @atan_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_atan(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @atan_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_atan(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @atan_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x double> @llvm.atan.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call fast double @atan(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %indvars.iv
+ store double %call, ptr %arrayidx, align 8
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @atan_f32_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @atan_f32_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.atan.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @atan_f32_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_atanf(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @atan_f32_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_atanf(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call float @llvm.atan.f32(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @atan_f64_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @atan_f64_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_atan(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @atan_f64_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_atan(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @atan_f64_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x double> @llvm.atan.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call double @llvm.atan.f64(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @cosh_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @cosh_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x float> @llvm.cosh.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @cosh_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_coshf(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @cosh_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_coshf(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call fast float @coshf(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %call, ptr %arrayidx, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @cosh_f64(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @cosh_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_cosh(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @cosh_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_cosh(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @cosh_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x double> @llvm.cosh.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call fast double @cosh(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %indvars.iv
+ store double %call, ptr %arrayidx, align 8
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @cosh_f32_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @cosh_f32_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.cosh.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @cosh_f32_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_coshf(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @cosh_f32_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_coshf(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call float @llvm.cosh.f32(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @cosh_f64_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @cosh_f64_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_cosh(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @cosh_f64_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_cosh(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @cosh_f64_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x double> @llvm.cosh.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call double @llvm.cosh.f64(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @sinh_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @sinh_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x float> @llvm.sinh.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @sinh_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_sinhf(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @sinh_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_sinhf(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call fast float @sinhf(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %call, ptr %arrayidx, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @sinh_f64(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @sinh_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_sinh(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @sinh_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_sinh(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @sinh_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x double> @llvm.sinh.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call fast double @sinh(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %indvars.iv
+ store double %call, ptr %arrayidx, align 8
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @sinh_f32_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @sinh_f32_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.sinh.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @sinh_f32_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_sinhf(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @sinh_f32_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_sinhf(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call float @llvm.sinh.f32(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @sinh_f64_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @sinh_f64_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_sinh(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @sinh_f64_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_sinh(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @sinh_f64_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x double> @llvm.sinh.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call double @llvm.sinh.f64(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @tanh_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @tanh_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x float> @llvm.tanh.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @tanh_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_tanhf(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @tanh_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_tanhf(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call fast float @tanhf(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %call, ptr %arrayidx, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @tanh_f64(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @tanh_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_tanh(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @tanh_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_tanh(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @tanh_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x double> @llvm.tanh.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call fast double @tanh(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %indvars.iv
+ store double %call, ptr %arrayidx, align 8
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @tanh_f32_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @tanh_f32_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.tanh.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @tanh_f32_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_tanhf(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @tanh_f32_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_tanhf(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call float @llvm.tanh.f32(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @tanh_f64_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @tanh_f64_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_tanh(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @tanh_f64_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_tanh(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @tanh_f64_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x double> @llvm.tanh.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call double @llvm.tanh.f64(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @exp10_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @exp10_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x float> @llvm.exp10.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @exp10_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_exp10f(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @exp10_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_exp10f(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call fast float @exp10f(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %call, ptr %arrayidx, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @exp10_f64(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @exp10_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_exp10(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @exp10_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_exp10(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @exp10_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x double> @llvm.exp10.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call fast double @exp10(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %indvars.iv
+ store double %call, ptr %arrayidx, align 8
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @exp10_f32_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @exp10_f32_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.exp10.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @exp10_f32_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_exp10f(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @exp10_f32_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_exp10f(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call float @llvm.exp10.f32(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @exp10_f64_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @exp10_f64_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_exp10(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @exp10_f64_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_exp10(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @exp10_f64_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x double> @llvm.exp10.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call double @llvm.exp10.f64(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @exp2_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @exp2_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @exp2_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_exp2f(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @exp2_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_exp2f(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call fast float @exp2f(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %call, ptr %arrayidx, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @exp2_f64(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @exp2_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_exp2(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @exp2_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_exp2(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @exp2_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x double> @llvm.exp2.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call fast double @exp2(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %indvars.iv
+ store double %call, ptr %arrayidx, align 8
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @exp2_f32_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @exp2_f32_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.exp2.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @exp2_f32_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_exp2f(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @exp2_f32_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_exp2f(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call float @llvm.exp2.f32(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @exp2_f64_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @exp2_f64_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_exp2(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @exp2_f64_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_exp2(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @exp2_f64_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x double> @llvm.exp2.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call double @llvm.exp2.f64(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @log10_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @log10_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x float> @llvm.log10.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @log10_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_log10f(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @log10_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_log10f(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call fast float @log10f(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %call, ptr %arrayidx, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @log10_f64(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @log10_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_log10(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @log10_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_log10(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @log10_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x double> @llvm.log10.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call fast double @log10(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %indvars.iv
+ store double %call, ptr %arrayidx, align 8
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @log10_f32_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @log10_f32_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.log10.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @log10_f32_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_log10f(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @log10_f32_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_log10f(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call float @llvm.log10.f32(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @log10_f64_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @log10_f64_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_log10(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @log10_f64_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_log10(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @log10_f64_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x double> @llvm.log10.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call double @llvm.log10.f64(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @log2_f32(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @log2_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @log2_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x float> @_ZGVbN4v_log2f(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @log2_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_log2f(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call fast float @log2f(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %call, ptr %arrayidx, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @log2_f64(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @log2_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call fast <2 x double> @_ZGVbN2v_log2(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @log2_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_log2(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @log2_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x double> @llvm.log2.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call fast double @log2(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %indvars.iv
+ store double %call, ptr %arrayidx, align 8
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @log2_f32_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @log2_f32_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x float> @llvm.log2.v2f32(<2 x float> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @log2_f32_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x float> @_ZGVbN4v_log2f(<4 x float> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @log2_f32_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_log2f(<8 x float> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call float @llvm.log2.f32(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @log2_f64_intrinsic(ptr nocapture %varray) {
+; CHECK-VF2-LABEL: define void @log2_f64_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF2: [[TMP1:%.*]] = call <2 x double> @_ZGVbN2v_log2(<2 x double> [[TMP0:%.*]])
+;
+; CHECK-VF4-LABEL: define void @log2_f64_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_log2(<4 x double> [[TMP0:%.*]])
+;
+; CHECK-VF8-LABEL: define void @log2_f64_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x double> @llvm.log2.v8f64(<8 x double> [[TMP0:%.*]])
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call double @llvm.log2.f64(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 8
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @atan2_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
+; CHECK-VF2-LABEL: define void @atan2_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF2: [[TMP4:%.*]] = call fast <2 x float> @llvm.atan2.v2f32(<2 x float> [[TMP2:%.*]], <2 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF2: [[I2:%.*]] = tail call fast float @atan2f(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR13:[0-9]+]]
+;
+; CHECK-VF4-LABEL: define void @atan2_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF4: [[TMP4:%.*]] = call fast <4 x float> @_ZGVbN4vv_atan2f(<4 x float> [[TMP2:%.*]], <4 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF4: [[I2:%.*]] = tail call fast float @atan2f(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR5:[0-9]+]]
+;
+; CHECK-VF8-LABEL: define void @atan2_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF8: [[TMP4:%.*]] = call fast <8 x float> @_ZGVdN8vv_atan2f(<8 x float> [[TMP2:%.*]], <8 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF8: [[I2:%.*]] = tail call fast float @atan2f(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR13:[0-9]+]]
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %arrayidx = getelementptr inbounds float, ptr %exp, i64 %indvars.iv
+ %i1 = load float, ptr %arrayidx, align 4
+ %i2 = tail call fast float @atan2f(float %conv, float %i1)
+ %arrayidx2 = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %i2, ptr %arrayidx2, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @atan2_f64(ptr nocapture %varray, ptr nocapture readonly %exp) {
+; CHECK-VF2-LABEL: define void @atan2_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF2: [[TMP4:%.*]] = call fast <2 x double> @_ZGVbN2vv_atan2(<2 x double> [[TMP2:%.*]], <2 x double> [[WIDE_LOAD:%.*]])
+; CHECK-VF2: [[I2:%.*]] = tail call fast double @atan2(double [[CONV:%.*]], double [[I1:%.*]]) #[[ATTR14:[0-9]+]]
+;
+; CHECK-VF4-LABEL: define void @atan2_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF4: [[TMP4:%.*]] = call fast <4 x double> @_ZGVdN4vv_atan2(<4 x double> [[TMP2:%.*]], <4 x double> [[WIDE_LOAD:%.*]])
+; CHECK-VF4: [[I2:%.*]] = tail call fast double @atan2(double [[CONV:%.*]], double [[I1:%.*]]) #[[ATTR6:[0-9]+]]
+;
+; CHECK-VF8-LABEL: define void @atan2_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF8: [[TMP4:%.*]] = call fast <8 x double> @llvm.atan2.v8f64(<8 x double> [[TMP2:%.*]], <8 x double> [[WIDE_LOAD:%.*]])
+; CHECK-VF8: [[I2:%.*]] = tail call fast double @atan2(double [[CONV:%.*]], double [[I1:%.*]]) #[[ATTR14:[0-9]+]]
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to double
+ %arrayidx = getelementptr inbounds double, ptr %exp, i64 %indvars.iv
+ %i1 = load double, ptr %arrayidx, align 8
+ %i2 = tail call fast double @atan2(double %conv, double %i1)
+ %arrayidx2 = getelementptr inbounds double, ptr %varray, i64 %indvars.iv
+ store double %i2, ptr %arrayidx2, align 8
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @atan2_f32_intrinsic(ptr nocapture %varray, ptr nocapture readonly %exp) {
+; CHECK-VF2-LABEL: define void @atan2_f32_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF2: [[TMP4:%.*]] = call <2 x float> @llvm.atan2.v2f32(<2 x float> [[TMP2:%.*]], <2 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF2: [[I2:%.*]] = tail call float @llvm.atan2.f32(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR15:[0-9]+]]
+;
+; CHECK-VF4-LABEL: define void @atan2_f32_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF4: [[TMP4:%.*]] = call <4 x float> @_ZGVbN4vv_atan2f(<4 x float> [[TMP2:%.*]], <4 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF4: [[I2:%.*]] = tail call float @llvm.atan2.f32(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR7:[0-9]+]]
+;
+; CHECK-VF8-LABEL: define void @atan2_f32_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF8: [[TMP4:%.*]] = call <8 x float> @_ZGVdN8vv_atan2f(<8 x float> [[TMP2:%.*]], <8 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF8: [[I2:%.*]] = tail call float @llvm.atan2.f32(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR15:[0-9]+]]
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to float
+ %arrayidx = getelementptr inbounds float, ptr %exp, i64 %iv
+ %i1 = load float, ptr %arrayidx, align 4
+ %i2 = tail call float @llvm.atan2.f32(float %conv, float %i1)
+ %arrayidx2 = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %i2, ptr %arrayidx2, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @atan2_f64_intrinsic(ptr nocapture %varray, ptr nocapture readonly %exp) {
+; CHECK-VF2-LABEL: define void @atan2_f64_intrinsic(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF2: [[TMP4:%.*]] = call <2 x double> @_ZGVbN2vv_atan2(<2 x double> [[TMP2:%.*]], <2 x double> [[WIDE_LOAD:%.*]])
+; CHECK-VF2: [[I2:%.*]] = tail call double @llvm.atan2.f64(double [[CONV:%.*]], double [[I1:%.*]]) #[[ATTR16:[0-9]+]]
+;
+; CHECK-VF4-LABEL: define void @atan2_f64_intrinsic(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF4: [[TMP4:%.*]] = call <4 x double> @_ZGVdN4vv_atan2(<4 x double> [[TMP2:%.*]], <4 x double> [[WIDE_LOAD:%.*]])
+; CHECK-VF4: [[I2:%.*]] = tail call double @llvm.atan2.f64(double [[CONV:%.*]], double [[I1:%.*]]) #[[ATTR8:[0-9]+]]
+;
+; CHECK-VF8-LABEL: define void @atan2_f64_intrinsic(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF8: [[TMP4:%.*]] = call <8 x double> @llvm.atan2.v8f64(<8 x double> [[TMP2:%.*]], <8 x double> [[WIDE_LOAD:%.*]])
+; CHECK-VF8: [[I2:%.*]] = tail call double @llvm.atan2.f64(double [[CONV:%.*]], double [[I1:%.*]]) #[[ATTR16:[0-9]+]]
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %arrayidx = getelementptr inbounds double, ptr %exp, i64 %iv
+ %i1 = load double, ptr %arrayidx, align 8
+ %i2 = tail call double @llvm.atan2.f64(double %conv, double %i1)
+ %arrayidx2 = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %i2, ptr %arrayidx2, align 8
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @hypot_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
+; CHECK-VF2-LABEL: define void @hypot_f32(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF2: [[TMP6:%.*]] = tail call fast float @hypotf(float [[TMP4:%.*]], float [[TMP5:%.*]]) #[[ATTR17:[0-9]+]]
+; CHECK-VF2: [[TMP9:%.*]] = tail call fast float @hypotf(float [[TMP7:%.*]], float [[TMP8:%.*]]) #[[ATTR17]]
+; CHECK-VF2: [[I2:%.*]] = tail call fast float @hypotf(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR17]]
+;
+; CHECK-VF4-LABEL: define void @hypot_f32(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF4: [[TMP4:%.*]] = call fast <4 x float> @_ZGVbN4vv_hypotf(<4 x float> [[TMP2:%.*]], <4 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF4: [[I2:%.*]] = tail call fast float @hypotf(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR9:[0-9]+]]
+;
+; CHECK-VF8-LABEL: define void @hypot_f32(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF8: [[TMP4:%.*]] = call fast <8 x float> @_ZGVdN8vv_hypotf(<8 x float> [[TMP2:%.*]], <8 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF8: [[I2:%.*]] = tail call fast float @hypotf(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR17:[0-9]+]]
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to float
+ %arrayidx = getelementptr inbounds float, ptr %exp, i64 %indvars.iv
+ %i1 = load float, ptr %arrayidx, align 4
+ %i2 = tail call fast float @hypotf(float %conv, float %i1)
+ %arrayidx2 = getelementptr inbounds float, ptr %varray, i64 %indvars.iv
+ store float %i2, ptr %arrayidx2, align 4
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @hypot_f64(ptr nocapture %varray, ptr nocapture readonly %exp) {
+; CHECK-VF2-LABEL: define void @hypot_f64(
+; CHECK-VF2-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF2: [[TMP4:%.*]] = call fast <2 x double> @_ZGVbN2vv_hypot(<2 x double> [[TMP2:%.*]], <2 x double> [[WIDE_LOAD:%.*]])
+; CHECK-VF2: [[I2:%.*]] = tail call fast double @hypot(double [[CONV:%.*]], double [[I1:%.*]]) #[[ATTR18:[0-9]+]]
+;
+; CHECK-VF4-LABEL: define void @hypot_f64(
+; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF4: [[TMP4:%.*]] = call fast <4 x double> @_ZGVdN4vv_hypot(<4 x double> [[TMP2:%.*]], <4 x double> [[WIDE_LOAD:%.*]])
+; CHECK-VF4: [[I2:%.*]] = tail call fast double @hypot(double [[CONV:%.*]], double [[I1:%.*]]) #[[ATTR10:[0-9]+]]
+;
+; CHECK-VF8-LABEL: define void @hypot_f64(
+; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
+; CHECK-VF8: [[TMP6:%.*]] = tail call fast double @hypot(double [[TMP4:%.*]], double [[TMP5:%.*]]) #[[ATTR18:[0-9]+]]
+; CHECK-VF8: [[TMP9:%.*]] = tail call fast double @hypot(double [[TMP7:%.*]], double [[TMP8:%.*]]) #[[ATTR18]]
+; CHECK-VF8: [[TMP12:%.*]] = tail call fast double @hypot(double [[TMP10:%.*]], double [[TMP11:%.*]]) #[[ATTR18]]
+; CHECK-VF8: [[TMP15:%.*]] = tail call fast double @hypot(double [[TMP13:%.*]], double [[TMP14:%.*]]) #[[ATTR18]]
+; CHECK-VF8: [[TMP18:%.*]] = tail call fast double @hypot(double [[TMP16:%.*]], double [[TMP17:%.*]]) #[[ATTR18]]
+; CHECK-VF8: [[TMP21:%.*]] = tail call fast double @hypot(double [[TMP19:%.*]], double [[TMP20:%.*]]) #[[ATTR18]]
+; CHECK-VF8: [[TMP24:%.*]] = tail call fast double @hypot(double [[TMP22:%.*]], double [[TMP23:%.*]]) #[[ATTR18]]
+; CHECK-VF8: [[TMP27:%.*]] = tail call fast double @hypot(double [[TMP25:%.*]], double [[TMP26:%.*]]) #[[ATTR18]]
+; CHECK-VF8: [[I2:%.*]] = tail call fast double @hypot(double [[CONV:%.*]], double [[I1:%.*]]) #[[ATTR18]]
+;
+entry:
+ br label %for.body
+
+for.body:
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %tmp = trunc i64 %indvars.iv to i32
+ %conv = sitofp i32 %tmp to double
+ %arrayidx = getelementptr inbounds double, ptr %exp, i64 %indvars.iv
+ %i1 = load double, ptr %arrayidx, align 8
+ %i2 = tail call fast double @hypot(double %conv, double %i1)
+ %arrayidx2 = getelementptr inbounds double, ptr %varray, i64 %indvars.iv
+ store double %i2, ptr %arrayidx2, align 8
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %exitcond = icmp eq i64 %indvars.iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
diff --git a/llvm/test/Transforms/Util/add-TLI-mappings.ll b/llvm/test/Transforms/Util/add-TLI-mappings.ll
index 28d3edfd0ba626..8da099842df267 100644
--- a/llvm/test/Transforms/Util/add-TLI-mappings.ll
+++ b/llvm/test/Transforms/Util/add-TLI-mappings.ll
@@ -49,9 +49,11 @@
; LIBMVEC-AARCH64-SAME: ptr @_ZGVnN2v_log10f,
; LIBMVEC-AARCH64-SAME: ptr @_ZGVnN4v_log10f,
; LIBMVEC-AARCH64-SAME: ptr @_ZGVsMxv_log10f
-; LIBMVEC-X86-SAME: [2 x ptr] [
+; LIBMVEC-X86-SAME: [4 x ptr] [
; LIBMVEC-X86-SAME: ptr @_ZGVbN2v_sin,
-; LIBMVEC-X86-SAME: ptr @_ZGVdN4v_sin
+; LIBMVEC-X86-SAME: ptr @_ZGVdN4v_sin,
+; LIBMVEC-X86-SAME: ptr @_ZGVbN4v_log10f,
+; LIBMVEC-X86-SAME: ptr @_ZGVdN8v_log10f
; SLEEFGNUABI-SAME: [18 x ptr] [
; SLEEFGNUABI-SAME: ptr @_ZGVnN2vl8_modf,
; SLEEFGNUABI-SAME: ptr @_ZGVsNxvl8_modf,
@@ -205,7 +207,7 @@ define float @call_llvm.log10.f32(float %in) {
; SVML: call float @llvm.log10.f32(float %{{.*}})
; AMDLIBM: call float @llvm.log10.f32(float %{{.*}}) #[[LOG10:[0-9]+]]
; LIBMVEC-AARCH64: call float @llvm.log10.f32(float %{{.*}}) #[[LOG10:[0-9]+]]
-; LIBMVEC-X86: call float @llvm.log10.f32(float %{{.*}})
+; LIBMVEC-X86: call float @llvm.log10.f32(float %{{.*}}) #[[LOG10:[0-9]+]]
; MASSV: call float @llvm.log10.f32(float %{{.*}}) #[[LOG10:[0-9]+]]
; ACCELERATE: call float @llvm.log10.f32(float %{{.*}}) #[[LOG10:[0-9]+]]
; SLEEFGNUABI: call float @llvm.log10.f32(float %{{.*}}) #[[LOG10:[0-9]+]]
@@ -215,7 +217,6 @@ define float @call_llvm.log10.f32(float %in) {
; SVML-NOT: _ZGV_LLVM_{{.*}}_llvm.log10.f32({{.*}})
; AMDLIBM-NOT: _ZGV_LLVM_{{.*}}_llvm.log10.f32({{.*}})
; LIBMVEC-AARCH64-NOT: _ZGV_LLVM_{{.*}}_llvm.log10.f32({{.*}})
-; LIBMVEC-X86-NOT: _ZGV_LLVM_{{.*}}_llvm.log10.f32({{.*}})
%call = tail call float @llvm.log10.f32(float %in)
ret float %call
}
@@ -263,6 +264,8 @@ declare double @ldexp(double, i32 signext) #0
; LIBMVEC-X86: declare <2 x double> @_ZGVbN2v_sin(<2 x double>)
; LIBMVEC-X86: declare <4 x double> @_ZGVdN4v_sin(<4 x double>)
+; LIBMVEC-X86: declare <4 x float> @_ZGVbN4v_log10f(<4 x float>)
+; LIBMVEC-X86: declare <8 x float> @_ZGVdN8v_log10f(<8 x float>)
; ACCELERATE: declare <4 x float> @vlog10f(<4 x float>)
@@ -359,6 +362,9 @@ attributes #0 = { nounwind readnone }
; LIBMVEC-X86: attributes #[[SIN]] = { "vector-function-abi-variant"=
; LIBMVEC-X86-SAME: "_ZGV_LLVM_N2v_sin(_ZGVbN2v_sin),
; LIBMVEC-X86-SAME: _ZGV_LLVM_N4v_sin(_ZGVdN4v_sin)" }
+; LIBMVEC-X86: attributes #[[LOG10]] = { "vector-function-abi-variant"=
+; LIBMVEC-X86-SAME: "_ZGV_LLVM_N4v_llvm.log10.f32(_ZGVbN4v_log10f),
+; LIBMVEC-X86-SAME: _ZGV_LLVM_N8v_llvm.log10.f32(_ZGVdN8v_log10f)" }
; SLEEFGNUABI: attributes #[[MODF]] = { "vector-function-abi-variant"=
; SLEEFGNUABI-SAME: "_ZGV_LLVM_N2vl8_modf(_ZGVnN2vl8_modf),
>From 4de2846948401d0c0e73918fdb6c1177e234a681 Mon Sep 17 00:00:00 2001
From: anun333 <anun333 at posteo.net>
Date: Wed, 23 Sep 2026 06:39:52 -0500
Subject: [PATCH 2/3] [TLI] Move the x86 ReplaceWithVeclib libmvec test under
Transforms
It runs opt, so it belongs with the pass's other tests rather than in
CodeGen, as requested in review.
Assisted-by: Claude Opus 5.5 (Claude Code)
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
---
llvm/test/Transforms/ReplaceWithVeclib/X86/lit.local.cfg | 2 ++
.../ReplaceWithVeclib}/X86/replace-with-veclib-libmvec.ll | 7 ++-----
2 files changed, 4 insertions(+), 5 deletions(-)
create mode 100644 llvm/test/Transforms/ReplaceWithVeclib/X86/lit.local.cfg
rename llvm/test/{CodeGen => Transforms/ReplaceWithVeclib}/X86/replace-with-veclib-libmvec.ll (98%)
diff --git a/llvm/test/Transforms/ReplaceWithVeclib/X86/lit.local.cfg b/llvm/test/Transforms/ReplaceWithVeclib/X86/lit.local.cfg
new file mode 100644
index 00000000000000..42bf50dcc13c35
--- /dev/null
+++ b/llvm/test/Transforms/ReplaceWithVeclib/X86/lit.local.cfg
@@ -0,0 +1,2 @@
+if not "X86" in config.root.targets:
+ config.unsupported = True
diff --git a/llvm/test/CodeGen/X86/replace-with-veclib-libmvec.ll b/llvm/test/Transforms/ReplaceWithVeclib/X86/replace-with-veclib-libmvec.ll
similarity index 98%
rename from llvm/test/CodeGen/X86/replace-with-veclib-libmvec.ll
rename to llvm/test/Transforms/ReplaceWithVeclib/X86/replace-with-veclib-libmvec.ll
index 29cdb68d520e93..d003e86bb5f094 100644
--- a/llvm/test/CodeGen/X86/replace-with-veclib-libmvec.ll
+++ b/llvm/test/Transforms/ReplaceWithVeclib/X86/replace-with-veclib-libmvec.ll
@@ -1,11 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals
; RUN: opt -vector-library=LIBMVEC -replace-with-veclib -S < %s | FileCheck %s
-; Checks that the x86 libmvec table is reachable from ReplaceWithVeclib, which
-; runs for every target at -O1 and above. The AArch64 equivalent is
-; llvm/test/CodeGen/AArch64/replace-with-veclib-libmvec.ll; x86 had no
-; counterpart. Only functions whose llvm.* intrinsic name is in the table can
-; be replaced here, so this covers the intrinsic rows specifically.
+; Checks that the x86 libmvec table's llvm.* intrinsic rows are reachable
+; from ReplaceWithVeclib.
target triple = "x86_64-unknown-linux-gnu"
>From 262200e9dd0af74773525662c64d390ed66bce44 Mon Sep 17 00:00:00 2001
From: anun333 <anun333 at posteo.net>
Date: Thu, 24 Sep 2026 23:49:50 -0500
Subject: [PATCH 3/3] [TLI] Defer the new x86 libmvec _ZGVd rows until #162239
is fixed
The vectorizer does not check a mapping's ISA class against the target's
features (#162239), so an AVX2 _ZGVd row can be chosen for a target without
AVX2, where it reads YMM lanes the SSE2 caller never wrote. Adding _ZGVd
rows for more functions extends that wrong-code exposure to them (for
example exp2((double)float) at -march=x86-64, 32 of 64 results wrong).
Keep the new SSE2 (_ZGVb) rows, which are valid on every x86-64 target,
and drop the new _ZGVd rows. They can return once target-feature selection
is fixed. The _ZGVd rows that were in the table before this PR are not
changed.
Assisted-by: Claude Opus 5.5 (Claude Code)
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
---
llvm/include/llvm/Analysis/VecFuncs.def | 46 --------
.../LoopVectorize/X86/libm-vector-calls.ll | 106 ++++++++++--------
.../X86/replace-with-veclib-libmvec.ll | 46 ++++----
llvm/test/Transforms/Util/add-TLI-mappings.ll | 9 +-
4 files changed, 84 insertions(+), 123 deletions(-)
diff --git a/llvm/include/llvm/Analysis/VecFuncs.def b/llvm/include/llvm/Analysis/VecFuncs.def
index 7e8d32ba3f7b78..0b0091e9d73249 100644
--- a/llvm/include/llvm/Analysis/VecFuncs.def
+++ b/llvm/include/llvm/Analysis/VecFuncs.def
@@ -291,142 +291,96 @@ TLI_DEFINE_VECFUNC("atanhf", "_ZGVdN8v_atanhf", FIXED(8), "_ZGV_LLVM_N8v")
// intrinsics rather than libcalls. hypot has no intrinsic, so it is
// libcall-only.
TLI_DEFINE_VECFUNC("acos", "_ZGVbN2v_acos", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("acos", "_ZGVdN4v_acos", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("acosf", "_ZGVbN4v_acosf", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("acosf", "_ZGVdN8v_acosf", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("llvm.acos.f64", "_ZGVbN2v_acos", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("llvm.acos.f64", "_ZGVdN4v_acos", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("llvm.acos.f32", "_ZGVbN4v_acosf", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("llvm.acos.f32", "_ZGVdN8v_acosf", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("asin", "_ZGVbN2v_asin", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("asin", "_ZGVdN4v_asin", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("asinf", "_ZGVbN4v_asinf", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("asinf", "_ZGVdN8v_asinf", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("llvm.asin.f64", "_ZGVbN2v_asin", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("llvm.asin.f64", "_ZGVdN4v_asin", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("llvm.asin.f32", "_ZGVbN4v_asinf", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("llvm.asin.f32", "_ZGVdN8v_asinf", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("atan", "_ZGVbN2v_atan", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("atan", "_ZGVdN4v_atan", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("atanf", "_ZGVbN4v_atanf", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("atanf", "_ZGVdN8v_atanf", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("llvm.atan.f64", "_ZGVbN2v_atan", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("llvm.atan.f64", "_ZGVdN4v_atan", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("llvm.atan.f32", "_ZGVbN4v_atanf", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("llvm.atan.f32", "_ZGVdN8v_atanf", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("cosh", "_ZGVbN2v_cosh", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("cosh", "_ZGVdN4v_cosh", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("coshf", "_ZGVbN4v_coshf", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("coshf", "_ZGVdN8v_coshf", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("llvm.cosh.f64", "_ZGVbN2v_cosh", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("llvm.cosh.f64", "_ZGVdN4v_cosh", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("llvm.cosh.f32", "_ZGVbN4v_coshf", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("llvm.cosh.f32", "_ZGVdN8v_coshf", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("sinh", "_ZGVbN2v_sinh", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("sinh", "_ZGVdN4v_sinh", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("sinhf", "_ZGVbN4v_sinhf", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("sinhf", "_ZGVdN8v_sinhf", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("llvm.sinh.f64", "_ZGVbN2v_sinh", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("llvm.sinh.f64", "_ZGVdN4v_sinh", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("llvm.sinh.f32", "_ZGVbN4v_sinhf", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("llvm.sinh.f32", "_ZGVdN8v_sinhf", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("tanh", "_ZGVbN2v_tanh", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("tanh", "_ZGVdN4v_tanh", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("tanhf", "_ZGVbN4v_tanhf", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("tanhf", "_ZGVdN8v_tanhf", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("llvm.tanh.f64", "_ZGVbN2v_tanh", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("llvm.tanh.f64", "_ZGVdN4v_tanh", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("llvm.tanh.f32", "_ZGVbN4v_tanhf", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("llvm.tanh.f32", "_ZGVdN8v_tanhf", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("exp10", "_ZGVbN2v_exp10", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("exp10", "_ZGVdN4v_exp10", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("exp10f", "_ZGVbN4v_exp10f", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("exp10f", "_ZGVdN8v_exp10f", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("llvm.exp10.f64", "_ZGVbN2v_exp10", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("llvm.exp10.f64", "_ZGVdN4v_exp10", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("llvm.exp10.f32", "_ZGVbN4v_exp10f", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("llvm.exp10.f32", "_ZGVdN8v_exp10f", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("exp2", "_ZGVbN2v_exp2", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("exp2", "_ZGVdN4v_exp2", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("exp2f", "_ZGVbN4v_exp2f", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("exp2f", "_ZGVdN8v_exp2f", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("llvm.exp2.f64", "_ZGVbN2v_exp2", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("llvm.exp2.f64", "_ZGVdN4v_exp2", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("llvm.exp2.f32", "_ZGVbN4v_exp2f", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("llvm.exp2.f32", "_ZGVdN8v_exp2f", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("log10", "_ZGVbN2v_log10", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("log10", "_ZGVdN4v_log10", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("log10f", "_ZGVbN4v_log10f", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("log10f", "_ZGVdN8v_log10f", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("llvm.log10.f64", "_ZGVbN2v_log10", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("llvm.log10.f64", "_ZGVdN4v_log10", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("llvm.log10.f32", "_ZGVbN4v_log10f", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("llvm.log10.f32", "_ZGVdN8v_log10f", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("log2", "_ZGVbN2v_log2", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("log2", "_ZGVdN4v_log2", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("log2f", "_ZGVbN4v_log2f", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("log2f", "_ZGVdN8v_log2f", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("llvm.log2.f64", "_ZGVbN2v_log2", FIXED(2), "_ZGV_LLVM_N2v")
-TLI_DEFINE_VECFUNC("llvm.log2.f64", "_ZGVdN4v_log2", FIXED(4), "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("llvm.log2.f32", "_ZGVbN4v_log2f", FIXED(4), "_ZGV_LLVM_N4v")
-TLI_DEFINE_VECFUNC("llvm.log2.f32", "_ZGVdN8v_log2f", FIXED(8), "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("atan2", "_ZGVbN2vv_atan2", FIXED(2), "_ZGV_LLVM_N2vv")
-TLI_DEFINE_VECFUNC("atan2", "_ZGVdN4vv_atan2", FIXED(4), "_ZGV_LLVM_N4vv")
TLI_DEFINE_VECFUNC("atan2f", "_ZGVbN4vv_atan2f", FIXED(4), "_ZGV_LLVM_N4vv")
-TLI_DEFINE_VECFUNC("atan2f", "_ZGVdN8vv_atan2f", FIXED(8), "_ZGV_LLVM_N8vv")
TLI_DEFINE_VECFUNC("llvm.atan2.f64", "_ZGVbN2vv_atan2", FIXED(2), "_ZGV_LLVM_N2vv")
-TLI_DEFINE_VECFUNC("llvm.atan2.f64", "_ZGVdN4vv_atan2", FIXED(4), "_ZGV_LLVM_N4vv")
TLI_DEFINE_VECFUNC("llvm.atan2.f32", "_ZGVbN4vv_atan2f", FIXED(4), "_ZGV_LLVM_N4vv")
-TLI_DEFINE_VECFUNC("llvm.atan2.f32", "_ZGVdN8vv_atan2f", FIXED(8), "_ZGV_LLVM_N8vv")
TLI_DEFINE_VECFUNC("hypot", "_ZGVbN2vv_hypot", FIXED(2), "_ZGV_LLVM_N2vv")
-TLI_DEFINE_VECFUNC("hypot", "_ZGVdN4vv_hypot", FIXED(4), "_ZGV_LLVM_N4vv")
TLI_DEFINE_VECFUNC("hypotf", "_ZGVbN4vv_hypotf", FIXED(4), "_ZGV_LLVM_N4vv")
-TLI_DEFINE_VECFUNC("hypotf", "_ZGVdN8vv_hypotf", FIXED(8), "_ZGV_LLVM_N8vv")
// sincos/sincosf held out: glibc exports _ZGV{b,c,d,e}N?vvv_sincos
// (three v's), which does not match the vl8l8 linear-pointer
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
index ebb2857cff705a..66210cee151234 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
@@ -1170,7 +1170,7 @@ define void @acos_f32(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @acos_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_acosf(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @llvm.acos.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1197,7 +1197,7 @@ define void @acos_f64(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @acos_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_acos(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @llvm.acos.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @acos_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -1232,7 +1232,7 @@ define void @acos_f32_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @acos_f32_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_acosf(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @llvm.acos.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1259,7 +1259,7 @@ define void @acos_f64_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @acos_f64_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_acos(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @llvm.acos.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @acos_f64_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -1294,7 +1294,7 @@ define void @asin_f32(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @asin_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_asinf(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @llvm.asin.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1321,7 +1321,7 @@ define void @asin_f64(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @asin_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_asin(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @llvm.asin.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @asin_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -1356,7 +1356,7 @@ define void @asin_f32_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @asin_f32_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_asinf(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @llvm.asin.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1383,7 +1383,7 @@ define void @asin_f64_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @asin_f64_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_asin(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @llvm.asin.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @asin_f64_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -1418,7 +1418,7 @@ define void @atan_f32(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @atan_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_atanf(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @llvm.atan.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1445,7 +1445,7 @@ define void @atan_f64(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @atan_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_atan(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @llvm.atan.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @atan_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -1480,7 +1480,7 @@ define void @atan_f32_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @atan_f32_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_atanf(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @llvm.atan.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1507,7 +1507,7 @@ define void @atan_f64_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @atan_f64_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_atan(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @llvm.atan.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @atan_f64_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -1542,7 +1542,7 @@ define void @cosh_f32(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @cosh_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_coshf(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @llvm.cosh.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1569,7 +1569,7 @@ define void @cosh_f64(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @cosh_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_cosh(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @llvm.cosh.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @cosh_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -1604,7 +1604,7 @@ define void @cosh_f32_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @cosh_f32_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_coshf(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @llvm.cosh.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1631,7 +1631,7 @@ define void @cosh_f64_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @cosh_f64_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_cosh(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @llvm.cosh.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @cosh_f64_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -1666,7 +1666,7 @@ define void @sinh_f32(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @sinh_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_sinhf(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @llvm.sinh.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1693,7 +1693,7 @@ define void @sinh_f64(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @sinh_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_sinh(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @llvm.sinh.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @sinh_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -1728,7 +1728,7 @@ define void @sinh_f32_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @sinh_f32_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_sinhf(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @llvm.sinh.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1755,7 +1755,7 @@ define void @sinh_f64_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @sinh_f64_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_sinh(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @llvm.sinh.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @sinh_f64_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -1790,7 +1790,7 @@ define void @tanh_f32(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @tanh_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_tanhf(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @llvm.tanh.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1817,7 +1817,7 @@ define void @tanh_f64(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @tanh_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_tanh(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @llvm.tanh.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @tanh_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -1852,7 +1852,7 @@ define void @tanh_f32_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @tanh_f32_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_tanhf(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @llvm.tanh.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1879,7 +1879,7 @@ define void @tanh_f64_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @tanh_f64_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_tanh(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @llvm.tanh.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @tanh_f64_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -1914,7 +1914,7 @@ define void @exp10_f32(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @exp10_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_exp10f(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @llvm.exp10.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -1941,7 +1941,7 @@ define void @exp10_f64(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @exp10_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_exp10(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @llvm.exp10.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @exp10_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -1976,7 +1976,7 @@ define void @exp10_f32_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @exp10_f32_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_exp10f(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @llvm.exp10.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -2003,7 +2003,7 @@ define void @exp10_f64_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @exp10_f64_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_exp10(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @llvm.exp10.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @exp10_f64_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -2038,7 +2038,7 @@ define void @exp2_f32(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @exp2_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_exp2f(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @llvm.exp2.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -2065,7 +2065,7 @@ define void @exp2_f64(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @exp2_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_exp2(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @llvm.exp2.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @exp2_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -2100,7 +2100,7 @@ define void @exp2_f32_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @exp2_f32_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_exp2f(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @llvm.exp2.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -2127,7 +2127,7 @@ define void @exp2_f64_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @exp2_f64_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_exp2(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @llvm.exp2.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @exp2_f64_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -2162,7 +2162,7 @@ define void @log10_f32(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @log10_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_log10f(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @llvm.log10.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -2189,7 +2189,7 @@ define void @log10_f64(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @log10_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_log10(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @llvm.log10.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @log10_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -2224,7 +2224,7 @@ define void @log10_f32_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @log10_f32_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_log10f(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @llvm.log10.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -2251,7 +2251,7 @@ define void @log10_f64_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @log10_f64_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_log10(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @llvm.log10.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @log10_f64_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -2286,7 +2286,7 @@ define void @log2_f32(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @log2_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_log2f(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call fast <8 x float> @llvm.log2.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -2313,7 +2313,7 @@ define void @log2_f64(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @log2_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_log2(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call fast <4 x double> @llvm.log2.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @log2_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -2348,7 +2348,7 @@ define void @log2_f32_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF8-LABEL: define void @log2_f32_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @_ZGVdN8v_log2f(<8 x float> [[TMP0:%.*]])
+; CHECK-VF8: [[TMP1:%.*]] = call <8 x float> @llvm.log2.v8f32(<8 x float> [[TMP0:%.*]])
;
entry:
br label %for.body
@@ -2375,7 +2375,7 @@ define void @log2_f64_intrinsic(ptr nocapture %varray) {
;
; CHECK-VF4-LABEL: define void @log2_f64_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]]) {
-; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @_ZGVdN4v_log2(<4 x double> [[TMP0:%.*]])
+; CHECK-VF4: [[TMP1:%.*]] = call <4 x double> @llvm.log2.v4f64(<4 x double> [[TMP0:%.*]])
;
; CHECK-VF8-LABEL: define void @log2_f64_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]]) {
@@ -2412,7 +2412,7 @@ define void @atan2_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
;
; CHECK-VF8-LABEL: define void @atan2_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF8: [[TMP4:%.*]] = call fast <8 x float> @_ZGVdN8vv_atan2f(<8 x float> [[TMP2:%.*]], <8 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF8: [[TMP4:%.*]] = call fast <8 x float> @llvm.atan2.v8f32(<8 x float> [[TMP2:%.*]], <8 x float> [[WIDE_LOAD:%.*]])
; CHECK-VF8: [[I2:%.*]] = tail call fast float @atan2f(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR13:[0-9]+]]
;
entry:
@@ -2443,7 +2443,7 @@ define void @atan2_f64(ptr nocapture %varray, ptr nocapture readonly %exp) {
;
; CHECK-VF4-LABEL: define void @atan2_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF4: [[TMP4:%.*]] = call fast <4 x double> @_ZGVdN4vv_atan2(<4 x double> [[TMP2:%.*]], <4 x double> [[WIDE_LOAD:%.*]])
+; CHECK-VF4: [[TMP4:%.*]] = call fast <4 x double> @llvm.atan2.v4f64(<4 x double> [[TMP2:%.*]], <4 x double> [[WIDE_LOAD:%.*]])
; CHECK-VF4: [[I2:%.*]] = tail call fast double @atan2(double [[CONV:%.*]], double [[I1:%.*]]) #[[ATTR6:[0-9]+]]
;
; CHECK-VF8-LABEL: define void @atan2_f64(
@@ -2484,7 +2484,7 @@ define void @atan2_f32_intrinsic(ptr nocapture %varray, ptr nocapture readonly %
;
; CHECK-VF8-LABEL: define void @atan2_f32_intrinsic(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF8: [[TMP4:%.*]] = call <8 x float> @_ZGVdN8vv_atan2f(<8 x float> [[TMP2:%.*]], <8 x float> [[WIDE_LOAD:%.*]])
+; CHECK-VF8: [[TMP4:%.*]] = call <8 x float> @llvm.atan2.v8f32(<8 x float> [[TMP2:%.*]], <8 x float> [[WIDE_LOAD:%.*]])
; CHECK-VF8: [[I2:%.*]] = tail call float @llvm.atan2.f32(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR15:[0-9]+]]
;
entry:
@@ -2515,7 +2515,7 @@ define void @atan2_f64_intrinsic(ptr nocapture %varray, ptr nocapture readonly %
;
; CHECK-VF4-LABEL: define void @atan2_f64_intrinsic(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF4: [[TMP4:%.*]] = call <4 x double> @_ZGVdN4vv_atan2(<4 x double> [[TMP2:%.*]], <4 x double> [[WIDE_LOAD:%.*]])
+; CHECK-VF4: [[TMP4:%.*]] = call <4 x double> @llvm.atan2.v4f64(<4 x double> [[TMP2:%.*]], <4 x double> [[WIDE_LOAD:%.*]])
; CHECK-VF4: [[I2:%.*]] = tail call double @llvm.atan2.f64(double [[CONV:%.*]], double [[I1:%.*]]) #[[ATTR8:[0-9]+]]
;
; CHECK-VF8-LABEL: define void @atan2_f64_intrinsic(
@@ -2557,8 +2557,15 @@ define void @hypot_f32(ptr nocapture %varray, ptr nocapture readonly %exp) {
;
; CHECK-VF8-LABEL: define void @hypot_f32(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF8: [[TMP4:%.*]] = call fast <8 x float> @_ZGVdN8vv_hypotf(<8 x float> [[TMP2:%.*]], <8 x float> [[WIDE_LOAD:%.*]])
-; CHECK-VF8: [[I2:%.*]] = tail call fast float @hypotf(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR17:[0-9]+]]
+; CHECK-VF8: [[TMP6:%.*]] = tail call fast float @hypotf(float [[TMP4:%.*]], float [[TMP5:%.*]]) #[[ATTR17:[0-9]+]]
+; CHECK-VF8: [[TMP9:%.*]] = tail call fast float @hypotf(float [[TMP7:%.*]], float [[TMP8:%.*]]) #[[ATTR17]]
+; CHECK-VF8: [[TMP12:%.*]] = tail call fast float @hypotf(float [[TMP10:%.*]], float [[TMP11:%.*]]) #[[ATTR17]]
+; CHECK-VF8: [[TMP15:%.*]] = tail call fast float @hypotf(float [[TMP13:%.*]], float [[TMP14:%.*]]) #[[ATTR17]]
+; CHECK-VF8: [[TMP18:%.*]] = tail call fast float @hypotf(float [[TMP16:%.*]], float [[TMP17:%.*]]) #[[ATTR17]]
+; CHECK-VF8: [[TMP21:%.*]] = tail call fast float @hypotf(float [[TMP19:%.*]], float [[TMP20:%.*]]) #[[ATTR17]]
+; CHECK-VF8: [[TMP24:%.*]] = tail call fast float @hypotf(float [[TMP22:%.*]], float [[TMP23:%.*]]) #[[ATTR17]]
+; CHECK-VF8: [[TMP27:%.*]] = tail call fast float @hypotf(float [[TMP25:%.*]], float [[TMP26:%.*]]) #[[ATTR17]]
+; CHECK-VF8: [[I2:%.*]] = tail call fast float @hypotf(float [[CONV:%.*]], float [[I1:%.*]]) #[[ATTR17]]
;
entry:
br label %for.body
@@ -2588,8 +2595,11 @@ define void @hypot_f64(ptr nocapture %varray, ptr nocapture readonly %exp) {
;
; CHECK-VF4-LABEL: define void @hypot_f64(
; CHECK-VF4-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
-; CHECK-VF4: [[TMP4:%.*]] = call fast <4 x double> @_ZGVdN4vv_hypot(<4 x double> [[TMP2:%.*]], <4 x double> [[WIDE_LOAD:%.*]])
-; CHECK-VF4: [[I2:%.*]] = tail call fast double @hypot(double [[CONV:%.*]], double [[I1:%.*]]) #[[ATTR10:[0-9]+]]
+; CHECK-VF4: [[TMP6:%.*]] = tail call fast double @hypot(double [[TMP4:%.*]], double [[TMP5:%.*]]) #[[ATTR10:[0-9]+]]
+; CHECK-VF4: [[TMP9:%.*]] = tail call fast double @hypot(double [[TMP7:%.*]], double [[TMP8:%.*]]) #[[ATTR10]]
+; CHECK-VF4: [[TMP12:%.*]] = tail call fast double @hypot(double [[TMP10:%.*]], double [[TMP11:%.*]]) #[[ATTR10]]
+; CHECK-VF4: [[TMP15:%.*]] = tail call fast double @hypot(double [[TMP13:%.*]], double [[TMP14:%.*]]) #[[ATTR10]]
+; CHECK-VF4: [[I2:%.*]] = tail call fast double @hypot(double [[CONV:%.*]], double [[I1:%.*]]) #[[ATTR10]]
;
; CHECK-VF8-LABEL: define void @hypot_f64(
; CHECK-VF8-SAME: ptr captures(none) [[VARRAY:%.*]], ptr readonly captures(none) [[EXP:%.*]]) {
diff --git a/llvm/test/Transforms/ReplaceWithVeclib/X86/replace-with-veclib-libmvec.ll b/llvm/test/Transforms/ReplaceWithVeclib/X86/replace-with-veclib-libmvec.ll
index d003e86bb5f094..b71b5f12061688 100644
--- a/llvm/test/Transforms/ReplaceWithVeclib/X86/replace-with-veclib-libmvec.ll
+++ b/llvm/test/Transforms/ReplaceWithVeclib/X86/replace-with-veclib-libmvec.ll
@@ -7,7 +7,7 @@
target triple = "x86_64-unknown-linux-gnu"
;.
-; CHECK: @llvm.compiler.used = appending global [68 x ptr] [ptr @_ZGVbN2v_sin, ptr @_ZGVbN4v_sinf, ptr @_ZGVbN2v_cos, ptr @_ZGVbN4v_cosf, ptr @_ZGVbN2v_tan, ptr @_ZGVbN4v_tanf, ptr @_ZGVbN2v_exp, ptr @_ZGVbN4v_expf, ptr @_ZGVbN2v_log, ptr @_ZGVbN4v_logf, ptr @_ZGVbN2vv_pow, ptr @_ZGVbN4vv_powf, ptr @_ZGVbN2v_acos, ptr @_ZGVbN4v_acosf, ptr @_ZGVbN2v_asin, ptr @_ZGVbN4v_asinf, ptr @_ZGVbN2v_atan, ptr @_ZGVbN4v_atanf, ptr @_ZGVbN2vv_atan2, ptr @_ZGVbN4vv_atan2f, ptr @_ZGVbN2v_cosh, ptr @_ZGVbN4v_coshf, ptr @_ZGVbN2v_sinh, ptr @_ZGVbN4v_sinhf, ptr @_ZGVbN2v_tanh, ptr @_ZGVbN4v_tanhf, ptr @_ZGVbN2v_exp10, ptr @_ZGVbN4v_exp10f, ptr @_ZGVbN2v_exp2, ptr @_ZGVbN4v_exp2f, ptr @_ZGVbN2v_log10, ptr @_ZGVbN4v_log10f, ptr @_ZGVbN2v_log2, ptr @_ZGVbN4v_log2f, ptr @_ZGVdN4v_sin, ptr @_ZGVdN8v_sinf, ptr @_ZGVdN4v_cos, ptr @_ZGVdN8v_cosf, ptr @_ZGVdN4v_tan, ptr @_ZGVdN8v_tanf, ptr @_ZGVdN4v_exp, ptr @_ZGVdN8v_expf, ptr @_ZGVdN4v_log, ptr @_ZGVdN8v_logf, ptr @_ZGVdN4vv_pow, ptr @_ZGVdN8vv_powf, ptr @_ZGVdN4v_acos, ptr @_ZGVdN8v_acosf, ptr @_ZGVdN4v_asin, ptr @_ZGVdN8v_asinf, ptr @_ZGVdN4v_atan, ptr @_ZGVdN8v_atanf, ptr @_ZGVdN4vv_atan2, ptr @_ZGVdN8vv_atan2f, ptr @_ZGVdN4v_cosh, ptr @_ZGVdN8v_coshf, ptr @_ZGVdN4v_sinh, ptr @_ZGVdN8v_sinhf, ptr @_ZGVdN4v_tanh, ptr @_ZGVdN8v_tanhf, ptr @_ZGVdN4v_exp10, ptr @_ZGVdN8v_exp10f, ptr @_ZGVdN4v_exp2, ptr @_ZGVdN8v_exp2f, ptr @_ZGVdN4v_log10, ptr @_ZGVdN8v_log10f, ptr @_ZGVdN4v_log2, ptr @_ZGVdN8v_log2f], section "llvm.metadata"
+; CHECK: @llvm.compiler.used = appending global [46 x ptr] [ptr @_ZGVbN2v_sin, ptr @_ZGVbN4v_sinf, ptr @_ZGVbN2v_cos, ptr @_ZGVbN4v_cosf, ptr @_ZGVbN2v_tan, ptr @_ZGVbN4v_tanf, ptr @_ZGVbN2v_exp, ptr @_ZGVbN4v_expf, ptr @_ZGVbN2v_log, ptr @_ZGVbN4v_logf, ptr @_ZGVbN2vv_pow, ptr @_ZGVbN4vv_powf, ptr @_ZGVbN2v_acos, ptr @_ZGVbN4v_acosf, ptr @_ZGVbN2v_asin, ptr @_ZGVbN4v_asinf, ptr @_ZGVbN2v_atan, ptr @_ZGVbN4v_atanf, ptr @_ZGVbN2vv_atan2, ptr @_ZGVbN4vv_atan2f, ptr @_ZGVbN2v_cosh, ptr @_ZGVbN4v_coshf, ptr @_ZGVbN2v_sinh, ptr @_ZGVbN4v_sinhf, ptr @_ZGVbN2v_tanh, ptr @_ZGVbN4v_tanhf, ptr @_ZGVbN2v_exp10, ptr @_ZGVbN4v_exp10f, ptr @_ZGVbN2v_exp2, ptr @_ZGVbN4v_exp2f, ptr @_ZGVbN2v_log10, ptr @_ZGVbN4v_log10f, ptr @_ZGVbN2v_log2, ptr @_ZGVbN4v_log2f, ptr @_ZGVdN4v_sin, ptr @_ZGVdN8v_sinf, ptr @_ZGVdN4v_cos, ptr @_ZGVdN8v_cosf, ptr @_ZGVdN4v_tan, ptr @_ZGVdN8v_tanf, ptr @_ZGVdN4v_exp, ptr @_ZGVdN8v_expf, ptr @_ZGVdN4v_log, ptr @_ZGVdN8v_logf, ptr @_ZGVdN4vv_pow, ptr @_ZGVdN8vv_powf], section "llvm.metadata"
;.
define <2 x double> @llvm_sin_f64(<2 x double> %in0) {
; CHECK-LABEL: @llvm_sin_f64(
@@ -463,7 +463,7 @@ define <8 x float> @llvm_pow_wide_f32(<8 x float> %in0, <8 x float> %in1) {
define <4 x double> @llvm_acos_wide_f64(<4 x double> %in0) {
; CHECK-LABEL: @llvm_acos_wide_f64(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_acos(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @llvm.acos.v4f64(<4 x double> [[IN0:%.*]])
; CHECK-NEXT: ret <4 x double> [[TMP1]]
;
%1 = call fast <4 x double> @llvm.acos.v4f64(<4 x double> %in0)
@@ -472,7 +472,7 @@ define <4 x double> @llvm_acos_wide_f64(<4 x double> %in0) {
define <8 x float> @llvm_acos_wide_f32(<8 x float> %in0) {
; CHECK-LABEL: @llvm_acos_wide_f32(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_acosf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @llvm.acos.v8f32(<8 x float> [[IN0:%.*]])
; CHECK-NEXT: ret <8 x float> [[TMP1]]
;
%1 = call fast <8 x float> @llvm.acos.v8f32(<8 x float> %in0)
@@ -481,7 +481,7 @@ define <8 x float> @llvm_acos_wide_f32(<8 x float> %in0) {
define <4 x double> @llvm_asin_wide_f64(<4 x double> %in0) {
; CHECK-LABEL: @llvm_asin_wide_f64(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_asin(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @llvm.asin.v4f64(<4 x double> [[IN0:%.*]])
; CHECK-NEXT: ret <4 x double> [[TMP1]]
;
%1 = call fast <4 x double> @llvm.asin.v4f64(<4 x double> %in0)
@@ -490,7 +490,7 @@ define <4 x double> @llvm_asin_wide_f64(<4 x double> %in0) {
define <8 x float> @llvm_asin_wide_f32(<8 x float> %in0) {
; CHECK-LABEL: @llvm_asin_wide_f32(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_asinf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @llvm.asin.v8f32(<8 x float> [[IN0:%.*]])
; CHECK-NEXT: ret <8 x float> [[TMP1]]
;
%1 = call fast <8 x float> @llvm.asin.v8f32(<8 x float> %in0)
@@ -499,7 +499,7 @@ define <8 x float> @llvm_asin_wide_f32(<8 x float> %in0) {
define <4 x double> @llvm_atan_wide_f64(<4 x double> %in0) {
; CHECK-LABEL: @llvm_atan_wide_f64(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_atan(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @llvm.atan.v4f64(<4 x double> [[IN0:%.*]])
; CHECK-NEXT: ret <4 x double> [[TMP1]]
;
%1 = call fast <4 x double> @llvm.atan.v4f64(<4 x double> %in0)
@@ -508,7 +508,7 @@ define <4 x double> @llvm_atan_wide_f64(<4 x double> %in0) {
define <8 x float> @llvm_atan_wide_f32(<8 x float> %in0) {
; CHECK-LABEL: @llvm_atan_wide_f32(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_atanf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @llvm.atan.v8f32(<8 x float> [[IN0:%.*]])
; CHECK-NEXT: ret <8 x float> [[TMP1]]
;
%1 = call fast <8 x float> @llvm.atan.v8f32(<8 x float> %in0)
@@ -517,7 +517,7 @@ define <8 x float> @llvm_atan_wide_f32(<8 x float> %in0) {
define <4 x double> @llvm_atan2_wide_f64(<4 x double> %in0, <4 x double> %in1) {
; CHECK-LABEL: @llvm_atan2_wide_f64(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4vv_atan2(<4 x double> [[IN0:%.*]], <4 x double> [[IN1:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @llvm.atan2.v4f64(<4 x double> [[IN0:%.*]], <4 x double> [[IN1:%.*]])
; CHECK-NEXT: ret <4 x double> [[TMP1]]
;
%1 = call fast <4 x double> @llvm.atan2.v4f64(<4 x double> %in0, <4 x double> %in1)
@@ -526,7 +526,7 @@ define <4 x double> @llvm_atan2_wide_f64(<4 x double> %in0, <4 x double> %in1) {
define <8 x float> @llvm_atan2_wide_f32(<8 x float> %in0, <8 x float> %in1) {
; CHECK-LABEL: @llvm_atan2_wide_f32(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8vv_atan2f(<8 x float> [[IN0:%.*]], <8 x float> [[IN1:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @llvm.atan2.v8f32(<8 x float> [[IN0:%.*]], <8 x float> [[IN1:%.*]])
; CHECK-NEXT: ret <8 x float> [[TMP1]]
;
%1 = call fast <8 x float> @llvm.atan2.v8f32(<8 x float> %in0, <8 x float> %in1)
@@ -535,7 +535,7 @@ define <8 x float> @llvm_atan2_wide_f32(<8 x float> %in0, <8 x float> %in1) {
define <4 x double> @llvm_cosh_wide_f64(<4 x double> %in0) {
; CHECK-LABEL: @llvm_cosh_wide_f64(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_cosh(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @llvm.cosh.v4f64(<4 x double> [[IN0:%.*]])
; CHECK-NEXT: ret <4 x double> [[TMP1]]
;
%1 = call fast <4 x double> @llvm.cosh.v4f64(<4 x double> %in0)
@@ -544,7 +544,7 @@ define <4 x double> @llvm_cosh_wide_f64(<4 x double> %in0) {
define <8 x float> @llvm_cosh_wide_f32(<8 x float> %in0) {
; CHECK-LABEL: @llvm_cosh_wide_f32(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_coshf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @llvm.cosh.v8f32(<8 x float> [[IN0:%.*]])
; CHECK-NEXT: ret <8 x float> [[TMP1]]
;
%1 = call fast <8 x float> @llvm.cosh.v8f32(<8 x float> %in0)
@@ -553,7 +553,7 @@ define <8 x float> @llvm_cosh_wide_f32(<8 x float> %in0) {
define <4 x double> @llvm_sinh_wide_f64(<4 x double> %in0) {
; CHECK-LABEL: @llvm_sinh_wide_f64(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_sinh(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @llvm.sinh.v4f64(<4 x double> [[IN0:%.*]])
; CHECK-NEXT: ret <4 x double> [[TMP1]]
;
%1 = call fast <4 x double> @llvm.sinh.v4f64(<4 x double> %in0)
@@ -562,7 +562,7 @@ define <4 x double> @llvm_sinh_wide_f64(<4 x double> %in0) {
define <8 x float> @llvm_sinh_wide_f32(<8 x float> %in0) {
; CHECK-LABEL: @llvm_sinh_wide_f32(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_sinhf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @llvm.sinh.v8f32(<8 x float> [[IN0:%.*]])
; CHECK-NEXT: ret <8 x float> [[TMP1]]
;
%1 = call fast <8 x float> @llvm.sinh.v8f32(<8 x float> %in0)
@@ -571,7 +571,7 @@ define <8 x float> @llvm_sinh_wide_f32(<8 x float> %in0) {
define <4 x double> @llvm_tanh_wide_f64(<4 x double> %in0) {
; CHECK-LABEL: @llvm_tanh_wide_f64(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_tanh(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @llvm.tanh.v4f64(<4 x double> [[IN0:%.*]])
; CHECK-NEXT: ret <4 x double> [[TMP1]]
;
%1 = call fast <4 x double> @llvm.tanh.v4f64(<4 x double> %in0)
@@ -580,7 +580,7 @@ define <4 x double> @llvm_tanh_wide_f64(<4 x double> %in0) {
define <8 x float> @llvm_tanh_wide_f32(<8 x float> %in0) {
; CHECK-LABEL: @llvm_tanh_wide_f32(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_tanhf(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @llvm.tanh.v8f32(<8 x float> [[IN0:%.*]])
; CHECK-NEXT: ret <8 x float> [[TMP1]]
;
%1 = call fast <8 x float> @llvm.tanh.v8f32(<8 x float> %in0)
@@ -589,7 +589,7 @@ define <8 x float> @llvm_tanh_wide_f32(<8 x float> %in0) {
define <4 x double> @llvm_exp10_wide_f64(<4 x double> %in0) {
; CHECK-LABEL: @llvm_exp10_wide_f64(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_exp10(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @llvm.exp10.v4f64(<4 x double> [[IN0:%.*]])
; CHECK-NEXT: ret <4 x double> [[TMP1]]
;
%1 = call fast <4 x double> @llvm.exp10.v4f64(<4 x double> %in0)
@@ -598,7 +598,7 @@ define <4 x double> @llvm_exp10_wide_f64(<4 x double> %in0) {
define <8 x float> @llvm_exp10_wide_f32(<8 x float> %in0) {
; CHECK-LABEL: @llvm_exp10_wide_f32(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_exp10f(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @llvm.exp10.v8f32(<8 x float> [[IN0:%.*]])
; CHECK-NEXT: ret <8 x float> [[TMP1]]
;
%1 = call fast <8 x float> @llvm.exp10.v8f32(<8 x float> %in0)
@@ -607,7 +607,7 @@ define <8 x float> @llvm_exp10_wide_f32(<8 x float> %in0) {
define <4 x double> @llvm_exp2_wide_f64(<4 x double> %in0) {
; CHECK-LABEL: @llvm_exp2_wide_f64(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_exp2(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @llvm.exp2.v4f64(<4 x double> [[IN0:%.*]])
; CHECK-NEXT: ret <4 x double> [[TMP1]]
;
%1 = call fast <4 x double> @llvm.exp2.v4f64(<4 x double> %in0)
@@ -616,7 +616,7 @@ define <4 x double> @llvm_exp2_wide_f64(<4 x double> %in0) {
define <8 x float> @llvm_exp2_wide_f32(<8 x float> %in0) {
; CHECK-LABEL: @llvm_exp2_wide_f32(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_exp2f(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @llvm.exp2.v8f32(<8 x float> [[IN0:%.*]])
; CHECK-NEXT: ret <8 x float> [[TMP1]]
;
%1 = call fast <8 x float> @llvm.exp2.v8f32(<8 x float> %in0)
@@ -625,7 +625,7 @@ define <8 x float> @llvm_exp2_wide_f32(<8 x float> %in0) {
define <4 x double> @llvm_log10_wide_f64(<4 x double> %in0) {
; CHECK-LABEL: @llvm_log10_wide_f64(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_log10(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @llvm.log10.v4f64(<4 x double> [[IN0:%.*]])
; CHECK-NEXT: ret <4 x double> [[TMP1]]
;
%1 = call fast <4 x double> @llvm.log10.v4f64(<4 x double> %in0)
@@ -634,7 +634,7 @@ define <4 x double> @llvm_log10_wide_f64(<4 x double> %in0) {
define <8 x float> @llvm_log10_wide_f32(<8 x float> %in0) {
; CHECK-LABEL: @llvm_log10_wide_f32(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_log10f(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @llvm.log10.v8f32(<8 x float> [[IN0:%.*]])
; CHECK-NEXT: ret <8 x float> [[TMP1]]
;
%1 = call fast <8 x float> @llvm.log10.v8f32(<8 x float> %in0)
@@ -643,7 +643,7 @@ define <8 x float> @llvm_log10_wide_f32(<8 x float> %in0) {
define <4 x double> @llvm_log2_wide_f64(<4 x double> %in0) {
; CHECK-LABEL: @llvm_log2_wide_f64(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @_ZGVdN4v_log2(<4 x double> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x double> @llvm.log2.v4f64(<4 x double> [[IN0:%.*]])
; CHECK-NEXT: ret <4 x double> [[TMP1]]
;
%1 = call fast <4 x double> @llvm.log2.v4f64(<4 x double> %in0)
@@ -652,7 +652,7 @@ define <4 x double> @llvm_log2_wide_f64(<4 x double> %in0) {
define <8 x float> @llvm_log2_wide_f32(<8 x float> %in0) {
; CHECK-LABEL: @llvm_log2_wide_f32(
-; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @_ZGVdN8v_log2f(<8 x float> [[IN0:%.*]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast <8 x float> @llvm.log2.v8f32(<8 x float> [[IN0:%.*]])
; CHECK-NEXT: ret <8 x float> [[TMP1]]
;
%1 = call fast <8 x float> @llvm.log2.v8f32(<8 x float> %in0)
diff --git a/llvm/test/Transforms/Util/add-TLI-mappings.ll b/llvm/test/Transforms/Util/add-TLI-mappings.ll
index 8da099842df267..132389121ac2b8 100644
--- a/llvm/test/Transforms/Util/add-TLI-mappings.ll
+++ b/llvm/test/Transforms/Util/add-TLI-mappings.ll
@@ -49,11 +49,10 @@
; LIBMVEC-AARCH64-SAME: ptr @_ZGVnN2v_log10f,
; LIBMVEC-AARCH64-SAME: ptr @_ZGVnN4v_log10f,
; LIBMVEC-AARCH64-SAME: ptr @_ZGVsMxv_log10f
-; LIBMVEC-X86-SAME: [4 x ptr] [
+; LIBMVEC-X86-SAME: [3 x ptr] [
; LIBMVEC-X86-SAME: ptr @_ZGVbN2v_sin,
; LIBMVEC-X86-SAME: ptr @_ZGVdN4v_sin,
-; LIBMVEC-X86-SAME: ptr @_ZGVbN4v_log10f,
-; LIBMVEC-X86-SAME: ptr @_ZGVdN8v_log10f
+; LIBMVEC-X86-SAME: ptr @_ZGVbN4v_log10f
; SLEEFGNUABI-SAME: [18 x ptr] [
; SLEEFGNUABI-SAME: ptr @_ZGVnN2vl8_modf,
; SLEEFGNUABI-SAME: ptr @_ZGVsNxvl8_modf,
@@ -265,7 +264,6 @@ declare double @ldexp(double, i32 signext) #0
; LIBMVEC-X86: declare <2 x double> @_ZGVbN2v_sin(<2 x double>)
; LIBMVEC-X86: declare <4 x double> @_ZGVdN4v_sin(<4 x double>)
; LIBMVEC-X86: declare <4 x float> @_ZGVbN4v_log10f(<4 x float>)
-; LIBMVEC-X86: declare <8 x float> @_ZGVdN8v_log10f(<8 x float>)
; ACCELERATE: declare <4 x float> @vlog10f(<4 x float>)
@@ -363,8 +361,7 @@ attributes #0 = { nounwind readnone }
; LIBMVEC-X86-SAME: "_ZGV_LLVM_N2v_sin(_ZGVbN2v_sin),
; LIBMVEC-X86-SAME: _ZGV_LLVM_N4v_sin(_ZGVdN4v_sin)" }
; LIBMVEC-X86: attributes #[[LOG10]] = { "vector-function-abi-variant"=
-; LIBMVEC-X86-SAME: "_ZGV_LLVM_N4v_llvm.log10.f32(_ZGVbN4v_log10f),
-; LIBMVEC-X86-SAME: _ZGV_LLVM_N8v_llvm.log10.f32(_ZGVdN8v_log10f)" }
+; LIBMVEC-X86-SAME: "_ZGV_LLVM_N4v_llvm.log10.f32(_ZGVbN4v_log10f)" }
; SLEEFGNUABI: attributes #[[MODF]] = { "vector-function-abi-variant"=
; SLEEFGNUABI-SAME: "_ZGV_LLVM_N2vl8_modf(_ZGVnN2vl8_modf),
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