[llvm] [CodeGen] Add complete-schedule search strategy API (PR #220644)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,244 @@
+//===- MachineSchedSearch.cpp - Complete schedule search ------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/CodeGen/MachineSchedSearch.h"
+#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/Sequence.h"
+#include <algorithm>
+#include <functional>
+#include <queue>
+#include <vector>
+
+using namespace llvm;
+
+MachineSchedCompleteScheduleOptimizer::
+    ~MachineSchedCompleteScheduleOptimizer() = default;
+
+MachineSchedSearchRegion::MachineSchedSearchRegion(ArrayRef<SUnit> Nodes)
+    : Nodes(Nodes), Predecessors(Nodes.size()), Successors(Nodes.size()) {
+  DenseMap<const SUnit *, unsigned> Ordinals;
+  for (auto [Ordinal, SU] : enumerate(Nodes))
+    Ordinals[&SU] = Ordinal;
+
+  for (auto [Ordinal, SU] : enumerate(Nodes)) {
+    for (const SDep &Pred : SU.Preds) {
+      const SUnit *PredSU = Pred.getSUnit();
+      if (Pred.isWeak() || PredSU->isBoundaryNode())
+        continue;
+      auto PredOrdinal = Ordinals.find(PredSU);
+      assert(PredOrdinal != Ordinals.end() &&
+             "predecessor must belong to the scheduling region");
+      if (PredOrdinal == Ordinals.end())
+        continue;
+      Predecessors[Ordinal].push_back(PredOrdinal->second);
+      Successors[PredOrdinal->second].push_back(Ordinal);
+    }
+  }
+}
+
+MachineSchedSearchRegion::MachineSchedSearchRegion(ScheduleDAGMI &DAG)
+    : MachineSchedSearchRegion(DAG.SUnits) {
+  this->DAG = &DAG;
+}
+
+const SUnit &MachineSchedSearchRegion::getSUnit(unsigned Node) const {
+  assert(Node < size() && "invalid scheduling node ordinal");
+  return Nodes[Node];
+}
+
+SmallVector<unsigned, 0> MachineSchedSearchRegion::getInitialOrder() const {
+  SmallVector<unsigned, 0> Order = to_vector<0>(seq<unsigned>(size()));
+  return Order;
+}
+
+SmallVector<unsigned, 0> MachineSchedSearchRegion::getTopologicalOrder() const {
+  SmallVector<unsigned, 0> RemainingPredecessors;
+  RemainingPredecessors.reserve(size());
+  for (unsigned Node = 0; Node != size(); ++Node)
+    RemainingPredecessors.push_back(predecessors(Node).size());
+
+  std::priority_queue<unsigned, std::vector<unsigned>, std::greater<unsigned>>
+      Ready;
+  for (unsigned Node = 0; Node != size(); ++Node)
+    if (RemainingPredecessors[Node] == 0)
+      Ready.push(Node);
+
+  SmallVector<unsigned, 0> Order;
+  Order.reserve(size());
+  while (!Ready.empty()) {
+    unsigned Node = Ready.top();
+    Ready.pop();
+    Order.push_back(Node);
+    for (unsigned Succ : successors(Node)) {
+      assert(RemainingPredecessors[Succ] != 0 &&
+             "inconsistent machine scheduling DAG");
+      --RemainingPredecessors[Succ];
+      if (RemainingPredecessors[Succ] == 0)
+        Ready.push(Succ);
+    }
+  }
+  assert(Order.size() == size() &&
+         "machine scheduling DAG contains a strong dependency cycle");
+  return Order;
+}
+
+bool MachineSchedSearchRegion::isLegalOrder(ArrayRef<unsigned> Order) const {
+  if (Order.size() != size())
+    return false;
+
+  SmallVector<unsigned, 0> Position(size(), size());
+  for (auto [Pos, Node] : enumerate(Order)) {
+    if (Node >= size() || Position[Node] != size())
+      return false;
+    Position[Node] = Pos;
+  }
+
+  for (unsigned Node = 0; Node != size(); ++Node)
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arsenm wrote:

Braces 

https://github.com/llvm/llvm-project/pull/220644