[llvm] [NFC][AMDGPU] Pre-commit test that exposes subreg copies into PHI nodes (PR #222152)

[Matt Arsenault via llvm-commits]

================
@@ -256,6 +256,112 @@ body:             |
     S_ENDPGM 0, implicit %3
 ...
 
+---
+name:            copy_lo16_sreg32_usedby_phi32
+tracksRegLiveness: true
+body:             |
+  ; GCN-LABEL: name: copy_lo16_sreg32_usedby_phi32
+  ; GCN: bb.0:
+  ; GCN-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
+  ; GCN-NEXT:   liveins: $scc
+  ; GCN-NEXT: {{  $}}
+  ; GCN-NEXT:   [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
+  ; GCN-NEXT:   [[DEF1:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
+  ; GCN-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF1]]
+  ; GCN-NEXT:   S_CBRANCH_SCC1 %bb.2, implicit $scc
+  ; GCN-NEXT: {{  $}}
+  ; GCN-NEXT: bb.1:
+  ; GCN-NEXT:   successors: %bb.2(0x80000000)
+  ; GCN-NEXT: {{  $}}
+  ; GCN-NEXT: bb.2:
+  ; GCN-NEXT:   [[PHI:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.0, [[DEF]].lo16, %bb.1
+  ; GCN-NEXT:   S_ENDPGM 0, implicit [[PHI]]
+  bb.0:
+    liveins: $scc
+    %0:vgpr_32 = IMPLICIT_DEF
+    %1:sreg_32 = IMPLICIT_DEF
+    S_CBRANCH_SCC1 %bb.2, implicit $scc
+
+  bb.1:
+    %2:sreg_32 = COPY %0.lo16
----------------
arsenm wrote:

This instruction is malformed. That the verifier isn't rejecting it should be fixed. You should not attempt to handle this instruction 

https://github.com/llvm/llvm-project/pull/222152