[llvm] [CodeGen] computeRegisterProperties - fix `bf16` to `i16` bitcast quieting NaNs (PR #224867)

[Folkert de Vries via llvm-commits]

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@@ -571,6 +571,12 @@ class LLVM_ABI TargetLoweringBase {
   // values are always passed and returned as f32.
   virtual bool useFPRegsForHalfType() const { return false; }
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folkertdev wrote:

It seems to work (if I understood you correctly and to basically use the riscv apprach on arm too). It seems to improve the generated code even.

https://github.com/llvm/llvm-project/pull/224867