[llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)

[Domenic Nutile via llvm-commits]

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@@ -0,0 +1,410 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -run-pass si-post-ra-16bit-mov-folding -verify-machineinstrs -o - %s | FileCheck %s
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saxlungs wrote:

Add another run line with `-debugify-and-strip-all-safe` which fills the functions with debug instructions to help test the handling

https://github.com/llvm/llvm-project/pull/208625