[llvm] [RISCV] Model interleave2 and deinterleave2 costs with Zvzip (PR #225752)

Min-Yih Hsu via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 24 08:48:11 PDT 2026


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@@ -1898,6 +1940,52 @@ RISCVTTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
                                     ValLT.second, CostKind);
     return Cost;
   }
+  case Intrinsic::vector_interleave2:
+  case Intrinsic::vector_deinterleave2: {
+    if (!ST->hasStdExtZvzip())
+      break;
+
+    bool IsInterleave = ICA.getID() == Intrinsic::vector_interleave2;
+    Type *InterleavedTy = IsInterleave ? RetTy : ICA.getArgTypes().front();
+    // ISel does not select vzip.vv if either interleave2 input is undef.
+    if (IsInterleave && !ICA.isTypeBasedOnly() &&
+        any_of(ICA.getArgs(),
+               [](const Value *Arg) { return isa<UndefValue>(Arg); }))
+      break;
+    if (InterleavedTy->getScalarSizeInBits() == 1)
+      break;
+
+    if (auto *FVT = dyn_cast<FixedVectorType>(InterleavedTy)) {
+      if (IsInterleave) {
+        unsigned VF = FVT->getNumElements() / 2;
+        auto *HalfFVT = FixedVectorType::getHalfElementsVectorType(FVT);
+        return getShuffleCost(TTI::SK_PermuteTwoSrc, FVT, HalfFVT, CostKind,
+                              createInterleaveMask(VF, 2), 0, nullptr);
+      }
+
+      auto *HalfFVT = FixedVectorType::getHalfElementsVectorType(FVT);
+      unsigned VF = HalfFVT->getNumElements();
----------------
mshockwave wrote:

can we share `VF` and `HalfFVT` with those in the interleave case?

https://github.com/llvm/llvm-project/pull/225752


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