[llvm] [TruncInstCombine] Handle sdiv/srem (PR #222391)

[Yingwei Zheng via llvm-commits]

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@@ -372,6 +373,27 @@ Type *TruncInstCombine::getBestTruncatedType() {
         llvm_unreachable("Unhandled intrinsic");
       }
     }
+    if (I->getOpcode() == Instruction::SDiv ||
+        I->getOpcode() == Instruction::SRem) {
+      unsigned NumSignBits0 = ComputeNumSignBits(I->getOperand(0));
+      unsigned NumSignBits1 = ComputeNumSignBits(I->getOperand(1));
+      unsigned MinBitWidthOp0 = OrigBitWidth - NumSignBits0 + 1;
+      unsigned MinBitWidthOp1 = OrigBitWidth - NumSignBits1 + 1;
+      unsigned MinBitWidth = std::max(MinBitWidthOp0, MinBitWidthOp1);
+
+      // In two's complement, sdiv and srem produce UB / poison on INT_MIN / -1.
+      // If LHS can be negative and RHS can be -1, we must ensure the reduced
+      // type has at least MinBitWidthOp0 + 1 bits so that LHS cannot be INT_MIN
+      // in the reduced type.
+      KnownBits KnownLHS = computeKnownBits(I->getOperand(0));
+      KnownBits KnownRHS = computeKnownBits(I->getOperand(1));
+      if (!KnownLHS.isNonNegative() && KnownRHS.Zero.isZero())
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dtcxzyw wrote:

I need more time to understand this check...


https://github.com/llvm/llvm-project/pull/222391