[llvm] [AMDGPU] Weight spills over copies in RewriteMFMAFormStage cost model (PR #225372)

[Romanov Vlad via llvm-commits]

================
@@ -103,6 +103,13 @@ static cl::opt<bool> DisableRewriteMFMAFormSchedStage(
     "amdgpu-disable-rewrite-mfma-form-sched-stage", cl::Hidden,
     cl::desc("Disable rewrite mfma rewrite scheduling stage"), cl::init(true));
 
+/// Cost of a spill/restore pair relative to TargetRegisterClass::getCopyCost.
+/// A spill goes to scratch memory, a bridge copy does not.
+static constexpr int64_t SpillVsCopyCostRatio = 10;
----------------
romanovvlad wrote:

Not Sure.
Both sides already per 32-bits register. `getCopyCost` scales with the number of registers in the class.
`getVGPRSpills` tells us how many vgprs exceed the limit.
We have no information on how vgpr spills translates to specific loads and stores.

This ratio is trying to express that on average a spill is much worse than a vgpr<=>agpr copy. Not just because of loads and stores on the stack, but also because excess pressure forces PreRA scheduler make `tryPressure` driven decisions in the critical regions.

https://github.com/llvm/llvm-project/pull/225372