[llvm] [Analysis][RISCV] More accurately estimate the cost of strided vector loads (PR #175135)

[Luke Lau via llvm-commits]

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@@ -1409,6 +1410,28 @@ RISCVTTIImpl::getStridedMemoryOpCost(const MemIntrinsicCostAttributes &MICA,
   // know exactly what VL will be.
   auto &VTy = *cast<VectorType>(DataTy);
   unsigned NumLoads = getEstimatedVLFor(&VTy);
+  // Performant implementations of the vector extension will coalesce
+  // elements if they fall on the same cache line
+  uint64_t CacheLineBytes = ST->getCacheLineSize();
+  if (!CacheLineBytes) // If no value, use default value of 64
+    CacheLineBytes = 64;
+  if (const ConstantInt *StrideCI =
+          dyn_cast_or_null<ConstantInt>(MICA.getStrideVal())) {
+    int64_t Stride = StrideCI->getSExtValue();
+    // Bail early to avoid UB with std:abs() call
+    if (Stride != std::numeric_limits<int64_t>::min()) {
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lukel97 wrote:

I think we need to bail if Stride is 0 actually since that's used for broadcasted splats, and we would also get division by zero

https://github.com/llvm/llvm-project/pull/175135