[llvm] CodeGen: Derive ARM EH pointer/selector registers from MCAsmInfo (PR #226109)

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Author: Matt Arsenault (arsenm)

<details>
<summary>Changes</summary>

Whether the exception pointer and selector are delivered in registers is an
object-format property, not a program-state one. ARM was the only target to
consult the exception model here, to test for SjLj EH, and that is a constant
for the triple already recorded in MCAsmInfo. Read it from there and drop the
ExceptionHandling argument that was threaded through
getExceptionPointerRegister and getExceptionSelectorRegister.

This is the effective revert of fdc178994aa7.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply@<!-- -->anthropic.com>

---
Full diff: https://github.com/llvm/llvm-project/pull/226109.diff


33 Files Affected:

- (modified) llvm/include/llvm/CodeGen/TargetLowering.h (+2-4) 
- (modified) llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp (+4-8) 
- (modified) llvm/lib/CodeGen/MachineBasicBlock.cpp (+2-6) 
- (modified) llvm/lib/CodeGen/MachineLICM.cpp (+2-7) 
- (modified) llvm/lib/CodeGen/RDFGraph.cpp (+2-6) 
- (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (+2-4) 
- (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (+3-6) 
- (modified) llvm/lib/Target/AArch64/AArch64ISelLowering.cpp (+2-2) 
- (modified) llvm/lib/Target/AArch64/AArch64ISelLowering.h (+2-4) 
- (modified) llvm/lib/Target/ARM/ARMISelLowering.cpp (+9-4) 
- (modified) llvm/lib/Target/ARM/ARMISelLowering.h (+2-4) 
- (modified) llvm/lib/Target/BPF/BPFISelLowering.h (+2-4) 
- (modified) llvm/lib/Target/CSKY/CSKYISelLowering.cpp (+2-2) 
- (modified) llvm/lib/Target/CSKY/CSKYISelLowering.h (+2-4) 
- (modified) llvm/lib/Target/Hexagon/HexagonISelLowering.h (+2-4) 
- (modified) llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp (+2-2) 
- (modified) llvm/lib/Target/LoongArch/LoongArchISelLowering.h (+2-4) 
- (modified) llvm/lib/Target/M68k/M68kISelLowering.cpp (+2-4) 
- (modified) llvm/lib/Target/M68k/M68kISelLowering.h (+2-4) 
- (modified) llvm/lib/Target/Mips/MipsISelLowering.h (+2-4) 
- (modified) llvm/lib/Target/PowerPC/PPCISelLowering.cpp (+2-2) 
- (modified) llvm/lib/Target/PowerPC/PPCISelLowering.h (+2-4) 
- (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+2-2) 
- (modified) llvm/lib/Target/RISCV/RISCVISelLowering.h (+2-4) 
- (modified) llvm/lib/Target/Sparc/SparcISelLowering.h (+2-4) 
- (modified) llvm/lib/Target/SystemZ/SystemZISelLowering.cpp (+2-2) 
- (modified) llvm/lib/Target/SystemZ/SystemZISelLowering.h (+2-4) 
- (modified) llvm/lib/Target/X86/X86ISelLowering.cpp (+2-2) 
- (modified) llvm/lib/Target/X86/X86ISelLowering.h (+2-4) 
- (modified) llvm/lib/Target/XCore/XCoreFrameLowering.cpp (+5-9) 
- (modified) llvm/lib/Target/XCore/XCoreISelLowering.h (+2-4) 
- (modified) llvm/lib/Target/Xtensa/XtensaISelLowering.cpp (+2-2) 
- (modified) llvm/lib/Target/Xtensa/XtensaISelLowering.h (+2-4) 


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</details>


https://github.com/llvm/llvm-project/pull/226109