[llvm] [AArch64] Enable quad variant st1b/ld1b for callee-saved spills (PR #225100)

[Kieran B via llvm-commits]

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@@ -2088,43 +2154,48 @@ bool AArch64FrameLowering::spillCalleeSavedRegisters(
 
     LLVM_DEBUG({
       dbgs() << "CSR spill: (" << printReg(Reg1, TRI);
-      if (RPI.isPaired())
+      if (RGI.isGrouped())
         dbgs() << ", " << printReg(Reg2, TRI);
-      dbgs() << ") -> fi#(" << RPI.FrameIdx;
-      if (RPI.isPaired())
-        dbgs() << ", " << RPI.FrameIdx + 1;
+      if (RGI.isQuad()) {
+        dbgs() << ", " << printReg(Reg3, TRI);
+        dbgs() << ", " << printReg(Reg4, TRI);
+      }
+      dbgs() << ") -> fi#(" << RGI.FrameIdx;
+      if (RGI.isGrouped())
+        dbgs() << ", " << RGI.FrameIdx + 1;
+      if (RGI.isQuad()) {
+        dbgs() << ", " << RGI.FrameIdx + 2;
+        dbgs() << ", " << RGI.FrameIdx + 3;
+      }
       dbgs() << ")\n";
     });
 
     assert((!isTargetWindows(MF) ||
             !(Reg1 == AArch64::LR && Reg2 == AArch64::FP)) &&
            "Windows unwdinding requires a consecutive (FP,LR) pair");
-    // Windows unwind codes require consecutive registers if registers are
-    // paired.  Make the switch here, so that the code below will save (x,x+1)
-    // and not (x+1,x).
-    unsigned FrameIdxReg1 = RPI.FrameIdx;
-    unsigned FrameIdxReg2 = RPI.FrameIdx + 1;
-    if (isTargetWindows(MF) && RPI.isPaired()) {
-      std::swap(Reg1, Reg2);
-      std::swap(FrameIdxReg1, FrameIdxReg2);
-    }
-
-    if (RPI.isPaired() && RPI.isScalable()) {
+    unsigned FrameIdxReg1 = RGI.FrameIdx;
+    unsigned FrameIdxReg2 = RGI.FrameIdx + 1;
+    unsigned FrameIdxReg3 = RGI.FrameIdx + 2;
+    unsigned FrameIdxReg4 = RGI.FrameIdx + 3;
+
+    if ((RGI.isGrouped()) && RGI.isScalable()) {
+      assert(!NeedsWinCFI &&
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kieroxide wrote:

Windows can use ZPR groups when we don't need WinCFI.

https://github.com/llvm/llvm-project/pull/225100