[llvm] [ARM] Lower vector interleave operations (PR #225670)
David Green via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 24 02:07:48 PDT 2026
================
@@ -9067,6 +9069,103 @@ static SDValue LowerCONCAT_VECTORS_i1(SDValue Op, SelectionDAG &DAG,
return ConcatOps[0];
}
+static SDValue LowerVECTOR_INTERLEAVE(SDValue Op, SelectionDAG &DAG,
+ const ARMSubtarget *ST) {
+ if (!ST->hasNEON())
+ return SDValue();
+ unsigned Factor = Op->getNumOperands();
+ EVT OpVT = Op.getValueType();
+ SDLoc DL(Op);
+
+ if (Factor == 2) {
+ SDValue Zip = DAG.getNode(ARMISD::VZIP, DL, DAG.getVTList(OpVT, OpVT),
+ Op.getOperand(0), Op.getOperand(1));
+ return DAG.getMergeValues({Zip, Zip.getValue(1)}, DL);
+ }
+
+ if (Op->getNumOperands() == 3) {
----------------
davemgreen wrote:
Factor == 3
https://github.com/llvm/llvm-project/pull/225670
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