[llvm] [AMDGPU] Insert exec-forced V_NOP after V_PERM_PK16 (gfx1250 hazard) (PR #214406)

[Jay Foad via llvm-commits]

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@@ -1199,6 +1199,60 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
            Opc == AMDGPU::GLOBAL_WBINV;
   }
 
+  static bool isF16PseudoScalarTrans(unsigned Opcode) {
+    return Opcode == AMDGPU::V_S_EXP_F16_e64 ||
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jayfoad wrote:

Matching specific opcodes is always difficult because there can be multiple forms of the same instruction.

Do we need to match alternatives like V_S_EXP_F16_noinline_e64 here?

Maybe we could do with a proper PseudoScalarTrans bit in TSFlags? Cc @vpykhtin 

https://github.com/llvm/llvm-project/pull/214406