[clang] [llvm] [RegAlloc] [X86] Enable callee saved register optimization for x86 (PR #220090)

[via llvm-commits]

weiguozhi wrote:

> This causes a substantial compile-time regression (around 0.5% on average): https://llvm-compile-time-tracker.com/compare.php?from=71122e716c7f507cb98df69961dbce21a187aa91&to=82ea1d26eca4bb8d12513d29a71536c35f3ff47b&stat=instructions:u It does seem to have a positive optimization impact on stage2 builds though.
> 
> Can you please analyze what the cause of the compile-time regression is and mitigate it?

Glad to see it has real world performance improvement, will try to find out some compile time improvements.

https://github.com/llvm/llvm-project/pull/220090