[clang] [llvm] [RISCV] Add processor definition and scheduling information for GR765 (PR #225638)

[Min-Yih Hsu via llvm-commits]

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@@ -1106,4 +1106,57 @@ def XUANTIE_C920V2 : RISCVProcessorModel<"xt-c920v2",
                                             FeatureUnalignedScalarMem]),
                                          [TuneVXRMPipelineFlush,
                                           TunePostRAScheduler]>;
+
+def GAISLER_GR765 : RISCVProcessorModel<"gr765",
+                                        GR765Model,
+                                        [Feature64Bit,
+                                         FeatureStdExtI,
+                                         FeatureStdExtZifencei,
+                                         FeatureStdExtZicsr,
+                                         FeatureStdExtZicntr,
+                                         FeatureStdExtZihpm,
+                                         FeatureStdExtM,
+                                         FeatureStdExtA,
+                                         FeatureStdExtF,
+                                         FeatureStdExtD,
+                                         FeatureStdExtC,
+                                         FeatureStdExtH,
+                                         FeatureStdExtShlcofideleg,
+                                         FeatureStdExtSmaia,
+                                         FeatureStdExtSmcdeleg,
+                                         FeatureStdExtSmcntrpmf,
+                                         FeatureStdExtSmcsrind,
+                                         FeatureStdExtSsaia,
+                                         FeatureStdExtSmdbltrp,
+                                         FeatureStdExtSmepmp,
+                                         FeatureStdExtSmrnmi,
+                                         FeatureStdExtSmstateen,
+                                         FeatureStdExtSscofpmf,
+                                         FeatureStdExtSscsrind,
+                                         FeatureStdExtSsdbltrp,
+                                         FeatureStdExtSstc,
+                                         FeatureStdExtSvadu,
+                                         FeatureStdExtSvinval,
+                                         FeatureStdExtSvnapot,
+                                         FeatureStdExtSvpbmt,
+                                         FeatureStdExtSvrsw60t59b,
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mshockwave wrote:

Normally you don't need privileged extensions here

https://github.com/llvm/llvm-project/pull/225638