[llvm] c9eafc1 - [SLP] Better track MinBWs between vectorization attempts (#224199)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 23 12:46:59 PDT 2026
Author: Ryan Buchner
Date: 2026-09-23T19:46:50Z
New Revision: c9eafc159e7caeb4fbb81e7af7dfaacc3cbd3e62
URL: https://github.com/llvm/llvm-project/commit/c9eafc159e7caeb4fbb81e7af7dfaacc3cbd3e62
DIFF: https://github.com/llvm/llvm-project/commit/c9eafc159e7caeb4fbb81e7af7dfaacc3cbd3e62.diff
LOG: [SLP] Better track MinBWs between vectorization attempts (#224199)
When retrying vectorization with smaller VF, we may be able to vectorize
further where previously gathering was required. This may expose
[s/z]ext instruction that would allow us to optimize via MinBWs. In such
cases, ignore AnalyzedMinBWVals and recompute MinBWs anyways.
Assisted By: Codex
Added:
Modified:
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
llvm/test/Transforms/SLPVectorizer/AArch64/revec-reductions.ll
llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 93f1ff5eadeaf..f6c0f9e08a2af 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -719,6 +719,32 @@ class slpvectorizer::BoUpSLP {
unsigned getTreeSize() const { return VectorizableTree.size(); }
+ /// Returns the size of the current tree, stopping at gathers
+ /// For instance, even though we continue adding tree entries after
+ /// a split node, this function stops counting at the split node
+ /// since it is a gather. This matches the behavior of MinBWs
+ /// computation.
+ unsigned getTreeSizeExcludingGathers() const {
+ unsigned Cnt = 0;
+ SmallBitVector GatherTreeNodes(VectorizableTree.size(), false);
+ for (unsigned NodeIdx : seq<unsigned>(VectorizableTree.size())) {
+ auto &TE = VectorizableTree[NodeIdx];
+ if (DeletedNodes.contains(TE.get()))
+ continue;
+ auto IsGather = [&](TreeEntry *TE) {
+ return TE->isGather() || TransformedToGatherNodes.contains(TE) ||
+ GatherTreeNodes.test(TE->Idx);
+ };
+ if (IsGather(TE.get()) || (!TE->UserTreeIndex.UserTE && NodeIdx != 0) ||
+ (TE->UserTreeIndex.UserTE && (IsGather(TE->UserTreeIndex.UserTE)))) {
+ GatherTreeNodes.set(NodeIdx);
+ continue;
+ }
+ ++Cnt;
+ }
+ return Cnt;
+ }
+
/// Returns the base graph size, before any transformations.
unsigned getCanonicalGraphSize() const { return BaseGraphSize; }
@@ -3752,9 +3778,9 @@ class slpvectorizer::BoUpSLP {
mutable SmallDenseMap<std::tuple<Type *, Type *, unsigned>, unsigned>
NumberOfPartsCache;
- /// Values, already been analyzed for mininmal bitwidth and found to be
- /// non-profitable.
- DenseSet<Value *> AnalyzedMinBWVals;
+ /// Values already analyzed for minimal bitwidth and found to be
+ /// non-profitable, mapped to the size of the tree used for the analysis.
+ SmallDenseMap<Value *, unsigned> AnalyzedMinBWVals;
/// A list of values that need to extracted out of the tree.
/// This list holds pairs of (Internal Scalar : External User). External User
@@ -28441,8 +28467,14 @@ void BoUpSLP::computeMinimumValueSizes() {
++NodeIdx;
}
+ auto IsAnalyzedMinBWVal = [&](Value *V, unsigned SizeExGathers) {
+ auto It = AnalyzedMinBWVals.find(V);
+ return It != AnalyzedMinBWVals.end() && It->second >= SizeExGathers;
+ };
+
// Analyzed the reduction already and not profitable - exit.
- if (AnalyzedMinBWVals.contains(VectorizableTree[NodeIdx]->Scalars.front()))
+ if (IsAnalyzedMinBWVal(VectorizableTree[NodeIdx]->Scalars.front(),
+ getTreeSizeExcludingGathers()))
return;
SmallVector<unsigned> ToDemote;
@@ -28504,8 +28536,9 @@ void BoUpSLP::computeMinimumValueSizes() {
if (!TreeRootIT)
return 0u;
+ unsigned SizeExGathers = getTreeSizeExcludingGathers();
if (any_of(E.Scalars,
- [&](Value *V) { return AnalyzedMinBWVals.contains(V); }))
+ [&](Value *V) { return IsAnalyzedMinBWVal(V, SizeExGathers); }))
return 0u;
unsigned NumParts =
@@ -28746,8 +28779,11 @@ void BoUpSLP::computeMinimumValueSizes() {
MaxBitWidth >=
cast<IntegerType>(TreeRoot.front()->getType()->getScalarType())
->getBitWidth()) {
- if (UserIgnoreList)
- AnalyzedMinBWVals.insert_range(TreeRoot);
+ if (UserIgnoreList) {
+ unsigned Sz = getTreeSizeExcludingGathers();
+ for (Value *V : TreeRoot)
+ AnalyzedMinBWVals.insert_or_assign(V, Sz);
+ }
NodesToKeepBWs.insert_range(ToDemote);
continue;
}
diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/revec-reductions.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/revec-reductions.ll
index e266733af51c3..0cae10157bd2e 100644
--- a/llvm/test/Transforms/SLPVectorizer/AArch64/revec-reductions.ll
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/revec-reductions.ll
@@ -5,26 +5,20 @@ define <16 x i64> @test(<16 x i8> %x) {
; CHECK-LABEL: define <16 x i64> @test(
; CHECK-SAME: <16 x i8> [[X:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
-; CHECK-NEXT: [[TMP0:%.*]] = zext <16 x i8> [[X]] to <16 x i64>
-; CHECK-NEXT: [[TMP1:%.*]] = sub <16 x i64> zeroinitializer, [[TMP0]]
-; CHECK-NEXT: [[TMP2:%.*]] = zext <16 x i8> zeroinitializer to <16 x i64>
-; CHECK-NEXT: [[TMP3:%.*]] = sub <16 x i64> zeroinitializer, [[TMP2]]
-; CHECK-NEXT: [[TMP4:%.*]] = call <16 x i64> @llvm.smin.v16i64(<16 x i64> [[TMP1]], <16 x i64> [[TMP3]])
-; CHECK-NEXT: [[TMP5:%.*]] = zext <16 x i8> zeroinitializer to <16 x i64>
-; CHECK-NEXT: [[TMP6:%.*]] = sub <16 x i64> zeroinitializer, [[TMP5]]
-; CHECK-NEXT: [[TMP7:%.*]] = call <16 x i64> @llvm.smin.v16i64(<16 x i64> [[TMP4]], <16 x i64> [[TMP6]])
-; CHECK-NEXT: [[TMP8:%.*]] = zext <16 x i8> zeroinitializer to <16 x i64>
-; CHECK-NEXT: [[TMP9:%.*]] = sub <16 x i64> zeroinitializer, [[TMP8]]
-; CHECK-NEXT: [[TMP10:%.*]] = call <16 x i64> @llvm.smin.v16i64(<16 x i64> [[TMP7]], <16 x i64> [[TMP9]])
-; CHECK-NEXT: [[TMP11:%.*]] = sub <16 x i64> zeroinitializer, zeroinitializer
-; CHECK-NEXT: [[TMP12:%.*]] = call <16 x i64> @llvm.smin.v16i64(<16 x i64> [[TMP10]], <16 x i64> [[TMP11]])
-; CHECK-NEXT: [[TMP13:%.*]] = sub <16 x i64> zeroinitializer, zeroinitializer
-; CHECK-NEXT: [[TMP14:%.*]] = call <16 x i64> @llvm.smin.v16i64(<16 x i64> [[TMP12]], <16 x i64> [[TMP13]])
-; CHECK-NEXT: [[TMP15:%.*]] = sub <16 x i64> zeroinitializer, zeroinitializer
-; CHECK-NEXT: [[TMP16:%.*]] = call <16 x i64> @llvm.smin.v16i64(<16 x i64> [[TMP14]], <16 x i64> [[TMP15]])
-; CHECK-NEXT: [[TMP17:%.*]] = sub <16 x i64> zeroinitializer, zeroinitializer
-; CHECK-NEXT: [[TMP48:%.*]] = call <16 x i64> @llvm.smin.v16i64(<16 x i64> [[TMP16]], <16 x i64> [[TMP17]])
-; CHECK-NEXT: ret <16 x i64> [[TMP48]]
+; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <16 x i8> [[X]], <16 x i8> poison, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <64 x i8> <i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <64 x i8> [[TMP0]], <64 x i32> <i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
+; CHECK-NEXT: [[TMP2:%.*]] = zext <64 x i8> [[TMP1]] to <64 x i16>
+; CHECK-NEXT: [[TMP3:%.*]] = sub <64 x i16> zeroinitializer, [[TMP2]]
+; CHECK-NEXT: [[TMP4:%.*]] = sext <64 x i16> [[TMP3]] to <64 x i64>
+; CHECK-NEXT: [[TMP5:%.*]] = call <64 x i64> @llvm.smin.v64i64(<64 x i64> [[TMP4]], <64 x i64> zeroinitializer)
+; CHECK-NEXT: [[TMP19:%.*]] = shufflevector <64 x i64> [[TMP5]], <64 x i64> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+; CHECK-NEXT: [[TMP20:%.*]] = shufflevector <64 x i64> [[TMP5]], <64 x i64> poison, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
+; CHECK-NEXT: [[TMP21:%.*]] = call <16 x i64> @llvm.smin.v16i64(<16 x i64> [[TMP19]], <16 x i64> [[TMP20]])
+; CHECK-NEXT: [[TMP22:%.*]] = shufflevector <64 x i64> [[TMP5]], <64 x i64> poison, <16 x i32> <i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47>
+; CHECK-NEXT: [[TMP23:%.*]] = call <16 x i64> @llvm.smin.v16i64(<16 x i64> [[TMP21]], <16 x i64> [[TMP22]])
+; CHECK-NEXT: [[TMP24:%.*]] = shufflevector <64 x i64> [[TMP5]], <64 x i64> poison, <16 x i32> <i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
+; CHECK-NEXT: [[TMP18:%.*]] = call <16 x i64> @llvm.smin.v16i64(<16 x i64> [[TMP23]], <16 x i64> [[TMP24]])
+; CHECK-NEXT: ret <16 x i64> [[TMP18]]
;
entry:
%0 = zext <16 x i8> %x to <16 x i64>
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll b/llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll
index a8f8ed8c4c397..7f3efc0f191a4 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll
@@ -5,12 +5,19 @@ define i1 @test(i64 %v1, ptr %v2, i32 %v3, i1 %v4) {
; CHECK-LABEL: define i1 @test(
; CHECK-SAME: i64 [[V1:%.*]], ptr [[V2:%.*]], i32 [[V3:%.*]], i1 [[V4:%.*]]) {
; CHECK-NEXT: [[NEWFUNCROOT:.*:]]
-; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> poison, i64 [[V1]], i64 0
-; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x i64> [[TMP0]], <2 x i64> poison, <2 x i32> zeroinitializer
-; CHECK-NEXT: [[TMP2:%.*]] = lshr <2 x i64> [[TMP1]], <i64 32, i64 40>
-; CHECK-NEXT: [[TMP4:%.*]] = trunc <2 x i64> [[TMP2]] to <2 x i32>
-; CHECK-NEXT: [[TMP5:%.*]] = and <2 x i32> [[TMP4]], <i32 1, i32 255>
-; CHECK-NEXT: [[TMP6:%.*]] = icmp eq <2 x i32> [[TMP5]], zeroinitializer
+; CHECK-NEXT: [[TMP0:%.*]] = lshr i64 [[V1]], 40
+; CHECK-NEXT: [[TT3:%.*]] = lshr i64 [[V1]], 32
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TT3]] to i32
+; CHECK-NEXT: [[TT2:%.*]] = and i32 [[TMP1]], 255
+; CHECK-NEXT: [[TT1:%.*]] = and i32 [[TMP2]], 1
+; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TT1]] to i8
+; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i8> poison, i8 [[TMP3]], i64 0
+; CHECK-NEXT: [[TMP7:%.*]] = trunc i32 [[TT2]] to i8
+; CHECK-NEXT: [[TMP9:%.*]] = insertelement <2 x i8> [[TMP4]], i8 [[TMP7]], i64 1
+; CHECK-NEXT: [[TMP6:%.*]] = icmp eq <2 x i8> [[TMP9]], zeroinitializer
+; CHECK-NEXT: [[TMP33:%.*]] = insertelement <2 x i32> poison, i32 [[TT1]], i64 0
+; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> [[TMP33]], i32 [[TT2]], i64 1
; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> poison, i32 [[V3]], i64 0
; CHECK-NEXT: [[TMP30:%.*]] = shufflevector <4 x i32> [[TMP8]], <4 x i32> poison, <4 x i32> <i32 poison, i32 poison, i32 0, i32 0>
; CHECK-NEXT: [[TMP31:%.*]] = shufflevector <2 x i32> [[TMP5]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
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