[llvm] dec20df - [AMDGPU][InstCombine] Add sudot zero/constant folding tests. NFC (#225321)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 23 08:53:46 PDT 2026
Author: Harrison Hao
Date: 2026-09-23T23:53:29+08:00
New Revision: dec20dfbe042962775095e5394b2979fde9a4f45
URL: https://github.com/llvm/llvm-project/commit/dec20dfbe042962775095e5394b2979fde9a4f45
DIFF: https://github.com/llvm/llvm-project/commit/dec20dfbe042962775095e5394b2979fde9a4f45.diff
LOG: [AMDGPU][InstCombine] Add sudot zero/constant folding tests. NFC (#225321)
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Added:
llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll b/llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll
new file mode 100644
index 0000000000000..a9840e1c7e489
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll
@@ -0,0 +1,356 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -S -passes=instcombine -mtriple=amdgpu12.00 %s | FileCheck %s
+
+define i32 @sudot4_add(i32 %a, i32 %b) {
+; CHECK-LABEL: define i32 @sudot4_add(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 true, i32 [[A]], i1 false, i32 [[B]], i32 7, i1 false)
+; CHECK-NEXT: [[R:%.*]] = add i32 [[DOT]], 9
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot4(i1 true, i32 %a, i1 false, i32 %b, i32 7, i1 false)
+ %r = add i32 %dot, 9
+ ret i32 %r
+}
+
+define i32 @sudot4_sub(i32 %a, i32 %b) {
+; CHECK-LABEL: define i32 @sudot4_sub(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 true, i32 [[A]], i1 false, i32 [[B]], i32 7, i1 false)
+; CHECK-NEXT: [[R:%.*]] = add i32 [[DOT]], -1
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot4(i1 true, i32 %a, i1 false, i32 %b, i32 7, i1 false)
+ %r = sub i32 %dot, 1
+ ret i32 %r
+}
+
+define i32 @sudot4_const_lhs(i32 %b, i32 %acc) {
+; CHECK-LABEL: define i32 @sudot4_const_lhs(
+; CHECK-SAME: i32 [[B:%.*]], i32 [[ACC:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 true, i32 16843009, i1 false, i32 [[B]], i32 [[ACC]], i1 false)
+; CHECK-NEXT: ret i32 [[DOT]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot4(i1 true, i32 16843009, i1 false, i32 %b, i32 %acc, i1 false)
+ ret i32 %dot
+}
+
+define i32 @sudot4_a_zero(i32 %b, i32 %acc) {
+; CHECK-LABEL: define i32 @sudot4_a_zero(
+; CHECK-SAME: i32 [[B:%.*]], i32 [[ACC:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 true, i32 0, i1 false, i32 [[B]], i32 [[ACC]], i1 false)
+; CHECK-NEXT: ret i32 [[DOT]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot4(i1 true, i32 0, i1 false, i32 %b, i32 %acc, i1 false)
+ ret i32 %dot
+}
+
+define i32 @sudot4_clamp(i32 %a, i32 %b) {
+; CHECK-LABEL: define i32 @sudot4_clamp(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 true, i32 [[A]], i1 false, i32 [[B]], i32 7, i1 true)
+; CHECK-NEXT: [[R:%.*]] = add i32 [[DOT]], 9
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot4(i1 true, i32 %a, i1 false, i32 %b, i32 7, i1 true)
+ %r = add i32 %dot, 9
+ ret i32 %r
+}
+
+define i32 @sudot4_all_constants() {
+; CHECK-LABEL: define i32 @sudot4_all_constants() {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 true, i32 16843009, i1 false, i32 33686018, i32 7, i1 false)
+; CHECK-NEXT: ret i32 [[DOT]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot4(i1 true, i32 16843009, i1 false, i32 33686018, i32 7, i1 false)
+ ret i32 %dot
+}
+
+define i32 @sudot4_all_constants_ss() {
+; CHECK-LABEL: define i32 @sudot4_all_constants_ss() {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 true, i32 1, i1 true, i32 2, i32 7, i1 false)
+; CHECK-NEXT: ret i32 [[DOT]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot4(i1 true, i32 1, i1 true, i32 2, i32 7, i1 false)
+ ret i32 %dot
+}
+
+define i32 @sudot4_all_constants_us() {
+; CHECK-LABEL: define i32 @sudot4_all_constants_us() {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 false, i32 1, i1 true, i32 2, i32 7, i1 false)
+; CHECK-NEXT: ret i32 [[DOT]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot4(i1 false, i32 1, i1 true, i32 2, i32 7, i1 false)
+ ret i32 %dot
+}
+
+define i32 @sudot4_all_constants_uu() {
+; CHECK-LABEL: define i32 @sudot4_all_constants_uu() {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 false, i32 1, i1 false, i32 2, i32 7, i1 false)
+; CHECK-NEXT: ret i32 [[DOT]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot4(i1 false, i32 1, i1 false, i32 2, i32 7, i1 false)
+ ret i32 %dot
+}
+
+define i32 @sudot4_all_constants_clamp() {
+; CHECK-LABEL: define i32 @sudot4_all_constants_clamp() {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 true, i32 1, i1 true, i32 1, i32 2147483647, i1 true)
+; CHECK-NEXT: ret i32 [[DOT]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot4(i1 true, i32 1, i1 true, i32 1, i32 2147483647, i1 true)
+ ret i32 %dot
+}
+
+define i32 @sudot4_zero_acc_add_const(i32 %a, i32 %b) {
+; CHECK-LABEL: define i32 @sudot4_zero_acc_add_const(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 true, i32 [[A]], i1 false, i32 [[B]], i32 0, i1 false)
+; CHECK-NEXT: [[R:%.*]] = add i32 [[DOT]], 9
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot4(i1 true, i32 %a, i1 false, i32 %b, i32 0, i1 false)
+ %r = add i32 %dot, 9
+ ret i32 %r
+}
+
+define i32 @sudot4_zero_acc_add_value(i32 %a, i32 %b, i32 %acc) {
+; CHECK-LABEL: define i32 @sudot4_zero_acc_add_value(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[ACC:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 true, i32 [[A]], i1 false, i32 [[B]], i32 0, i1 false)
+; CHECK-NEXT: [[R:%.*]] = add i32 [[DOT]], [[ACC]]
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot4(i1 true, i32 %a, i1 false, i32 %b, i32 0, i1 false)
+ %r = add i32 %dot, %acc
+ ret i32 %r
+}
+
+define i32 @sudot4_zero_acc_add_const_lhs(i32 %a, i32 %b) {
+; CHECK-LABEL: define i32 @sudot4_zero_acc_add_const_lhs(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 true, i32 [[A]], i1 false, i32 [[B]], i32 0, i1 false)
+; CHECK-NEXT: [[R:%.*]] = add i32 [[DOT]], 9
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot4(i1 true, i32 %a, i1 false, i32 %b, i32 0, i1 false)
+ %r = add i32 9, %dot
+ ret i32 %r
+}
+
+define i32 @sudot4_zero_acc_multiple_users(i32 %a, i32 %b) {
+; CHECK-LABEL: define i32 @sudot4_zero_acc_multiple_users(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 true, i32 [[A]], i1 false, i32 [[B]], i32 0, i1 false)
+; CHECK-NEXT: [[R:%.*]] = add i32 [[DOT]], 9
+; CHECK-NEXT: [[OTHER:%.*]] = xor i32 [[DOT]], 1
+; CHECK-NEXT: [[RESULT:%.*]] = add i32 [[R]], [[OTHER]]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot4(i1 true, i32 %a, i1 false, i32 %b, i32 0, i1 false)
+ %r = add i32 %dot, 9
+ %other = xor i32 %dot, 1
+ %result = add i32 %r, %other
+ ret i32 %result
+}
+
+define i32 @sudot4_zero_acc_sub_const(i32 %a, i32 %b) {
+; CHECK-LABEL: define i32 @sudot4_zero_acc_sub_const(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 true, i32 [[A]], i1 false, i32 [[B]], i32 0, i1 false)
+; CHECK-NEXT: [[R:%.*]] = add i32 [[DOT]], -9
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot4(i1 true, i32 %a, i1 false, i32 %b, i32 0, i1 false)
+ %r = sub i32 %dot, 9
+ ret i32 %r
+}
+
+define i32 @sudot4_zero_acc_const_sub(i32 %a, i32 %b) {
+; CHECK-LABEL: define i32 @sudot4_zero_acc_const_sub(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot4(i1 true, i32 [[A]], i1 false, i32 [[B]], i32 0, i1 false)
+; CHECK-NEXT: [[R:%.*]] = sub i32 9, [[DOT]]
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot4(i1 true, i32 %a, i1 false, i32 %b, i32 0, i1 false)
+ %r = sub i32 9, %dot
+ ret i32 %r
+}
+
+define i32 @sudot8_add(i32 %a, i32 %b) {
+; CHECK-LABEL: define i32 @sudot8_add(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 false, i32 [[A]], i1 true, i32 [[B]], i32 7, i1 false)
+; CHECK-NEXT: [[R:%.*]] = add i32 [[DOT]], 9
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot8(i1 false, i32 %a, i1 true, i32 %b, i32 7, i1 false)
+ %r = add i32 %dot, 9
+ ret i32 %r
+}
+
+define i32 @sudot8_all_constants() {
+; CHECK-LABEL: define i32 @sudot8_all_constants() {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 false, i32 1, i1 true, i32 2, i32 7, i1 false)
+; CHECK-NEXT: ret i32 [[DOT]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot8(i1 false, i32 1, i1 true, i32 2, i32 7, i1 false)
+ ret i32 %dot
+}
+
+define i32 @sudot8_all_constants_ss() {
+; CHECK-LABEL: define i32 @sudot8_all_constants_ss() {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 true, i32 1, i1 true, i32 2, i32 7, i1 false)
+; CHECK-NEXT: ret i32 [[DOT]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot8(i1 true, i32 1, i1 true, i32 2, i32 7, i1 false)
+ ret i32 %dot
+}
+
+define i32 @sudot8_all_constants_su() {
+; CHECK-LABEL: define i32 @sudot8_all_constants_su() {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 true, i32 1, i1 false, i32 2, i32 7, i1 false)
+; CHECK-NEXT: ret i32 [[DOT]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot8(i1 true, i32 1, i1 false, i32 2, i32 7, i1 false)
+ ret i32 %dot
+}
+
+define i32 @sudot8_all_constants_uu() {
+; CHECK-LABEL: define i32 @sudot8_all_constants_uu() {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 false, i32 1, i1 false, i32 2, i32 7, i1 false)
+; CHECK-NEXT: ret i32 [[DOT]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot8(i1 false, i32 1, i1 false, i32 2, i32 7, i1 false)
+ ret i32 %dot
+}
+
+define i32 @sudot8_all_constants_clamp() {
+; CHECK-LABEL: define i32 @sudot8_all_constants_clamp() {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 true, i32 1, i1 true, i32 1, i32 2147483647, i1 true)
+; CHECK-NEXT: ret i32 [[DOT]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot8(i1 true, i32 1, i1 true, i32 1, i32 2147483647, i1 true)
+ ret i32 %dot
+}
+
+define i32 @sudot8_zero_acc_add_const(i32 %a, i32 %b) {
+; CHECK-LABEL: define i32 @sudot8_zero_acc_add_const(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 false, i32 [[A]], i1 true, i32 [[B]], i32 0, i1 false)
+; CHECK-NEXT: [[R:%.*]] = add i32 [[DOT]], 9
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot8(i1 false, i32 %a, i1 true, i32 %b, i32 0, i1 false)
+ %r = add i32 %dot, 9
+ ret i32 %r
+}
+
+define i32 @sudot8_zero_acc_add_value(i32 %a, i32 %b, i32 %acc) {
+; CHECK-LABEL: define i32 @sudot8_zero_acc_add_value(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[ACC:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 false, i32 [[A]], i1 true, i32 [[B]], i32 0, i1 false)
+; CHECK-NEXT: [[R:%.*]] = add i32 [[DOT]], [[ACC]]
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot8(i1 false, i32 %a, i1 true, i32 %b, i32 0, i1 false)
+ %r = add i32 %dot, %acc
+ ret i32 %r
+}
+
+define i32 @sudot8_zero_acc_add_const_lhs(i32 %a, i32 %b) {
+; CHECK-LABEL: define i32 @sudot8_zero_acc_add_const_lhs(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 false, i32 [[A]], i1 true, i32 [[B]], i32 0, i1 false)
+; CHECK-NEXT: [[R:%.*]] = add i32 [[DOT]], 9
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot8(i1 false, i32 %a, i1 true, i32 %b, i32 0, i1 false)
+ %r = add i32 9, %dot
+ ret i32 %r
+}
+
+define i32 @sudot8_zero_acc_multiple_users(i32 %a, i32 %b) {
+; CHECK-LABEL: define i32 @sudot8_zero_acc_multiple_users(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 false, i32 [[A]], i1 true, i32 [[B]], i32 0, i1 false)
+; CHECK-NEXT: [[R:%.*]] = add i32 [[DOT]], 9
+; CHECK-NEXT: [[OTHER:%.*]] = xor i32 [[DOT]], 1
+; CHECK-NEXT: [[RESULT:%.*]] = add i32 [[R]], [[OTHER]]
+; CHECK-NEXT: ret i32 [[RESULT]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot8(i1 false, i32 %a, i1 true, i32 %b, i32 0, i1 false)
+ %r = add i32 %dot, 9
+ %other = xor i32 %dot, 1
+ %result = add i32 %r, %other
+ ret i32 %result
+}
+
+define i32 @sudot8_zero_acc_sub_const(i32 %a, i32 %b) {
+; CHECK-LABEL: define i32 @sudot8_zero_acc_sub_const(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 false, i32 [[A]], i1 true, i32 [[B]], i32 0, i1 false)
+; CHECK-NEXT: [[R:%.*]] = add i32 [[DOT]], -9
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot8(i1 false, i32 %a, i1 true, i32 %b, i32 0, i1 false)
+ %r = sub i32 %dot, 9
+ ret i32 %r
+}
+
+define i32 @sudot8_zero_acc_const_sub(i32 %a, i32 %b) {
+; CHECK-LABEL: define i32 @sudot8_zero_acc_const_sub(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 false, i32 [[A]], i1 true, i32 [[B]], i32 0, i1 false)
+; CHECK-NEXT: [[R:%.*]] = sub i32 9, [[DOT]]
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot8(i1 false, i32 %a, i1 true, i32 %b, i32 0, i1 false)
+ %r = sub i32 9, %dot
+ ret i32 %r
+}
+
+define i32 @sudot8_sub(i32 %a, i32 %b) {
+; CHECK-LABEL: define i32 @sudot8_sub(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 false, i32 [[A]], i1 true, i32 [[B]], i32 7, i1 false)
+; CHECK-NEXT: [[R:%.*]] = add i32 [[DOT]], -1
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot8(i1 false, i32 %a, i1 true, i32 %b, i32 7, i1 false)
+ %r = sub i32 %dot, 1
+ ret i32 %r
+}
+
+define i32 @sudot8_const_lhs(i32 %b, i32 %acc) {
+; CHECK-LABEL: define i32 @sudot8_const_lhs(
+; CHECK-SAME: i32 [[B:%.*]], i32 [[ACC:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 false, i32 286331153, i1 true, i32 [[B]], i32 [[ACC]], i1 false)
+; CHECK-NEXT: ret i32 [[DOT]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot8(i1 false, i32 286331153, i1 true, i32 %b, i32 %acc, i1 false)
+ ret i32 %dot
+}
+
+define i32 @sudot8_a_zero(i32 %b, i32 %acc) {
+; CHECK-LABEL: define i32 @sudot8_a_zero(
+; CHECK-SAME: i32 [[B:%.*]], i32 [[ACC:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 false, i32 0, i1 true, i32 [[B]], i32 [[ACC]], i1 false)
+; CHECK-NEXT: ret i32 [[DOT]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot8(i1 false, i32 0, i1 true, i32 %b, i32 %acc, i1 false)
+ ret i32 %dot
+}
+
+define i32 @sudot8_clamp(i32 %a, i32 %b) {
+; CHECK-LABEL: define i32 @sudot8_clamp(
+; CHECK-SAME: i32 [[A:%.*]], i32 [[B:%.*]]) {
+; CHECK-NEXT: [[DOT:%.*]] = call i32 @llvm.amdgcn.sudot8(i1 false, i32 [[A]], i1 true, i32 [[B]], i32 7, i1 true)
+; CHECK-NEXT: [[R:%.*]] = add i32 [[DOT]], 9
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %dot = call i32 @llvm.amdgcn.sudot8(i1 false, i32 %a, i1 true, i32 %b, i32 7, i1 true)
+ %r = add i32 %dot, 9
+ ret i32 %r
+}
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