[llvm] [X86] load-combine.ll - cleanup check prefixes and don't scrub stack math (PR #225762)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 23 07:46:22 PDT 2026
https://github.com/RKSimon updated https://github.com/llvm/llvm-project/pull/225762
>From 69ee1c69d7cfa4eb351e412d725e1d7f0366a0a6 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Wed, 23 Sep 2026 14:21:37 +0100
Subject: [PATCH] [X86] load-combine.ll - cleanup check prefixes and don't
scrub stack math
Ensure all stack addresses are visible
---
llvm/test/CodeGen/X86/load-combine.ll | 1102 ++++++++++++-------------
1 file changed, 548 insertions(+), 554 deletions(-)
diff --git a/llvm/test/CodeGen/X86/load-combine.ll b/llvm/test/CodeGen/X86/load-combine.ll
index f21c07599d6f12..5882f58f4ac5e3 100644
--- a/llvm/test/CodeGen/X86/load-combine.ll
+++ b/llvm/test/CodeGen/X86/load-combine.ll
@@ -1,22 +1,22 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=CHECK --check-prefix=BSWAP
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+movbe | FileCheck %s --check-prefix=CHECK --check-prefix=MOVBE
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=CHECK64 --check-prefix=BSWAP64
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+movbe | FileCheck %s --check-prefix=CHECK64 --check-prefix=MOVBE64
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
+; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-BSWAP
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+movbe | FileCheck %s --check-prefixes=X86,X86-MOVBE
+; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64,X64-BSWAP
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+movbe | FileCheck %s --check-prefixes=X64,X64-MOVBE
; ptr p;
; (i32) p[0] | ((i32) p[1] << 8) | ((i32) p[2] << 16) | ((i32) p[3] << 24)
-define i32 @load_i32_by_i8(ptr %arg) {
-; CHECK-LABEL: load_i32_by_i8:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl (%eax), %eax
-; CHECK-NEXT: retl
+define i32 @load_i32_by_i8(ptr %arg) nounwind {
+; X86-LABEL: load_i32_by_i8:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movl (%eax), %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: load_i32_by_i8:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movl (%rdi), %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: load_i32_by_i8:
+; X64: # %bb.0:
+; X64-NEXT: movl (%rdi), %eax
+; X64-NEXT: retq
%tmp1 = load i8, ptr %arg, align 1
%tmp2 = zext i8 %tmp1 to i32
%tmp3 = getelementptr inbounds i8, ptr %arg, i32 1
@@ -39,30 +39,30 @@ define i32 @load_i32_by_i8(ptr %arg) {
; ptr p;
; ((i32) p[0] << 24) | ((i32) p[1] << 16) | ((i32) p[2] << 8) | (i32) p[3]
-define i32 @load_i32_by_i8_bswap(ptr %arg) {
-; BSWAP-LABEL: load_i32_by_i8_bswap:
-; BSWAP: # %bb.0:
-; BSWAP-NEXT: movl {{[0-9]+}}(%esp), %eax
-; BSWAP-NEXT: movl (%eax), %eax
-; BSWAP-NEXT: bswapl %eax
-; BSWAP-NEXT: retl
+define i32 @load_i32_by_i8_bswap(ptr %arg) nounwind {
+; X86-BSWAP-LABEL: load_i32_by_i8_bswap:
+; X86-BSWAP: # %bb.0:
+; X86-BSWAP-NEXT: movl 4(%esp), %eax
+; X86-BSWAP-NEXT: movl (%eax), %eax
+; X86-BSWAP-NEXT: bswapl %eax
+; X86-BSWAP-NEXT: retl
;
-; MOVBE-LABEL: load_i32_by_i8_bswap:
-; MOVBE: # %bb.0:
-; MOVBE-NEXT: movl {{[0-9]+}}(%esp), %eax
-; MOVBE-NEXT: movbel (%eax), %eax
-; MOVBE-NEXT: retl
+; X86-MOVBE-LABEL: load_i32_by_i8_bswap:
+; X86-MOVBE: # %bb.0:
+; X86-MOVBE-NEXT: movl 4(%esp), %eax
+; X86-MOVBE-NEXT: movbel (%eax), %eax
+; X86-MOVBE-NEXT: retl
;
-; BSWAP64-LABEL: load_i32_by_i8_bswap:
-; BSWAP64: # %bb.0:
-; BSWAP64-NEXT: movl (%rdi), %eax
-; BSWAP64-NEXT: bswapl %eax
-; BSWAP64-NEXT: retq
+; X64-BSWAP-LABEL: load_i32_by_i8_bswap:
+; X64-BSWAP: # %bb.0:
+; X64-BSWAP-NEXT: movl (%rdi), %eax
+; X64-BSWAP-NEXT: bswapl %eax
+; X64-BSWAP-NEXT: retq
;
-; MOVBE64-LABEL: load_i32_by_i8_bswap:
-; MOVBE64: # %bb.0:
-; MOVBE64-NEXT: movbel (%rdi), %eax
-; MOVBE64-NEXT: retq
+; X64-MOVBE-LABEL: load_i32_by_i8_bswap:
+; X64-MOVBE: # %bb.0:
+; X64-MOVBE-NEXT: movbel (%rdi), %eax
+; X64-MOVBE-NEXT: retq
%tmp1 = load i8, ptr %arg, align 1
%tmp2 = zext i8 %tmp1 to i32
%tmp3 = shl nuw nsw i32 %tmp2, 24
@@ -85,17 +85,17 @@ define i32 @load_i32_by_i8_bswap(ptr %arg) {
; ptr p;
; (i32) p[0] | ((i32) p[1] << 16)
-define i32 @load_i32_by_i16(ptr %arg) {
-; CHECK-LABEL: load_i32_by_i16:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl (%eax), %eax
-; CHECK-NEXT: retl
+define i32 @load_i32_by_i16(ptr %arg) nounwind {
+; X86-LABEL: load_i32_by_i16:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movl (%eax), %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: load_i32_by_i16:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movl (%rdi), %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: load_i32_by_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl (%rdi), %eax
+; X64-NEXT: retq
%tmp1 = load i16, ptr %arg, align 1
%tmp2 = zext i16 %tmp1 to i32
%tmp3 = getelementptr inbounds i16, ptr %arg, i32 1
@@ -109,17 +109,17 @@ define i32 @load_i32_by_i16(ptr %arg) {
; ptr p_16;
; ptr p_8 = (ptr) p_16;
; (i32) p_16[0] | ((i32) p[2] << 16) | ((i32) p[3] << 24)
-define i32 @load_i32_by_i16_i8(ptr %arg) {
-; CHECK-LABEL: load_i32_by_i16_i8:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl (%eax), %eax
-; CHECK-NEXT: retl
+define i32 @load_i32_by_i16_i8(ptr %arg) nounwind {
+; X86-LABEL: load_i32_by_i16_i8:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movl (%eax), %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: load_i32_by_i16_i8:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movl (%rdi), %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: load_i32_by_i16_i8:
+; X64: # %bb.0:
+; X64-NEXT: movl (%rdi), %eax
+; X64-NEXT: retq
%tmp2 = load i16, ptr %arg, align 1
%tmp3 = zext i16 %tmp2 to i32
%tmp4 = getelementptr inbounds i8, ptr %arg, i32 2
@@ -138,17 +138,17 @@ define i32 @load_i32_by_i16_i8(ptr %arg) {
; ptr p;
; (i32) ((i16) p[0] | ((i16) p[1] << 8)) | (((i32) ((i16) p[3] | ((i16) p[4] << 8)) << 16)
-define i32 @load_i32_by_i16_by_i8(ptr %arg) {
-; CHECK-LABEL: load_i32_by_i16_by_i8:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl (%eax), %eax
-; CHECK-NEXT: retl
+define i32 @load_i32_by_i16_by_i8(ptr %arg) nounwind {
+; X86-LABEL: load_i32_by_i16_by_i8:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movl (%eax), %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: load_i32_by_i16_by_i8:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movl (%rdi), %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: load_i32_by_i16_by_i8:
+; X64: # %bb.0:
+; X64-NEXT: movl (%rdi), %eax
+; X64-NEXT: retq
%tmp1 = load i8, ptr %arg, align 1
%tmp2 = zext i8 %tmp1 to i16
%tmp3 = getelementptr inbounds i8, ptr %arg, i32 1
@@ -173,30 +173,30 @@ define i32 @load_i32_by_i16_by_i8(ptr %arg) {
; ptr p;
; ((i32) (((i16) p[0] << 8) | (i16) p[1]) << 16) | (i32) (((i16) p[3] << 8) | (i16) p[4])
-define i32 @load_i32_by_i16_by_i8_bswap(ptr %arg) {
-; BSWAP-LABEL: load_i32_by_i16_by_i8_bswap:
-; BSWAP: # %bb.0:
-; BSWAP-NEXT: movl {{[0-9]+}}(%esp), %eax
-; BSWAP-NEXT: movl (%eax), %eax
-; BSWAP-NEXT: bswapl %eax
-; BSWAP-NEXT: retl
+define i32 @load_i32_by_i16_by_i8_bswap(ptr %arg) nounwind {
+; X86-BSWAP-LABEL: load_i32_by_i16_by_i8_bswap:
+; X86-BSWAP: # %bb.0:
+; X86-BSWAP-NEXT: movl 4(%esp), %eax
+; X86-BSWAP-NEXT: movl (%eax), %eax
+; X86-BSWAP-NEXT: bswapl %eax
+; X86-BSWAP-NEXT: retl
;
-; MOVBE-LABEL: load_i32_by_i16_by_i8_bswap:
-; MOVBE: # %bb.0:
-; MOVBE-NEXT: movl {{[0-9]+}}(%esp), %eax
-; MOVBE-NEXT: movbel (%eax), %eax
-; MOVBE-NEXT: retl
+; X86-MOVBE-LABEL: load_i32_by_i16_by_i8_bswap:
+; X86-MOVBE: # %bb.0:
+; X86-MOVBE-NEXT: movl 4(%esp), %eax
+; X86-MOVBE-NEXT: movbel (%eax), %eax
+; X86-MOVBE-NEXT: retl
;
-; BSWAP64-LABEL: load_i32_by_i16_by_i8_bswap:
-; BSWAP64: # %bb.0:
-; BSWAP64-NEXT: movl (%rdi), %eax
-; BSWAP64-NEXT: bswapl %eax
-; BSWAP64-NEXT: retq
+; X64-BSWAP-LABEL: load_i32_by_i16_by_i8_bswap:
+; X64-BSWAP: # %bb.0:
+; X64-BSWAP-NEXT: movl (%rdi), %eax
+; X64-BSWAP-NEXT: bswapl %eax
+; X64-BSWAP-NEXT: retq
;
-; MOVBE64-LABEL: load_i32_by_i16_by_i8_bswap:
-; MOVBE64: # %bb.0:
-; MOVBE64-NEXT: movbel (%rdi), %eax
-; MOVBE64-NEXT: retq
+; X64-MOVBE-LABEL: load_i32_by_i16_by_i8_bswap:
+; X64-MOVBE: # %bb.0:
+; X64-MOVBE-NEXT: movbel (%rdi), %eax
+; X64-MOVBE-NEXT: retq
%tmp1 = load i8, ptr %arg, align 1
%tmp2 = zext i8 %tmp1 to i16
%tmp3 = getelementptr inbounds i8, ptr %arg, i32 1
@@ -221,18 +221,18 @@ define i32 @load_i32_by_i16_by_i8_bswap(ptr %arg) {
; ptr p;
; (i64) p[0] | ((i64) p[1] << 8) | ((i64) p[2] << 16) | ((i64) p[3] << 24) | ((i64) p[4] << 32) | ((i64) p[5] << 40) | ((i64) p[6] << 48) | ((i64) p[7] << 56)
-define i64 @load_i64_by_i8(ptr %arg) {
-; CHECK-LABEL: load_i64_by_i8:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; CHECK-NEXT: movl (%ecx), %eax
-; CHECK-NEXT: movl 4(%ecx), %edx
-; CHECK-NEXT: retl
+define i64 @load_i64_by_i8(ptr %arg) nounwind {
+; X86-LABEL: load_i64_by_i8:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %ecx
+; X86-NEXT: movl (%ecx), %eax
+; X86-NEXT: movl 4(%ecx), %edx
+; X86-NEXT: retl
;
-; CHECK64-LABEL: load_i64_by_i8:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movq (%rdi), %rax
-; CHECK64-NEXT: retq
+; X64-LABEL: load_i64_by_i8:
+; X64: # %bb.0:
+; X64-NEXT: movq (%rdi), %rax
+; X64-NEXT: retq
%tmp1 = load i8, ptr %arg, align 1
%tmp2 = zext i8 %tmp1 to i64
%tmp3 = getelementptr inbounds i8, ptr %arg, i64 1
@@ -275,33 +275,33 @@ define i64 @load_i64_by_i8(ptr %arg) {
; ptr p;
; ((i64) p[0] << 56) | ((i64) p[1] << 48) | ((i64) p[2] << 40) | ((i64) p[3] << 32) | ((i64) p[4] << 24) | ((i64) p[5] << 16) | ((i64) p[6] << 8) | (i64) p[7]
-define i64 @load_i64_by_i8_bswap(ptr %arg) {
-; BSWAP-LABEL: load_i64_by_i8_bswap:
-; BSWAP: # %bb.0:
-; BSWAP-NEXT: movl {{[0-9]+}}(%esp), %eax
-; BSWAP-NEXT: movl (%eax), %edx
-; BSWAP-NEXT: movl 4(%eax), %eax
-; BSWAP-NEXT: bswapl %eax
-; BSWAP-NEXT: bswapl %edx
-; BSWAP-NEXT: retl
+define i64 @load_i64_by_i8_bswap(ptr %arg) nounwind {
+; X86-BSWAP-LABEL: load_i64_by_i8_bswap:
+; X86-BSWAP: # %bb.0:
+; X86-BSWAP-NEXT: movl 4(%esp), %eax
+; X86-BSWAP-NEXT: movl (%eax), %edx
+; X86-BSWAP-NEXT: movl 4(%eax), %eax
+; X86-BSWAP-NEXT: bswapl %eax
+; X86-BSWAP-NEXT: bswapl %edx
+; X86-BSWAP-NEXT: retl
;
-; MOVBE-LABEL: load_i64_by_i8_bswap:
-; MOVBE: # %bb.0:
-; MOVBE-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; MOVBE-NEXT: movbel 4(%ecx), %eax
-; MOVBE-NEXT: movbel (%ecx), %edx
-; MOVBE-NEXT: retl
+; X86-MOVBE-LABEL: load_i64_by_i8_bswap:
+; X86-MOVBE: # %bb.0:
+; X86-MOVBE-NEXT: movl 4(%esp), %ecx
+; X86-MOVBE-NEXT: movbel 4(%ecx), %eax
+; X86-MOVBE-NEXT: movbel (%ecx), %edx
+; X86-MOVBE-NEXT: retl
;
-; BSWAP64-LABEL: load_i64_by_i8_bswap:
-; BSWAP64: # %bb.0:
-; BSWAP64-NEXT: movq (%rdi), %rax
-; BSWAP64-NEXT: bswapq %rax
-; BSWAP64-NEXT: retq
+; X64-BSWAP-LABEL: load_i64_by_i8_bswap:
+; X64-BSWAP: # %bb.0:
+; X64-BSWAP-NEXT: movq (%rdi), %rax
+; X64-BSWAP-NEXT: bswapq %rax
+; X64-BSWAP-NEXT: retq
;
-; MOVBE64-LABEL: load_i64_by_i8_bswap:
-; MOVBE64: # %bb.0:
-; MOVBE64-NEXT: movbeq (%rdi), %rax
-; MOVBE64-NEXT: retq
+; X64-MOVBE-LABEL: load_i64_by_i8_bswap:
+; X64-MOVBE: # %bb.0:
+; X64-MOVBE-NEXT: movbeq (%rdi), %rax
+; X64-MOVBE-NEXT: retq
%tmp1 = load i8, ptr %arg, align 1
%tmp2 = zext i8 %tmp1 to i64
%tmp3 = shl nuw i64 %tmp2, 56
@@ -347,44 +347,41 @@ define i64 @load_i64_by_i8_bswap(ptr %arg) {
; i32 x = (i32) p[1]
; res = ((i32) p[0] << 24) | (x << 16) | ((i32) p[2] << 8) | (i32) p[3]
; x | res
-define i32 @load_i32_by_i8_bswap_uses(ptr %arg) {
-; CHECK-LABEL: load_i32_by_i8_bswap_uses:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushl %esi
-; CHECK-NEXT: .cfi_def_cfa_offset 8
-; CHECK-NEXT: .cfi_offset %esi, -8
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movzbl (%eax), %ecx
-; CHECK-NEXT: shll $24, %ecx
-; CHECK-NEXT: movzbl 1(%eax), %edx
-; CHECK-NEXT: movl %edx, %esi
-; CHECK-NEXT: shll $16, %esi
-; CHECK-NEXT: orl %ecx, %esi
-; CHECK-NEXT: movzbl 2(%eax), %ecx
-; CHECK-NEXT: shll $8, %ecx
-; CHECK-NEXT: orl %esi, %ecx
-; CHECK-NEXT: movzbl 3(%eax), %eax
-; CHECK-NEXT: orl %ecx, %eax
-; CHECK-NEXT: orl %edx, %eax
-; CHECK-NEXT: popl %esi
-; CHECK-NEXT: .cfi_def_cfa_offset 4
-; CHECK-NEXT: retl
+define i32 @load_i32_by_i8_bswap_uses(ptr %arg) nounwind {
+; X86-LABEL: load_i32_by_i8_bswap_uses:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl 8(%esp), %eax
+; X86-NEXT: movzbl (%eax), %ecx
+; X86-NEXT: shll $24, %ecx
+; X86-NEXT: movzbl 1(%eax), %edx
+; X86-NEXT: movl %edx, %esi
+; X86-NEXT: shll $16, %esi
+; X86-NEXT: orl %ecx, %esi
+; X86-NEXT: movzbl 2(%eax), %ecx
+; X86-NEXT: shll $8, %ecx
+; X86-NEXT: orl %esi, %ecx
+; X86-NEXT: movzbl 3(%eax), %eax
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: orl %edx, %eax
+; X86-NEXT: popl %esi
+; X86-NEXT: retl
;
-; CHECK64-LABEL: load_i32_by_i8_bswap_uses:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movzbl (%rdi), %eax
-; CHECK64-NEXT: shll $24, %eax
-; CHECK64-NEXT: movzbl 1(%rdi), %ecx
-; CHECK64-NEXT: movl %ecx, %edx
-; CHECK64-NEXT: shll $16, %edx
-; CHECK64-NEXT: orl %eax, %edx
-; CHECK64-NEXT: movzbl 2(%rdi), %esi
-; CHECK64-NEXT: shll $8, %esi
-; CHECK64-NEXT: orl %edx, %esi
-; CHECK64-NEXT: movzbl 3(%rdi), %eax
-; CHECK64-NEXT: orl %esi, %eax
-; CHECK64-NEXT: orl %ecx, %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: load_i32_by_i8_bswap_uses:
+; X64: # %bb.0:
+; X64-NEXT: movzbl (%rdi), %eax
+; X64-NEXT: shll $24, %eax
+; X64-NEXT: movzbl 1(%rdi), %ecx
+; X64-NEXT: movl %ecx, %edx
+; X64-NEXT: shll $16, %edx
+; X64-NEXT: orl %eax, %edx
+; X64-NEXT: movzbl 2(%rdi), %esi
+; X64-NEXT: shll $8, %esi
+; X64-NEXT: orl %edx, %esi
+; X64-NEXT: movzbl 3(%rdi), %eax
+; X64-NEXT: orl %esi, %eax
+; X64-NEXT: orl %ecx, %eax
+; X64-NEXT: retq
%tmp1 = load i8, ptr %arg, align 1
%tmp2 = zext i8 %tmp1 to i32
%tmp3 = shl nuw nsw i32 %tmp2, 24
@@ -411,35 +408,35 @@ define i32 @load_i32_by_i8_bswap_uses(ptr %arg) {
; ptr p;
; p0 = volatile *p;
; ((i32) p0 << 24) | ((i32) p[1] << 16) | ((i32) p[2] << 8) | (i32) p[3]
-define i32 @load_i32_by_i8_bswap_volatile(ptr %arg) {
-; CHECK-LABEL: load_i32_by_i8_bswap_volatile:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movzbl (%eax), %ecx
-; CHECK-NEXT: shll $24, %ecx
-; CHECK-NEXT: movzbl 1(%eax), %edx
-; CHECK-NEXT: shll $16, %edx
-; CHECK-NEXT: orl %ecx, %edx
-; CHECK-NEXT: movzbl 2(%eax), %ecx
-; CHECK-NEXT: shll $8, %ecx
-; CHECK-NEXT: orl %edx, %ecx
-; CHECK-NEXT: movzbl 3(%eax), %eax
-; CHECK-NEXT: orl %ecx, %eax
-; CHECK-NEXT: retl
+define i32 @load_i32_by_i8_bswap_volatile(ptr %arg) nounwind {
+; X86-LABEL: load_i32_by_i8_bswap_volatile:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movzbl (%eax), %ecx
+; X86-NEXT: shll $24, %ecx
+; X86-NEXT: movzbl 1(%eax), %edx
+; X86-NEXT: shll $16, %edx
+; X86-NEXT: orl %ecx, %edx
+; X86-NEXT: movzbl 2(%eax), %ecx
+; X86-NEXT: shll $8, %ecx
+; X86-NEXT: orl %edx, %ecx
+; X86-NEXT: movzbl 3(%eax), %eax
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: load_i32_by_i8_bswap_volatile:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movzbl (%rdi), %eax
-; CHECK64-NEXT: shll $24, %eax
-; CHECK64-NEXT: movzbl 1(%rdi), %ecx
-; CHECK64-NEXT: shll $16, %ecx
-; CHECK64-NEXT: orl %eax, %ecx
-; CHECK64-NEXT: movzbl 2(%rdi), %edx
-; CHECK64-NEXT: shll $8, %edx
-; CHECK64-NEXT: orl %ecx, %edx
-; CHECK64-NEXT: movzbl 3(%rdi), %eax
-; CHECK64-NEXT: orl %edx, %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: load_i32_by_i8_bswap_volatile:
+; X64: # %bb.0:
+; X64-NEXT: movzbl (%rdi), %eax
+; X64-NEXT: shll $24, %eax
+; X64-NEXT: movzbl 1(%rdi), %ecx
+; X64-NEXT: shll $16, %ecx
+; X64-NEXT: orl %eax, %ecx
+; X64-NEXT: movzbl 2(%rdi), %edx
+; X64-NEXT: shll $8, %edx
+; X64-NEXT: orl %ecx, %edx
+; X64-NEXT: movzbl 3(%rdi), %eax
+; X64-NEXT: orl %edx, %eax
+; X64-NEXT: retq
%tmp1 = load volatile i8, ptr %arg, align 1
%tmp2 = zext i8 %tmp1 to i32
%tmp3 = shl nuw nsw i32 %tmp2, 24
@@ -466,43 +463,40 @@ define i32 @load_i32_by_i8_bswap_volatile(ptr %arg) {
; *q = 0;
; res2 = ((i32) p[2] << 8) | (i32) p[3]
; res1 | res2
-define i32 @load_i32_by_i8_bswap_store_in_between(ptr %arg, ptr %arg1) {
-; CHECK-LABEL: load_i32_by_i8_bswap_store_in_between:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushl %esi
-; CHECK-NEXT: .cfi_def_cfa_offset 8
-; CHECK-NEXT: .cfi_offset %esi, -8
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movzbl (%eax), %edx
-; CHECK-NEXT: shll $24, %edx
-; CHECK-NEXT: movzbl 1(%eax), %esi
-; CHECK-NEXT: movl $0, (%ecx)
-; CHECK-NEXT: shll $16, %esi
-; CHECK-NEXT: orl %edx, %esi
-; CHECK-NEXT: movzbl 2(%eax), %ecx
-; CHECK-NEXT: shll $8, %ecx
-; CHECK-NEXT: orl %esi, %ecx
-; CHECK-NEXT: movzbl 3(%eax), %eax
-; CHECK-NEXT: orl %ecx, %eax
-; CHECK-NEXT: popl %esi
-; CHECK-NEXT: .cfi_def_cfa_offset 4
-; CHECK-NEXT: retl
+define i32 @load_i32_by_i8_bswap_store_in_between(ptr %arg, ptr %arg1) nounwind {
+; X86-LABEL: load_i32_by_i8_bswap_store_in_between:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl 12(%esp), %ecx
+; X86-NEXT: movl 8(%esp), %eax
+; X86-NEXT: movzbl (%eax), %edx
+; X86-NEXT: shll $24, %edx
+; X86-NEXT: movzbl 1(%eax), %esi
+; X86-NEXT: movl $0, (%ecx)
+; X86-NEXT: shll $16, %esi
+; X86-NEXT: orl %edx, %esi
+; X86-NEXT: movzbl 2(%eax), %ecx
+; X86-NEXT: shll $8, %ecx
+; X86-NEXT: orl %esi, %ecx
+; X86-NEXT: movzbl 3(%eax), %eax
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: popl %esi
+; X86-NEXT: retl
;
-; CHECK64-LABEL: load_i32_by_i8_bswap_store_in_between:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movzbl (%rdi), %eax
-; CHECK64-NEXT: shll $24, %eax
-; CHECK64-NEXT: movzbl 1(%rdi), %ecx
-; CHECK64-NEXT: movl $0, (%rsi)
-; CHECK64-NEXT: shll $16, %ecx
-; CHECK64-NEXT: orl %eax, %ecx
-; CHECK64-NEXT: movzbl 2(%rdi), %edx
-; CHECK64-NEXT: shll $8, %edx
-; CHECK64-NEXT: orl %ecx, %edx
-; CHECK64-NEXT: movzbl 3(%rdi), %eax
-; CHECK64-NEXT: orl %edx, %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: load_i32_by_i8_bswap_store_in_between:
+; X64: # %bb.0:
+; X64-NEXT: movzbl (%rdi), %eax
+; X64-NEXT: shll $24, %eax
+; X64-NEXT: movzbl 1(%rdi), %ecx
+; X64-NEXT: movl $0, (%rsi)
+; X64-NEXT: shll $16, %ecx
+; X64-NEXT: orl %eax, %ecx
+; X64-NEXT: movzbl 2(%rdi), %edx
+; X64-NEXT: shll $8, %edx
+; X64-NEXT: orl %ecx, %edx
+; X64-NEXT: movzbl 3(%rdi), %eax
+; X64-NEXT: orl %edx, %eax
+; X64-NEXT: retq
%tmp2 = load i8, ptr %arg, align 1
%tmp3 = zext i8 %tmp2 to i32
%tmp4 = shl nuw nsw i32 %tmp3, 24
@@ -528,36 +522,36 @@ define i32 @load_i32_by_i8_bswap_store_in_between(ptr %arg, ptr %arg1) {
; One of the loads is from an unrelated location
; ptr p, q;
; ((i32) p[0] << 24) | ((i32) q[1] << 16) | ((i32) p[2] << 8) | (i32) p[3]
-define i32 @load_i32_by_i8_bswap_unrelated_load(ptr %arg, ptr %arg1) {
-; CHECK-LABEL: load_i32_by_i8_bswap_unrelated_load:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; CHECK-NEXT: movzbl (%ecx), %edx
-; CHECK-NEXT: shll $24, %edx
-; CHECK-NEXT: movzbl 1(%eax), %eax
-; CHECK-NEXT: shll $16, %eax
-; CHECK-NEXT: orl %edx, %eax
-; CHECK-NEXT: movzbl 2(%ecx), %edx
-; CHECK-NEXT: shll $8, %edx
-; CHECK-NEXT: orl %eax, %edx
-; CHECK-NEXT: movzbl 3(%ecx), %eax
-; CHECK-NEXT: orl %edx, %eax
-; CHECK-NEXT: retl
+define i32 @load_i32_by_i8_bswap_unrelated_load(ptr %arg, ptr %arg1) nounwind {
+; X86-LABEL: load_i32_by_i8_bswap_unrelated_load:
+; X86: # %bb.0:
+; X86-NEXT: movl 8(%esp), %eax
+; X86-NEXT: movl 4(%esp), %ecx
+; X86-NEXT: movzbl (%ecx), %edx
+; X86-NEXT: shll $24, %edx
+; X86-NEXT: movzbl 1(%eax), %eax
+; X86-NEXT: shll $16, %eax
+; X86-NEXT: orl %edx, %eax
+; X86-NEXT: movzbl 2(%ecx), %edx
+; X86-NEXT: shll $8, %edx
+; X86-NEXT: orl %eax, %edx
+; X86-NEXT: movzbl 3(%ecx), %eax
+; X86-NEXT: orl %edx, %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: load_i32_by_i8_bswap_unrelated_load:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movzbl (%rdi), %eax
-; CHECK64-NEXT: shll $24, %eax
-; CHECK64-NEXT: movzbl 1(%rsi), %ecx
-; CHECK64-NEXT: shll $16, %ecx
-; CHECK64-NEXT: orl %eax, %ecx
-; CHECK64-NEXT: movzbl 2(%rdi), %edx
-; CHECK64-NEXT: shll $8, %edx
-; CHECK64-NEXT: orl %ecx, %edx
-; CHECK64-NEXT: movzbl 3(%rdi), %eax
-; CHECK64-NEXT: orl %edx, %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: load_i32_by_i8_bswap_unrelated_load:
+; X64: # %bb.0:
+; X64-NEXT: movzbl (%rdi), %eax
+; X64-NEXT: shll $24, %eax
+; X64-NEXT: movzbl 1(%rsi), %ecx
+; X64-NEXT: shll $16, %ecx
+; X64-NEXT: orl %eax, %ecx
+; X64-NEXT: movzbl 2(%rdi), %edx
+; X64-NEXT: shll $8, %edx
+; X64-NEXT: orl %ecx, %edx
+; X64-NEXT: movzbl 3(%rdi), %eax
+; X64-NEXT: orl %edx, %eax
+; X64-NEXT: retq
%tmp3 = load i8, ptr %arg, align 1
%tmp4 = zext i8 %tmp3 to i32
%tmp5 = shl nuw nsw i32 %tmp4, 24
@@ -581,17 +575,17 @@ define i32 @load_i32_by_i8_bswap_unrelated_load(ptr %arg, ptr %arg1) {
; ptr p;
; (i32) p[1] | ((i32) p[2] << 8) | ((i32) p[3] << 16) | ((i32) p[4] << 24)
-define i32 @load_i32_by_i8_nonzero_offset(ptr %arg) {
-; CHECK-LABEL: load_i32_by_i8_nonzero_offset:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl 1(%eax), %eax
-; CHECK-NEXT: retl
+define i32 @load_i32_by_i8_nonzero_offset(ptr %arg) nounwind {
+; X86-LABEL: load_i32_by_i8_nonzero_offset:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movl 1(%eax), %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: load_i32_by_i8_nonzero_offset:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movl 1(%rdi), %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: load_i32_by_i8_nonzero_offset:
+; X64: # %bb.0:
+; X64-NEXT: movl 1(%rdi), %eax
+; X64-NEXT: retq
%tmp1 = getelementptr inbounds i8, ptr %arg, i32 1
%tmp2 = load i8, ptr %tmp1, align 1
%tmp3 = zext i8 %tmp2 to i32
@@ -615,17 +609,17 @@ define i32 @load_i32_by_i8_nonzero_offset(ptr %arg) {
; ptr p;
; (i32) p[-4] | ((i32) p[-3] << 8) | ((i32) p[-2] << 16) | ((i32) p[-1] << 24)
-define i32 @load_i32_by_i8_neg_offset(ptr %arg) {
-; CHECK-LABEL: load_i32_by_i8_neg_offset:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl -4(%eax), %eax
-; CHECK-NEXT: retl
+define i32 @load_i32_by_i8_neg_offset(ptr %arg) nounwind {
+; X86-LABEL: load_i32_by_i8_neg_offset:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movl -4(%eax), %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: load_i32_by_i8_neg_offset:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movl -4(%rdi), %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: load_i32_by_i8_neg_offset:
+; X64: # %bb.0:
+; X64-NEXT: movl -4(%rdi), %eax
+; X64-NEXT: retq
%tmp1 = getelementptr inbounds i8, ptr %arg, i32 -4
%tmp2 = load i8, ptr %tmp1, align 1
%tmp3 = zext i8 %tmp2 to i32
@@ -649,30 +643,30 @@ define i32 @load_i32_by_i8_neg_offset(ptr %arg) {
; ptr p;
; (i32) p[4] | ((i32) p[3] << 8) | ((i32) p[2] << 16) | ((i32) p[1] << 24)
-define i32 @load_i32_by_i8_nonzero_offset_bswap(ptr %arg) {
-; BSWAP-LABEL: load_i32_by_i8_nonzero_offset_bswap:
-; BSWAP: # %bb.0:
-; BSWAP-NEXT: movl {{[0-9]+}}(%esp), %eax
-; BSWAP-NEXT: movl 1(%eax), %eax
-; BSWAP-NEXT: bswapl %eax
-; BSWAP-NEXT: retl
+define i32 @load_i32_by_i8_nonzero_offset_bswap(ptr %arg) nounwind {
+; X86-BSWAP-LABEL: load_i32_by_i8_nonzero_offset_bswap:
+; X86-BSWAP: # %bb.0:
+; X86-BSWAP-NEXT: movl 4(%esp), %eax
+; X86-BSWAP-NEXT: movl 1(%eax), %eax
+; X86-BSWAP-NEXT: bswapl %eax
+; X86-BSWAP-NEXT: retl
;
-; MOVBE-LABEL: load_i32_by_i8_nonzero_offset_bswap:
-; MOVBE: # %bb.0:
-; MOVBE-NEXT: movl {{[0-9]+}}(%esp), %eax
-; MOVBE-NEXT: movbel 1(%eax), %eax
-; MOVBE-NEXT: retl
+; X86-MOVBE-LABEL: load_i32_by_i8_nonzero_offset_bswap:
+; X86-MOVBE: # %bb.0:
+; X86-MOVBE-NEXT: movl 4(%esp), %eax
+; X86-MOVBE-NEXT: movbel 1(%eax), %eax
+; X86-MOVBE-NEXT: retl
;
-; BSWAP64-LABEL: load_i32_by_i8_nonzero_offset_bswap:
-; BSWAP64: # %bb.0:
-; BSWAP64-NEXT: movl 1(%rdi), %eax
-; BSWAP64-NEXT: bswapl %eax
-; BSWAP64-NEXT: retq
+; X64-BSWAP-LABEL: load_i32_by_i8_nonzero_offset_bswap:
+; X64-BSWAP: # %bb.0:
+; X64-BSWAP-NEXT: movl 1(%rdi), %eax
+; X64-BSWAP-NEXT: bswapl %eax
+; X64-BSWAP-NEXT: retq
;
-; MOVBE64-LABEL: load_i32_by_i8_nonzero_offset_bswap:
-; MOVBE64: # %bb.0:
-; MOVBE64-NEXT: movbel 1(%rdi), %eax
-; MOVBE64-NEXT: retq
+; X64-MOVBE-LABEL: load_i32_by_i8_nonzero_offset_bswap:
+; X64-MOVBE: # %bb.0:
+; X64-MOVBE-NEXT: movbel 1(%rdi), %eax
+; X64-MOVBE-NEXT: retq
%tmp1 = getelementptr inbounds i8, ptr %arg, i32 4
%tmp2 = load i8, ptr %tmp1, align 1
%tmp3 = zext i8 %tmp2 to i32
@@ -696,30 +690,30 @@ define i32 @load_i32_by_i8_nonzero_offset_bswap(ptr %arg) {
; ptr p;
; (i32) p[-1] | ((i32) p[-2] << 8) | ((i32) p[-3] << 16) | ((i32) p[-4] << 24)
-define i32 @load_i32_by_i8_neg_offset_bswap(ptr %arg) {
-; BSWAP-LABEL: load_i32_by_i8_neg_offset_bswap:
-; BSWAP: # %bb.0:
-; BSWAP-NEXT: movl {{[0-9]+}}(%esp), %eax
-; BSWAP-NEXT: movl -4(%eax), %eax
-; BSWAP-NEXT: bswapl %eax
-; BSWAP-NEXT: retl
+define i32 @load_i32_by_i8_neg_offset_bswap(ptr %arg) nounwind {
+; X86-BSWAP-LABEL: load_i32_by_i8_neg_offset_bswap:
+; X86-BSWAP: # %bb.0:
+; X86-BSWAP-NEXT: movl 4(%esp), %eax
+; X86-BSWAP-NEXT: movl -4(%eax), %eax
+; X86-BSWAP-NEXT: bswapl %eax
+; X86-BSWAP-NEXT: retl
;
-; MOVBE-LABEL: load_i32_by_i8_neg_offset_bswap:
-; MOVBE: # %bb.0:
-; MOVBE-NEXT: movl {{[0-9]+}}(%esp), %eax
-; MOVBE-NEXT: movbel -4(%eax), %eax
-; MOVBE-NEXT: retl
+; X86-MOVBE-LABEL: load_i32_by_i8_neg_offset_bswap:
+; X86-MOVBE: # %bb.0:
+; X86-MOVBE-NEXT: movl 4(%esp), %eax
+; X86-MOVBE-NEXT: movbel -4(%eax), %eax
+; X86-MOVBE-NEXT: retl
;
-; BSWAP64-LABEL: load_i32_by_i8_neg_offset_bswap:
-; BSWAP64: # %bb.0:
-; BSWAP64-NEXT: movl -4(%rdi), %eax
-; BSWAP64-NEXT: bswapl %eax
-; BSWAP64-NEXT: retq
+; X64-BSWAP-LABEL: load_i32_by_i8_neg_offset_bswap:
+; X64-BSWAP: # %bb.0:
+; X64-BSWAP-NEXT: movl -4(%rdi), %eax
+; X64-BSWAP-NEXT: bswapl %eax
+; X64-BSWAP-NEXT: retq
;
-; MOVBE64-LABEL: load_i32_by_i8_neg_offset_bswap:
-; MOVBE64: # %bb.0:
-; MOVBE64-NEXT: movbel -4(%rdi), %eax
-; MOVBE64-NEXT: retq
+; X64-MOVBE-LABEL: load_i32_by_i8_neg_offset_bswap:
+; X64-MOVBE: # %bb.0:
+; X64-MOVBE-NEXT: movbel -4(%rdi), %eax
+; X64-MOVBE-NEXT: retq
%tmp1 = getelementptr inbounds i8, ptr %arg, i32 -1
%tmp2 = load i8, ptr %tmp1, align 1
%tmp3 = zext i8 %tmp2 to i32
@@ -743,34 +737,34 @@ define i32 @load_i32_by_i8_neg_offset_bswap(ptr %arg) {
; ptr p; i32 i;
; ((i32) p[i] << 24) | ((i32) p[i + 1] << 16) | ((i32) p[i + 2] << 8) | (i32) p[i + 3]
-define i32 @load_i32_by_i8_bswap_base_index_offset(ptr %arg, i32 %arg1) {
-; BSWAP-LABEL: load_i32_by_i8_bswap_base_index_offset:
-; BSWAP: # %bb.0:
-; BSWAP-NEXT: movl {{[0-9]+}}(%esp), %eax
-; BSWAP-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; BSWAP-NEXT: movl (%ecx,%eax), %eax
-; BSWAP-NEXT: bswapl %eax
-; BSWAP-NEXT: retl
+define i32 @load_i32_by_i8_bswap_base_index_offset(ptr %arg, i32 %arg1) nounwind {
+; X86-BSWAP-LABEL: load_i32_by_i8_bswap_base_index_offset:
+; X86-BSWAP: # %bb.0:
+; X86-BSWAP-NEXT: movl 8(%esp), %eax
+; X86-BSWAP-NEXT: movl 4(%esp), %ecx
+; X86-BSWAP-NEXT: movl (%ecx,%eax), %eax
+; X86-BSWAP-NEXT: bswapl %eax
+; X86-BSWAP-NEXT: retl
;
-; MOVBE-LABEL: load_i32_by_i8_bswap_base_index_offset:
-; MOVBE: # %bb.0:
-; MOVBE-NEXT: movl {{[0-9]+}}(%esp), %eax
-; MOVBE-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; MOVBE-NEXT: movbel (%ecx,%eax), %eax
-; MOVBE-NEXT: retl
+; X86-MOVBE-LABEL: load_i32_by_i8_bswap_base_index_offset:
+; X86-MOVBE: # %bb.0:
+; X86-MOVBE-NEXT: movl 8(%esp), %eax
+; X86-MOVBE-NEXT: movl 4(%esp), %ecx
+; X86-MOVBE-NEXT: movbel (%ecx,%eax), %eax
+; X86-MOVBE-NEXT: retl
;
-; BSWAP64-LABEL: load_i32_by_i8_bswap_base_index_offset:
-; BSWAP64: # %bb.0:
-; BSWAP64-NEXT: movslq %esi, %rax
-; BSWAP64-NEXT: movl (%rdi,%rax), %eax
-; BSWAP64-NEXT: bswapl %eax
-; BSWAP64-NEXT: retq
+; X64-BSWAP-LABEL: load_i32_by_i8_bswap_base_index_offset:
+; X64-BSWAP: # %bb.0:
+; X64-BSWAP-NEXT: movslq %esi, %rax
+; X64-BSWAP-NEXT: movl (%rdi,%rax), %eax
+; X64-BSWAP-NEXT: bswapl %eax
+; X64-BSWAP-NEXT: retq
;
-; MOVBE64-LABEL: load_i32_by_i8_bswap_base_index_offset:
-; MOVBE64: # %bb.0:
-; MOVBE64-NEXT: movslq %esi, %rax
-; MOVBE64-NEXT: movbel (%rdi,%rax), %eax
-; MOVBE64-NEXT: retq
+; X64-MOVBE-LABEL: load_i32_by_i8_bswap_base_index_offset:
+; X64-MOVBE: # %bb.0:
+; X64-MOVBE-NEXT: movslq %esi, %rax
+; X64-MOVBE-NEXT: movbel (%rdi,%rax), %eax
+; X64-MOVBE-NEXT: retq
%tmp2 = getelementptr inbounds i8, ptr %arg, i32 %arg1
%tmp3 = load i8, ptr %tmp2, align 1
%tmp4 = zext i8 %tmp3 to i32
@@ -796,18 +790,18 @@ define i32 @load_i32_by_i8_bswap_base_index_offset(ptr %arg, i32 %arg1) {
}
; Verify that we don't crash handling shl i32 %conv57, 32
-define void @shift_i32_by_32(ptr %src1, ptr %src2, ptr %dst) {
-; CHECK-LABEL: shift_i32_by_32:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl $0, 4(%eax)
-; CHECK-NEXT: movl $0, (%eax)
-; CHECK-NEXT: retl
+define void @shift_i32_by_32(ptr %src1, ptr %src2, ptr %dst) nounwind {
+; X86-LABEL: shift_i32_by_32:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl 12(%esp), %eax
+; X86-NEXT: movl $0, 4(%eax)
+; X86-NEXT: movl $0, (%eax)
+; X86-NEXT: retl
;
-; CHECK64-LABEL: shift_i32_by_32:
-; CHECK64: # %bb.0: # %entry
-; CHECK64-NEXT: movq $0, (%rdx)
-; CHECK64-NEXT: retq
+; X64-LABEL: shift_i32_by_32:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movq $0, (%rdx)
+; X64-NEXT: retq
entry:
%load1 = load i8, ptr %src1, align 1
%conv46 = zext i8 %load1 to i32
@@ -827,30 +821,30 @@ declare i16 @llvm.bswap.i16(i16)
; ptr p;
; (i32) bswap(p[1]) | (i32) bswap(p[0] << 16)
-define i32 @load_i32_by_bswap_i16(ptr %arg) {
-; BSWAP-LABEL: load_i32_by_bswap_i16:
-; BSWAP: # %bb.0:
-; BSWAP-NEXT: movl {{[0-9]+}}(%esp), %eax
-; BSWAP-NEXT: movl (%eax), %eax
-; BSWAP-NEXT: bswapl %eax
-; BSWAP-NEXT: retl
+define i32 @load_i32_by_bswap_i16(ptr %arg) nounwind {
+; X86-BSWAP-LABEL: load_i32_by_bswap_i16:
+; X86-BSWAP: # %bb.0:
+; X86-BSWAP-NEXT: movl 4(%esp), %eax
+; X86-BSWAP-NEXT: movl (%eax), %eax
+; X86-BSWAP-NEXT: bswapl %eax
+; X86-BSWAP-NEXT: retl
;
-; MOVBE-LABEL: load_i32_by_bswap_i16:
-; MOVBE: # %bb.0:
-; MOVBE-NEXT: movl {{[0-9]+}}(%esp), %eax
-; MOVBE-NEXT: movbel (%eax), %eax
-; MOVBE-NEXT: retl
+; X86-MOVBE-LABEL: load_i32_by_bswap_i16:
+; X86-MOVBE: # %bb.0:
+; X86-MOVBE-NEXT: movl 4(%esp), %eax
+; X86-MOVBE-NEXT: movbel (%eax), %eax
+; X86-MOVBE-NEXT: retl
;
-; BSWAP64-LABEL: load_i32_by_bswap_i16:
-; BSWAP64: # %bb.0:
-; BSWAP64-NEXT: movl (%rdi), %eax
-; BSWAP64-NEXT: bswapl %eax
-; BSWAP64-NEXT: retq
+; X64-BSWAP-LABEL: load_i32_by_bswap_i16:
+; X64-BSWAP: # %bb.0:
+; X64-BSWAP-NEXT: movl (%rdi), %eax
+; X64-BSWAP-NEXT: bswapl %eax
+; X64-BSWAP-NEXT: retq
;
-; MOVBE64-LABEL: load_i32_by_bswap_i16:
-; MOVBE64: # %bb.0:
-; MOVBE64-NEXT: movbel (%rdi), %eax
-; MOVBE64-NEXT: retq
+; X64-MOVBE-LABEL: load_i32_by_bswap_i16:
+; X64-MOVBE: # %bb.0:
+; X64-MOVBE-NEXT: movbel (%rdi), %eax
+; X64-MOVBE-NEXT: retq
%tmp1 = load i16, ptr %arg, align 4
%tmp11 = call i16 @llvm.bswap.i16(i16 %tmp1)
%tmp2 = zext i16 %tmp11 to i32
@@ -865,17 +859,17 @@ define i32 @load_i32_by_bswap_i16(ptr %arg) {
; ptr p;
; (i32) p[0] | (sext(p[1] << 16) to i32)
-define i32 @load_i32_by_sext_i16(ptr %arg) {
-; CHECK-LABEL: load_i32_by_sext_i16:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl (%eax), %eax
-; CHECK-NEXT: retl
+define i32 @load_i32_by_sext_i16(ptr %arg) nounwind {
+; X86-LABEL: load_i32_by_sext_i16:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movl (%eax), %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: load_i32_by_sext_i16:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movl (%rdi), %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: load_i32_by_sext_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl (%rdi), %eax
+; X64-NEXT: retq
%tmp1 = load i16, ptr %arg, align 1
%tmp2 = zext i16 %tmp1 to i32
%tmp3 = getelementptr inbounds i16, ptr %arg, i32 1
@@ -889,19 +883,19 @@ define i32 @load_i32_by_sext_i16(ptr %arg) {
; ptr arg; i32 i;
; p = arg + 12;
; (i32) p[i] | ((i32) p[i + 1] << 8) | ((i32) p[i + 2] << 16) | ((i32) p[i + 3] << 24)
-define i32 @load_i32_by_i8_base_offset_index(ptr %arg, i32 %i) {
-; CHECK-LABEL: load_i32_by_i8_base_offset_index:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; CHECK-NEXT: movl 12(%eax,%ecx), %eax
-; CHECK-NEXT: retl
+define i32 @load_i32_by_i8_base_offset_index(ptr %arg, i32 %i) nounwind {
+; X86-LABEL: load_i32_by_i8_base_offset_index:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl 12(%eax,%ecx), %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: load_i32_by_i8_base_offset_index:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movl %esi, %eax
-; CHECK64-NEXT: movl 12(%rdi,%rax), %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: load_i32_by_i8_base_offset_index:
+; X64: # %bb.0:
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: movl 12(%rdi,%rax), %eax
+; X64-NEXT: retq
%tmp = add nuw nsw i32 %i, 3
%tmp2 = add nuw nsw i32 %i, 2
%tmp3 = add nuw nsw i32 %i, 1
@@ -934,19 +928,19 @@ define i32 @load_i32_by_i8_base_offset_index(ptr %arg, i32 %i) {
; ptr arg; i32 i;
; p = arg + 12;
; (i32) p[i + 1] | ((i32) p[i + 2] << 8) | ((i32) p[i + 3] << 16) | ((i32) p[i + 4] << 24)
-define i32 @load_i32_by_i8_base_offset_index_2(ptr %arg, i32 %i) {
-; CHECK-LABEL: load_i32_by_i8_base_offset_index_2:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; CHECK-NEXT: movl 13(%eax,%ecx), %eax
-; CHECK-NEXT: retl
+define i32 @load_i32_by_i8_base_offset_index_2(ptr %arg, i32 %i) nounwind {
+; X86-LABEL: load_i32_by_i8_base_offset_index_2:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl 13(%eax,%ecx), %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: load_i32_by_i8_base_offset_index_2:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movl %esi, %eax
-; CHECK64-NEXT: movl 13(%rax,%rdi), %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: load_i32_by_i8_base_offset_index_2:
+; X64: # %bb.0:
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: movl 13(%rax,%rdi), %eax
+; X64-NEXT: retq
%tmp = add nuw nsw i32 %i, 4
%tmp2 = add nuw nsw i32 %i, 3
%tmp3 = add nuw nsw i32 %i, 2
@@ -990,19 +984,19 @@ define i32 @load_i32_by_i8_base_offset_index_2(ptr %arg, i32 %i) {
; In order to fold the pattern above we need to reassociate the address computation
; first. By the time the address computation is reassociated loads are combined to
; to zext and aext loads.
-define i32 @load_i32_by_i8_zaext_loads(ptr %arg, i32 %arg1) {
-; CHECK-LABEL: load_i32_by_i8_zaext_loads:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; CHECK-NEXT: movl 12(%eax,%ecx), %eax
-; CHECK-NEXT: retl
+define i32 @load_i32_by_i8_zaext_loads(ptr %arg, i32 %arg1) nounwind {
+; X86-LABEL: load_i32_by_i8_zaext_loads:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl 12(%eax,%ecx), %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: load_i32_by_i8_zaext_loads:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movl %esi, %eax
-; CHECK64-NEXT: movl 12(%rdi,%rax), %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: load_i32_by_i8_zaext_loads:
+; X64: # %bb.0:
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: movl 12(%rdi,%rax), %eax
+; X64-NEXT: retq
%tmp = add nuw nsw i32 %arg1, 3
%tmp2 = add nuw nsw i32 %arg1, 2
%tmp3 = add nuw nsw i32 %arg1, 1
@@ -1046,19 +1040,19 @@ define i32 @load_i32_by_i8_zaext_loads(ptr %arg, i32 %arg1) {
; p3 = arg + i + 3;
;
; (i32) p0[12] | ((i32) p1[12] << 8) | ((i32) p2[12] << 16) | ((i32) p3[12] << 24)
-define i32 @load_i32_by_i8_zsext_loads(ptr %arg, i32 %arg1) {
-; CHECK-LABEL: load_i32_by_i8_zsext_loads:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; CHECK-NEXT: movl 12(%eax,%ecx), %eax
-; CHECK-NEXT: retl
+define i32 @load_i32_by_i8_zsext_loads(ptr %arg, i32 %arg1) nounwind {
+; X86-LABEL: load_i32_by_i8_zsext_loads:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movl 8(%esp), %ecx
+; X86-NEXT: movl 12(%eax,%ecx), %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: load_i32_by_i8_zsext_loads:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movl %esi, %eax
-; CHECK64-NEXT: movl 12(%rdi,%rax), %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: load_i32_by_i8_zsext_loads:
+; X64: # %bb.0:
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: movl 12(%rdi,%rax), %eax
+; X64-NEXT: retq
%tmp = add nuw nsw i32 %arg1, 3
%tmp2 = add nuw nsw i32 %arg1, 2
%tmp3 = add nuw nsw i32 %arg1, 1
@@ -1094,17 +1088,17 @@ define i32 @load_i32_by_i8_zsext_loads(ptr %arg, i32 %arg1) {
; ptr p;
; (i32) p[0] | ((i32) p[1] << 8)
-define i32 @zext_load_i32_by_i8(ptr %arg) {
-; CHECK-LABEL: zext_load_i32_by_i8:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movzwl (%eax), %eax
-; CHECK-NEXT: retl
+define i32 @zext_load_i32_by_i8(ptr %arg) nounwind {
+; X86-LABEL: zext_load_i32_by_i8:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movzwl (%eax), %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: zext_load_i32_by_i8:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movzwl (%rdi), %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: zext_load_i32_by_i8:
+; X64: # %bb.0:
+; X64-NEXT: movzwl (%rdi), %eax
+; X64-NEXT: retq
%tmp2 = load i8, ptr %arg, align 1
%tmp3 = zext i8 %tmp2 to i32
%tmp4 = getelementptr inbounds i8, ptr %arg, i32 1
@@ -1117,25 +1111,25 @@ define i32 @zext_load_i32_by_i8(ptr %arg) {
; ptr p;
; ((i32) p[0] << 8) | ((i32) p[1] << 16)
-define i32 @zext_load_i32_by_i8_shl_8(ptr %arg) {
-; CHECK-LABEL: zext_load_i32_by_i8_shl_8:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movzbl (%eax), %ecx
-; CHECK-NEXT: shll $8, %ecx
-; CHECK-NEXT: movzbl 1(%eax), %eax
-; CHECK-NEXT: shll $16, %eax
-; CHECK-NEXT: orl %ecx, %eax
-; CHECK-NEXT: retl
+define i32 @zext_load_i32_by_i8_shl_8(ptr %arg) nounwind {
+; X86-LABEL: zext_load_i32_by_i8_shl_8:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movzbl (%eax), %ecx
+; X86-NEXT: shll $8, %ecx
+; X86-NEXT: movzbl 1(%eax), %eax
+; X86-NEXT: shll $16, %eax
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: zext_load_i32_by_i8_shl_8:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movzbl (%rdi), %ecx
-; CHECK64-NEXT: shll $8, %ecx
-; CHECK64-NEXT: movzbl 1(%rdi), %eax
-; CHECK64-NEXT: shll $16, %eax
-; CHECK64-NEXT: orl %ecx, %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: zext_load_i32_by_i8_shl_8:
+; X64: # %bb.0:
+; X64-NEXT: movzbl (%rdi), %ecx
+; X64-NEXT: shll $8, %ecx
+; X64-NEXT: movzbl 1(%rdi), %eax
+; X64-NEXT: shll $16, %eax
+; X64-NEXT: orl %ecx, %eax
+; X64-NEXT: retq
%tmp2 = load i8, ptr %arg, align 1
%tmp3 = zext i8 %tmp2 to i32
%tmp30 = shl nuw nsw i32 %tmp3, 8
@@ -1149,25 +1143,25 @@ define i32 @zext_load_i32_by_i8_shl_8(ptr %arg) {
; ptr p;
; ((i32) p[0] << 16) | ((i32) p[1] << 24)
-define i32 @zext_load_i32_by_i8_shl_16(ptr %arg) {
-; CHECK-LABEL: zext_load_i32_by_i8_shl_16:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movzbl (%eax), %ecx
-; CHECK-NEXT: shll $16, %ecx
-; CHECK-NEXT: movzbl 1(%eax), %eax
-; CHECK-NEXT: shll $24, %eax
-; CHECK-NEXT: orl %ecx, %eax
-; CHECK-NEXT: retl
+define i32 @zext_load_i32_by_i8_shl_16(ptr %arg) nounwind {
+; X86-LABEL: zext_load_i32_by_i8_shl_16:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movzbl (%eax), %ecx
+; X86-NEXT: shll $16, %ecx
+; X86-NEXT: movzbl 1(%eax), %eax
+; X86-NEXT: shll $24, %eax
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: zext_load_i32_by_i8_shl_16:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movzbl (%rdi), %ecx
-; CHECK64-NEXT: shll $16, %ecx
-; CHECK64-NEXT: movzbl 1(%rdi), %eax
-; CHECK64-NEXT: shll $24, %eax
-; CHECK64-NEXT: orl %ecx, %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: zext_load_i32_by_i8_shl_16:
+; X64: # %bb.0:
+; X64-NEXT: movzbl (%rdi), %ecx
+; X64-NEXT: shll $16, %ecx
+; X64-NEXT: movzbl 1(%rdi), %eax
+; X64-NEXT: shll $24, %eax
+; X64-NEXT: orl %ecx, %eax
+; X64-NEXT: retq
%tmp2 = load i8, ptr %arg, align 1
%tmp3 = zext i8 %tmp2 to i32
%tmp30 = shl nuw nsw i32 %tmp3, 16
@@ -1181,34 +1175,34 @@ define i32 @zext_load_i32_by_i8_shl_16(ptr %arg) {
; ptr p;
; (i32) p[1] | ((i32) p[0] << 8)
-define i32 @zext_load_i32_by_i8_bswap(ptr %arg) {
-; BSWAP-LABEL: zext_load_i32_by_i8_bswap:
-; BSWAP: # %bb.0:
-; BSWAP-NEXT: movl {{[0-9]+}}(%esp), %eax
-; BSWAP-NEXT: movzwl (%eax), %eax
-; BSWAP-NEXT: rolw $8, %ax
-; BSWAP-NEXT: movzwl %ax, %eax
-; BSWAP-NEXT: retl
+define i32 @zext_load_i32_by_i8_bswap(ptr %arg) nounwind {
+; X86-BSWAP-LABEL: zext_load_i32_by_i8_bswap:
+; X86-BSWAP: # %bb.0:
+; X86-BSWAP-NEXT: movl 4(%esp), %eax
+; X86-BSWAP-NEXT: movzwl (%eax), %eax
+; X86-BSWAP-NEXT: rolw $8, %ax
+; X86-BSWAP-NEXT: movzwl %ax, %eax
+; X86-BSWAP-NEXT: retl
;
-; MOVBE-LABEL: zext_load_i32_by_i8_bswap:
-; MOVBE: # %bb.0:
-; MOVBE-NEXT: movl {{[0-9]+}}(%esp), %eax
-; MOVBE-NEXT: movbew (%eax), %ax
-; MOVBE-NEXT: movzwl %ax, %eax
-; MOVBE-NEXT: retl
+; X86-MOVBE-LABEL: zext_load_i32_by_i8_bswap:
+; X86-MOVBE: # %bb.0:
+; X86-MOVBE-NEXT: movl 4(%esp), %eax
+; X86-MOVBE-NEXT: movbew (%eax), %ax
+; X86-MOVBE-NEXT: movzwl %ax, %eax
+; X86-MOVBE-NEXT: retl
;
-; BSWAP64-LABEL: zext_load_i32_by_i8_bswap:
-; BSWAP64: # %bb.0:
-; BSWAP64-NEXT: movzwl (%rdi), %eax
-; BSWAP64-NEXT: rolw $8, %ax
-; BSWAP64-NEXT: movzwl %ax, %eax
-; BSWAP64-NEXT: retq
+; X64-BSWAP-LABEL: zext_load_i32_by_i8_bswap:
+; X64-BSWAP: # %bb.0:
+; X64-BSWAP-NEXT: movzwl (%rdi), %eax
+; X64-BSWAP-NEXT: rolw $8, %ax
+; X64-BSWAP-NEXT: movzwl %ax, %eax
+; X64-BSWAP-NEXT: retq
;
-; MOVBE64-LABEL: zext_load_i32_by_i8_bswap:
-; MOVBE64: # %bb.0:
-; MOVBE64-NEXT: movbew (%rdi), %ax
-; MOVBE64-NEXT: movzwl %ax, %eax
-; MOVBE64-NEXT: retq
+; X64-MOVBE-LABEL: zext_load_i32_by_i8_bswap:
+; X64-MOVBE: # %bb.0:
+; X64-MOVBE-NEXT: movbew (%rdi), %ax
+; X64-MOVBE-NEXT: movzwl %ax, %eax
+; X64-MOVBE-NEXT: retq
%tmp1 = getelementptr inbounds i8, ptr %arg, i32 1
%tmp2 = load i8, ptr %tmp1, align 1
%tmp3 = zext i8 %tmp2 to i32
@@ -1221,25 +1215,25 @@ define i32 @zext_load_i32_by_i8_bswap(ptr %arg) {
; ptr p;
; ((i32) p[1] << 8) | ((i32) p[0] << 16)
-define i32 @zext_load_i32_by_i8_bswap_shl_8(ptr %arg) {
-; CHECK-LABEL: zext_load_i32_by_i8_bswap_shl_8:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movzbl 1(%eax), %ecx
-; CHECK-NEXT: shll $8, %ecx
-; CHECK-NEXT: movzbl (%eax), %eax
-; CHECK-NEXT: shll $16, %eax
-; CHECK-NEXT: orl %ecx, %eax
-; CHECK-NEXT: retl
+define i32 @zext_load_i32_by_i8_bswap_shl_8(ptr %arg) nounwind {
+; X86-LABEL: zext_load_i32_by_i8_bswap_shl_8:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movzbl 1(%eax), %ecx
+; X86-NEXT: shll $8, %ecx
+; X86-NEXT: movzbl (%eax), %eax
+; X86-NEXT: shll $16, %eax
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: zext_load_i32_by_i8_bswap_shl_8:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movzbl 1(%rdi), %ecx
-; CHECK64-NEXT: shll $8, %ecx
-; CHECK64-NEXT: movzbl (%rdi), %eax
-; CHECK64-NEXT: shll $16, %eax
-; CHECK64-NEXT: orl %ecx, %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: zext_load_i32_by_i8_bswap_shl_8:
+; X64: # %bb.0:
+; X64-NEXT: movzbl 1(%rdi), %ecx
+; X64-NEXT: shll $8, %ecx
+; X64-NEXT: movzbl (%rdi), %eax
+; X64-NEXT: shll $16, %eax
+; X64-NEXT: orl %ecx, %eax
+; X64-NEXT: retq
%tmp1 = getelementptr inbounds i8, ptr %arg, i32 1
%tmp2 = load i8, ptr %tmp1, align 1
%tmp3 = zext i8 %tmp2 to i32
@@ -1253,25 +1247,25 @@ define i32 @zext_load_i32_by_i8_bswap_shl_8(ptr %arg) {
; ptr p;
; ((i32) p[1] << 16) | ((i32) p[0] << 24)
-define i32 @zext_load_i32_by_i8_bswap_shl_16(ptr %arg) {
-; CHECK-LABEL: zext_load_i32_by_i8_bswap_shl_16:
-; CHECK: # %bb.0:
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movzbl 1(%eax), %ecx
-; CHECK-NEXT: shll $16, %ecx
-; CHECK-NEXT: movzbl (%eax), %eax
-; CHECK-NEXT: shll $24, %eax
-; CHECK-NEXT: orl %ecx, %eax
-; CHECK-NEXT: retl
+define i32 @zext_load_i32_by_i8_bswap_shl_16(ptr %arg) nounwind {
+; X86-LABEL: zext_load_i32_by_i8_bswap_shl_16:
+; X86: # %bb.0:
+; X86-NEXT: movl 4(%esp), %eax
+; X86-NEXT: movzbl 1(%eax), %ecx
+; X86-NEXT: shll $16, %ecx
+; X86-NEXT: movzbl (%eax), %eax
+; X86-NEXT: shll $24, %eax
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: retl
;
-; CHECK64-LABEL: zext_load_i32_by_i8_bswap_shl_16:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movzbl 1(%rdi), %ecx
-; CHECK64-NEXT: shll $16, %ecx
-; CHECK64-NEXT: movzbl (%rdi), %eax
-; CHECK64-NEXT: shll $24, %eax
-; CHECK64-NEXT: orl %ecx, %eax
-; CHECK64-NEXT: retq
+; X64-LABEL: zext_load_i32_by_i8_bswap_shl_16:
+; X64: # %bb.0:
+; X64-NEXT: movzbl 1(%rdi), %ecx
+; X64-NEXT: shll $16, %ecx
+; X64-NEXT: movzbl (%rdi), %eax
+; X64-NEXT: shll $24, %eax
+; X64-NEXT: orl %ecx, %eax
+; X64-NEXT: retq
%tmp1 = getelementptr inbounds i8, ptr %arg, i32 1
%tmp2 = load i8, ptr %tmp1, align 1
%tmp3 = zext i8 %tmp2 to i32
@@ -1284,25 +1278,25 @@ define i32 @zext_load_i32_by_i8_bswap_shl_16(ptr %arg) {
}
define i32 @pr80911_vector_load_multiuse(ptr %ptr, ptr %clobber) nounwind {
-; CHECK-LABEL: pr80911_vector_load_multiuse:
-; CHECK: # %bb.0:
-; CHECK-NEXT: pushl %esi
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
-; CHECK-NEXT: movl (%edx), %esi
-; CHECK-NEXT: movzwl (%edx), %eax
-; CHECK-NEXT: movl $0, (%ecx)
-; CHECK-NEXT: movl %esi, (%edx)
-; CHECK-NEXT: popl %esi
-; CHECK-NEXT: retl
+; X86-LABEL: pr80911_vector_load_multiuse:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl 12(%esp), %ecx
+; X86-NEXT: movl 8(%esp), %edx
+; X86-NEXT: movl (%edx), %esi
+; X86-NEXT: movzwl (%edx), %eax
+; X86-NEXT: movl $0, (%ecx)
+; X86-NEXT: movl %esi, (%edx)
+; X86-NEXT: popl %esi
+; X86-NEXT: retl
;
-; CHECK64-LABEL: pr80911_vector_load_multiuse:
-; CHECK64: # %bb.0:
-; CHECK64-NEXT: movl (%rdi), %ecx
-; CHECK64-NEXT: movzwl (%rdi), %eax
-; CHECK64-NEXT: movl $0, (%rsi)
-; CHECK64-NEXT: movl %ecx, (%rdi)
-; CHECK64-NEXT: retq
+; X64-LABEL: pr80911_vector_load_multiuse:
+; X64: # %bb.0:
+; X64-NEXT: movl (%rdi), %ecx
+; X64-NEXT: movzwl (%rdi), %eax
+; X64-NEXT: movl $0, (%rsi)
+; X64-NEXT: movl %ecx, (%rdi)
+; X64-NEXT: retq
%load = load <4 x i8>, ptr %ptr, align 16
store i32 0, ptr %clobber
store <4 x i8> %load, ptr %ptr, align 16
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