[llvm] a881896 - [AMDGPU][NFC] Compute prologue frame size/alignment in 64-bit (#224734)

[via llvm-commits]

Author: ahradwan2-public
Date: 2026-09-23T15:30:34+01:00
New Revision: a88189669034268827befe9bb65880a31e91778d

URL: https://github.com/llvm/llvm-project/commit/a88189669034268827befe9bb65880a31e91778d
DIFF: https://github.com/llvm/llvm-project/commit/a88189669034268827befe9bb65880a31e91778d.diff

LOG: [AMDGPU][NFC] Compute prologue frame size/alignment in 64-bit (#224734)

In `SIFrameLowering::emitPrologue` the stack-realignment sequence computes its
`S_AND` mask (`-Alignment * scale`), `S_ADD` offset (`(Alignment-1) * scale`)
and the final SP adjustment (`RoundedSize * scale`) from 32-bit locals; the
multiply is done in 32 bits, which CodeGen static analysis flags as a possible
truncation (`cpp/integer-multiplication-cast-to-long`). Widen `NumBytes`,
`RoundedSize` and Alignment to 64-bit. The `AsmPrinter` still truncates via
`printImmediate32`, so emitted asm is unchanged; only the raw MIR immediate of
the realign `S_AND_B32` changes (e.g. `4294443008 -> -524288`). The seven
autogenerated .mir frame tests are regenerated accordingly.

Assisted-by: Cline

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIFrameLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
index 92fb77b1e6436..364d8f07b6df2 100644
--- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
@@ -1443,8 +1443,8 @@ void SIFrameLowering::emitPrologue(MachineFunction &MF,
 
   bool HasFP = false;
   bool HasBP = false;
-  uint32_t NumBytes = MFI.getStackSize();
-  uint32_t RoundedSize = NumBytes;
+  int64_t NumBytes = MFI.getStackSize();
+  int64_t RoundedSize = NumBytes;
 
   // Functions that never return don't need to save and restore the FP or BP.
   const Function &F = MF.getFunction();