[clang] [llvm] [RISCV][P-ext] Add packed saturation intrinsics (PR #224432)

[via llvm-commits]

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@@ -2044,6 +2044,13 @@ def riscv_psshar : RVSDNode<"PSSHAR", SDT_RISCVPackedShift>;
 def riscv_psshl : RVSDNode<"PSSHL", SDT_RISCVPackedShift>;
 def riscv_psshlr : RVSDNode<"PSSHLR", SDT_RISCVPackedShift>;
 
+// Packed saturation to an immediate width.
+def SDT_RISCVPackedSaturation
+    : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0, 1>,
+                           SDTCisVT<2, XLenVT>]>;
+def riscv_psati  : RVSDNode<"PSATI", SDT_RISCVPackedSaturation>;
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sihuan wrote:

Done. The node's immediate is the number of trailing ones in the max value
rather than the instruction's width field, so the signed patterns keep IncImm;
it is folded into the new sati_widthN/usati_widthN leaves.

https://github.com/llvm/llvm-project/pull/224432