[llvm] [LLVM][CodeGen][AArch64] Implement expansion for fixed-length get.active.lane.mask. (PR #225459)

[Paul Walker via llvm-commits]

================
@@ -1737,6 +1743,47 @@ SDValue VectorLegalizer::ExpandVP_REM(SDNode *Node) {
   return DAG.getNode(ISD::SUB, DL, VT, Dividend, Mul);
 }
 
+SDValue VectorLegalizer::ExpandGET_ACTIVE_LANE_MASK(SDNode *N) {
+  SDLoc DL(N);
+
+  SDValue Start = N->getOperand(0);
+  SDValue End = N->getOperand(1);
----------------
paulwalker-arm wrote:

I'll create a PR to change the LangRef.

https://github.com/llvm/llvm-project/pull/225459