[llvm] 8022a98 - [RISCV] Don't process scalar instructions in VLOptimizer. NFC (#225656)

[via llvm-commits]

Author: Luke Lau
Date: 2026-09-23T10:18:50Z
New Revision: 8022a985db5ae48c64e7b35124ce77935fe99f03

URL: https://github.com/llvm/llvm-project/commit/8022a985db5ae48c64e7b35124ce77935fe99f03
DIFF: https://github.com/llvm/llvm-project/commit/8022a985db5ae48c64e7b35124ce77935fe99f03.diff

LOG: [RISCV] Don't process scalar instructions in VLOptimizer. NFC (#225656)

If an instruction doesn't define or use a vector register it won't
take part in the dataflow analysis. Skipping these improves compile
time. Measured to reduce geomean −0.379% instructions retired on
CTMark w/ a stage2 rva23u64 -O3 Clang build.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp b/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
index f63cddc0eee68..404e1fecafeda 100644
--- a/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
+++ b/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
@@ -95,6 +95,14 @@ class RISCVVLOptimizerImpl {
              RISCVRegisterInfo::isRVVRegClass(MRI->getRegClass(MO.getReg()));
     });
   }
+
+  /// \returns all vector virtual registers that \p MI defines.
+  auto virtual_vec_defs(const MachineInstr &MI) const {
+    return make_filter_range(MI.all_defs(), [this](const MachineOperand &MO) {
+      return MO.getReg().isVirtual() &&
+             RISCVRegisterInfo::isRVVRegClass(MRI->getRegClass(MO.getReg()));
+    });
+  }
 };
 
 class RISCVVLOptimizerLegacy : public MachineFunctionPass {
@@ -1402,13 +1410,17 @@ bool RISCVVLOptimizerImpl::run(MachineFunction &MF) {
 
   assert(DemandedVLs.empty());
 
-  // For each instruction that defines a vector, propagate the VL it
+  // For each instruction that defines or uses a vector, propagate the VL it
   // uses to its inputs.
   for (MachineBasicBlock *MBB : post_order(&MF)) {
     assert(MDT->isReachableFromEntry(MBB));
-    for (MachineInstr &MI : reverse(*MBB))
-      if (!MI.isDebugInstr())
-        Worklist.insert(&MI);
+    for (MachineInstr &MI : reverse(*MBB)) {
+      if (MI.isDebugInstr())
+        continue;
+      if (virtual_vec_defs(MI).empty() && virtual_vec_uses(MI).empty())
+        continue;
+      Worklist.insert(&MI);
+    }
   }
 
   while (!Worklist.empty()) {