[clang] [llvm] [RISCV] Add a command line option to disable register overlap for vector indexed load. (PR #224739)
Pengcheng Wang via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 22 21:55:31 PDT 2026
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@@ -5855,6 +5855,10 @@ def mzilsd_word_align : Flag<["-"], "mzilsd-word-align">, Group<m_Group>,
HelpText<"Allow Zilsd/Zclsd memory accesses to be 4-byte aligned (RISC-V only)">;
def mzilsd_strict_align : Flag<["-"], "mzilsd-strict-align">, Group<m_Group>,
HelpText<"Force all Zilsd/Zclsd memory accesses to be 8-byte aligned (RISC-V only)">;
+def mvector_index_load_overlap : Flag<["-"], "mvector-index-load-overlap">, Group<m_Group>,
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wangpc-pp wrote:
I am OK with that if both compilers reach a consensus.
https://github.com/llvm/llvm-project/pull/224739
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