[llvm] [AArch64][SelectionDAG] Avoid fold bitcast of scalar_to_vector to anyext in big-endian (PR #225442)

[via llvm-commits]

llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-selectiondag

Author: hstk30-hw

<details>
<summary>Changes</summary>

```
  int_vt (bitcast (vec_vt (scalar_to_vector elt_vt:x)))
    => int_vt (any_extend elt_vt:x)
```

This pattern not legal in big-endian, so disable in big-endian.

Fix https://github.com/llvm/llvm-project/issues/225436

---
Full diff: https://github.com/llvm/llvm-project/pull/225442.diff


2 Files Affected:

- (modified) llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (+2-1) 
- (added) llvm/test/CodeGen/AArch64/scalar_to_vector.ll (+33) 


``````````diff
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index ae9af86196c86..a0cc6f117b470 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -18317,7 +18317,8 @@ SDValue DAGCombiner::visitBITCAST(SDNode *N) {
 
   // int_vt (bitcast (vec_vt (scalar_to_vector elt_vt:x)))
   //   => int_vt (any_extend elt_vt:x)
-  if (N0.getOpcode() == ISD::SCALAR_TO_VECTOR && VT.isScalarInteger()) {
+  if (DAG.getDataLayout().isLittleEndian() &&
+      N0.getOpcode() == ISD::SCALAR_TO_VECTOR && VT.isScalarInteger()) {
     SDValue SrcScalar = N0.getOperand(0);
     if (SrcScalar.getValueType().isScalarInteger())
       return DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), VT, SrcScalar);
diff --git a/llvm/test/CodeGen/AArch64/scalar_to_vector.ll b/llvm/test/CodeGen/AArch64/scalar_to_vector.ll
new file mode 100644
index 0000000000000..89351638c010d
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/scalar_to_vector.ll
@@ -0,0 +1,33 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -global-isel=false -verify-machineinstrs -mtriple=aarch64 | FileCheck %s --check-prefix=LE
+; RUN: llc < %s -global-isel=false -verify-machineinstrs -mtriple=aarch64_be | FileCheck %s --check-prefix=BE
+
+declare void @use_i64(i64)
+
+define void @s2v_bitcast_be(i16 %x) {
+; LE-LABEL: s2v_bitcast_be:
+; LE:       // %bb.0:
+; LE-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
+; LE-NEXT:    .cfi_def_cfa_offset 16
+; LE-NEXT:    .cfi_offset w30, -16
+; LE-NEXT:    // kill: def $w0 killed $w0 def $x0
+; LE-NEXT:    bl use_i64
+; LE-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
+; LE-NEXT:    ret
+;
+; BE-LABEL: s2v_bitcast_be:
+; BE:       // %bb.0:
+; BE-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
+; BE-NEXT:    .cfi_def_cfa_offset 16
+; BE-NEXT:    .cfi_offset w30, -16
+; BE-NEXT:    fmov s0, w0
+; BE-NEXT:    rev64 v0.4h, v0.4h
+; BE-NEXT:    fmov x0, d0
+; BE-NEXT:    bl use_i64
+; BE-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
+; BE-NEXT:    ret
+    %v = insertelement <4 x i16> poison, i16 %x, i32 0
+    %c = bitcast <4 x i16> %v to i64
+    call void @use_i64(i64 %c)
+    ret void
+}

``````````

</details>


https://github.com/llvm/llvm-project/pull/225442