[llvm] bc6fd46 - [X86] sse2-intrinsics-x86-upgrade.ll - cleanup bitrotted check prefixes (#225426)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 22 08:46:46 PDT 2026
Author: Simon Pilgrim
Date: 2026-09-22T15:46:37Z
New Revision: bc6fd4611aa8383e8004e731211666fd14984181
URL: https://github.com/llvm/llvm-project/commit/bc6fd4611aa8383e8004e731211666fd14984181
DIFF: https://github.com/llvm/llvm-project/commit/bc6fd4611aa8383e8004e731211666fd14984181.diff
LOG: [X86] sse2-intrinsics-x86-upgrade.ll - cleanup bitrotted check prefixes (#225426)
Removed leftover SKX and AVX2 check prefixes - the update script only
removes unused check lines mentioned in the RUNs
Added:
Modified:
llvm/test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll b/llvm/test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll
index 6c94f82ac40d9..ff295d1a71439 100644
--- a/llvm/test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll
+++ b/llvm/test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll
@@ -899,14 +899,6 @@ define <16 x i8> @test_x86_sse2_paddus_b(<16 x i8> %a0, <16 x i8> %a1) {
; AVX512: ## %bb.0:
; AVX512-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xdc,0xc1]
; AVX512-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
-; AVX2-LABEL: test_x86_sse2_paddus_b:
-; AVX2: ## %bb.0:
-; AVX2-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdc,0xc1]
-; AVX2-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
-; SKX-LABEL: test_x86_sse2_paddus_b:
-; SKX: ## %bb.0:
-; SKX-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xdc,0xc1]
-; SKX-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
%res = call <16 x i8> @llvm.x86.sse2.paddus.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1]
ret <16 x i8> %res
}
@@ -928,14 +920,6 @@ define <8 x i16> @test_x86_sse2_paddus_w(<8 x i16> %a0, <8 x i16> %a1) {
; AVX512: ## %bb.0:
; AVX512-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xdd,0xc1]
; AVX512-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
-; AVX2-LABEL: test_x86_sse2_paddus_w:
-; AVX2: ## %bb.0:
-; AVX2-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdd,0xc1]
-; AVX2-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
-; SKX-LABEL: test_x86_sse2_paddus_w:
-; SKX: ## %bb.0:
-; SKX-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xdd,0xc1]
-; SKX-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
%res = call <8 x i16> @llvm.x86.sse2.paddus.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1]
ret <8 x i16> %res
}
@@ -999,14 +983,6 @@ define <16 x i8> @test_x86_sse2_psubus_b(<16 x i8> %a0, <16 x i8> %a1) {
; AVX512: ## %bb.0:
; AVX512-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd8,0xc1]
; AVX512-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
-; AVX2-LABEL: test_x86_sse2_psubus_b:
-; AVX2: ## %bb.0:
-; AVX2-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd8,0xc1]
-; AVX2-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
-; SKX-LABEL: test_x86_sse2_psubus_b:
-; SKX: ## %bb.0:
-; SKX-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd8,0xc1]
-; SKX-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
%res = call <16 x i8> @llvm.x86.sse2.psubus.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1]
ret <16 x i8> %res
}
@@ -1028,14 +1004,6 @@ define <8 x i16> @test_x86_sse2_psubus_w(<8 x i16> %a0, <8 x i16> %a1) {
; AVX512: ## %bb.0:
; AVX512-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd9,0xc1]
; AVX512-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
-; AVX2-LABEL: test_x86_sse2_psubus_w:
-; AVX2: ## %bb.0:
-; AVX2-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd9,0xc1]
-; AVX2-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
-; SKX-LABEL: test_x86_sse2_psubus_w:
-; SKX: ## %bb.0:
-; SKX-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd9,0xc1]
-; SKX-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
%res = call <8 x i16> @llvm.x86.sse2.psubus.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1]
ret <8 x i16> %res
}
More information about the llvm-commits
mailing list