[llvm] [GlobalISel] Add KnownFPClass printer pass (PR #225402)
Tim Gymnich via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 22 06:54:38 PDT 2026
https://github.com/tgymnich created https://github.com/llvm/llvm-project/pull/225402
Adds a dedicated print<gisel-value-tracking-fpclass> machine-function pass.
Most KnownFPClassTest.cpp cases are migrated to MIR tests. The remaining unit test covers a signaling-NaN-specific query that the printer cannot represent.
Assisted by: gpt-5.6-sol
>From d4d086df7a06221227fd08a7b45fb419cf8859be Mon Sep 17 00:00:00 2001
From: Tim Gymnich <tim at gymni.ch>
Date: Tue, 22 Sep 2026 15:37:54 +0200
Subject: [PATCH] [GlobalISel] Add KnownFPClass printer pass
Add a dedicated print<gisel-value-tracking-fpclass> machine-function pass and teach update_givaluetracking_test_checks.py to parse its output.
Move the existing KnownFPClass unit coverage to generated MIR tests, retaining the signaling-NaN query that the printer cannot represent. Add an updater regression for FP-class output.
Developed with AI assistance and reviewed and validated by the author.
---
.../CodeGen/GlobalISel/GISelValueTracking.h | 11 +
.../llvm/Passes/MachinePassRegistry.def | 5 +-
.../CodeGen/GlobalISel/GISelValueTracking.cpp | 40 +-
.../AArch64/GlobalISel/knownfpclass-basic.mir | 72 +
.../AArch64/GlobalISel/knownfpclass-ops.mir | 1273 +++++++++++
.../Inputs/fpclass-const.mir | 12 +
.../Inputs/fpclass-const.mir.expected | 13 +
.../CodeGen/GlobalISel/KnownFPClassTest.cpp | 1879 +----------------
.../update_givaluetracking_test_checks.py | 13 +-
9 files changed, 1432 insertions(+), 1886 deletions(-)
create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass-basic.mir
create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass-ops.mir
create mode 100644 llvm/test/tools/UpdateTestChecks/update_givaluetracking_test_checks/Inputs/fpclass-const.mir
create mode 100644 llvm/test/tools/UpdateTestChecks/update_givaluetracking_test_checks/Inputs/fpclass-const.mir.expected
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h b/llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h
index d8352ca2b2003..2e0ae1479ae96 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h
@@ -209,6 +209,17 @@ class GISelValueTrackingPrinterPass
LLVM_ABI PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
};
+
+class GISelValueTrackingFPClassPrinterPass
+ : public RequiredPassInfoMixin<GISelValueTrackingFPClassPrinterPass> {
+ raw_ostream &OS;
+
+public:
+ GISelValueTrackingFPClassPrinterPass(raw_ostream &OS) : OS(OS) {}
+
+ LLVM_ABI PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
} // namespace llvm
#endif // LLVM_CODEGEN_GLOBALISEL_GISELVALUETRACKING_H
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 7747bce185cbe..d27a4740e8e52 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -111,7 +111,10 @@ MACHINE_FUNCTION_PASS("postra-machine-sink", PostRAMachineSinkingPass())
MACHINE_FUNCTION_PASS("postmisched", PostMachineSchedulerPass(TM))
MACHINE_FUNCTION_PASS("post-ra-pseudos", ExpandPostRAPseudosPass())
MACHINE_FUNCTION_PASS("print", PrintMIRPass())
-MACHINE_FUNCTION_PASS("print<gisel-value-tracking>", GISelValueTrackingPrinterPass(errs()))
+MACHINE_FUNCTION_PASS("print<gisel-value-tracking-fpclass>",
+ GISelValueTrackingFPClassPrinterPass(errs()))
+MACHINE_FUNCTION_PASS("print<gisel-value-tracking>",
+ GISelValueTrackingPrinterPass(errs()))
MACHINE_FUNCTION_PASS("print<livedebugvars>", LiveDebugVariablesPrinterPass(errs()))
MACHINE_FUNCTION_PASS("print<live-intervals>", LiveIntervalsPrinterPass(errs()))
MACHINE_FUNCTION_PASS("print<live-stacks>", LiveStacksPrinterPass(errs()))
diff --git a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
index 95984afe36d3b..1a3bcd8e579ee 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
@@ -3002,9 +3002,10 @@ GISelValueTrackingAnalysis::run(MachineFunction &MF,
return Result(MF, MaxDepth);
}
-PreservedAnalyses
-GISelValueTrackingPrinterPass::run(MachineFunction &MF,
- MachineFunctionAnalysisManager &MFAM) {
+static PreservedAnalyses
+printGISelValueTracking(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM, raw_ostream &OS,
+ bool PrintFPClass) {
auto &VTA = MFAM.getResult<GISelValueTrackingAnalysis>(MF);
const auto &MRI = MF.getRegInfo();
OS << "name: ";
@@ -3019,13 +3020,36 @@ GISelValueTrackingPrinterPass::run(MachineFunction &MF,
Register Reg = MO.getReg();
if (!MRI.getType(Reg).isValid())
continue;
- KnownBits Known = VTA.getKnownBits(Reg);
- unsigned SignedBits = VTA.computeNumSignBits(Reg);
- bool IsKnownNeverZero = VTA.isKnownNeverZero(Reg);
- OS << " " << MO << " KnownBits:" << Known << " SignBits:" << SignedBits
- << " IsKnownNeverZero:" << IsKnownNeverZero << '\n';
+ if (PrintFPClass) {
+ KnownFPClass FPKnown = VTA.computeKnownFPClass(Reg);
+ OS << " " << MO << " FPClasses:" << FPKnown.getKnownFPClasses()
+ << " SignBitKnown:";
+ if (FPKnown.getSignBit())
+ OS << (*FPKnown.getSignBit() ? '1' : '0');
+ else
+ OS << '?';
+ OS << '\n';
+ } else {
+ KnownBits Known = VTA.getKnownBits(Reg);
+ unsigned SignedBits = VTA.computeNumSignBits(Reg);
+ bool IsKnownNeverZero = VTA.isKnownNeverZero(Reg);
+ OS << " " << MO << " KnownBits:" << Known
+ << " SignBits:" << SignedBits
+ << " IsKnownNeverZero:" << IsKnownNeverZero << '\n';
+ }
};
}
}
return PreservedAnalyses::all();
}
+
+PreservedAnalyses
+GISelValueTrackingPrinterPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ return printGISelValueTracking(MF, MFAM, OS, false);
+}
+
+PreservedAnalyses GISelValueTrackingFPClassPrinterPass::run(
+ MachineFunction &MF, MachineFunctionAnalysisManager &MFAM) {
+ return printGISelValueTracking(MF, MFAM, OS, true);
+}
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass-basic.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass-basic.mir
new file mode 100644
index 0000000000000..da0162cb84807
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass-basic.mir
@@ -0,0 +1,72 @@
+# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple aarch64 -passes="print<gisel-value-tracking-fpclass>" %s -filetype=null 2>&1 | FileCheck %s
+
+---
+name: FConstantPos
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FConstantPos
+ ; CHECK-NEXT: %0:_ FPClasses:(pnorm) SignBitKnown:0
+ %0:_(s32) = G_FCONSTANT float 1.0
+ $w0 = COPY %0(s32)
+...
+---
+name: FConstantNeg
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FConstantNeg
+ ; CHECK-NEXT: %0:_ FPClasses:(nnorm) SignBitKnown:1
+ %0:_(s32) = G_FCONSTANT float -1.0
+ $w0 = COPY %0(s32)
+...
+---
+name: FConstantPosZero
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FConstantPosZero
+ ; CHECK-NEXT: %0:_ FPClasses:(pzero) SignBitKnown:0
+ %0:_(s32) = G_FCONSTANT float 0.0
+ $w0 = COPY %0(s32)
+...
+---
+name: FConstantNegZero
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FConstantNegZero
+ ; CHECK-NEXT: %0:_ FPClasses:(nzero) SignBitKnown:1
+ %0:_(s32) = G_FCONSTANT float -0.0
+ $w0 = COPY %0(s32)
+...
+---
+name: FAbs
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FAbs
+ ; CHECK-NEXT: %0:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %1:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:0
+ %0:_(s32) = COPY $s0
+ %1:_(s32) = G_FABS %0
+ $s0 = COPY %1(s32)
+...
+---
+name: FNeg
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FNeg
+ ; CHECK-NEXT: %0:_ FPClasses:(pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %1:_ FPClasses:(nnorm) SignBitKnown:1
+ %0:_(s32) = G_FCONSTANT float 1.0
+ %1:_(s32) = G_FNEG %0
+ $s0 = COPY %1(s32)
+...
+---
+name: FSqrt
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FSqrt
+ ; CHECK-NEXT: %0:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %1:_ FPClasses:(nan pinf zero pnorm) SignBitKnown:?
+ %0:_(s32) = COPY $s0
+ %1:_(s32) = G_FSQRT %0
+ $s0 = COPY %1(s32)
+...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass-ops.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass-ops.mir
new file mode 100644
index 0000000000000..f0ab44d53a763
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass-ops.mir
@@ -0,0 +1,1273 @@
+# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple aarch64 -passes="print<gisel-value-tracking-fpclass>" %s -filetype=null 2>&1 | FileCheck %s
+
+---
+name: Undef
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @Undef
+ ; CHECK-NEXT: %def:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(all) SignBitKnown:?
+ %def:_(s32) = G_IMPLICIT_DEF
+ %copy:_(s32) = COPY %def
+...
+---
+name: ScalableFAbs
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @ScalableFAbs
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:0
+ %val:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF
+ %fabs:_(<vscale x 4 x s32>) = G_FABS %val
+ %copy:_(<vscale x 4 x s32>) = COPY %fabs
+...
+---
+name: CstVecNegZero
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @CstVecNegZero
+ ; CHECK-NEXT: %c0:_ FPClasses:(nzero) SignBitKnown:1
+ ; CHECK-NEXT: %c1:_ FPClasses:(nzero) SignBitKnown:1
+ ; CHECK-NEXT: %c2:_ FPClasses:(nzero) SignBitKnown:1
+ ; CHECK-NEXT: %vector:_ FPClasses:(nzero) SignBitKnown:1
+ ; CHECK-NEXT: %copy_vector:_ FPClasses:(nzero) SignBitKnown:1
+ %c0:_(s32) = G_FCONSTANT float -0.0
+ %c1:_(s32) = G_FCONSTANT float -0.0
+ %c2:_(s32) = G_FCONSTANT float -0.0
+ %vector:_(<3 x s32>) = G_BUILD_VECTOR %c0, %c1, %c2
+ %copy_vector:_(<3 x s32>) = COPY %vector
+...
+---
+name: CstZeroFPExt
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @CstZeroFPExt
+ ; CHECK-NEXT: %c0:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %ext:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pzero) SignBitKnown:0
+ %c0:_(s32) = G_FCONSTANT float 0.0
+ %ext:_(s64) = nnan ninf G_FPEXT %c0
+ %copy:_(s64) = COPY %ext
+...
+---
+name: CstVecZeroFPExt
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @CstVecZeroFPExt
+ ; CHECK-NEXT: %c0:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %c1:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %c2:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %vector:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %ext:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pzero) SignBitKnown:0
+ %c0:_(s32) = G_FCONSTANT float 0.0
+ %c1:_(s32) = G_FCONSTANT float 0.0
+ %c2:_(s32) = G_FCONSTANT float 0.0
+ %vector:_(<3 x s32>) = G_BUILD_VECTOR %c0, %c1, %c2
+ %ext:_(<3 x s64>) = nnan ninf G_FPEXT %vector
+ %copy:_(<3 x s64>) = COPY %ext
+...
+---
+name: CstZeroFPTrunc
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @CstZeroFPTrunc
+ ; CHECK-NEXT: %c0:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %trunc:_ FPClasses:(zero psub pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(zero psub pnorm) SignBitKnown:?
+ %c0:_(s64) = G_FCONSTANT double 0.0
+ %trunc:_(s32) = nnan ninf G_FPTRUNC %c0
+ %copy:_(s32) = COPY %trunc
+...
+---
+name: CstVecZeroFPTrunc
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @CstVecZeroFPTrunc
+ ; CHECK-NEXT: %c0:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %c1:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %c2:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %vector:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %trunc:_ FPClasses:(zero psub pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(zero psub pnorm) SignBitKnown:?
+ %c0:_(s64) = G_FCONSTANT double 0.0
+ %c1:_(s64) = G_FCONSTANT double 0.0
+ %c2:_(s64) = G_FCONSTANT double 0.0
+ %vector:_(<3 x s64>) = G_BUILD_VECTOR %c0, %c1, %c2
+ %trunc:_(<3 x s32>) = nnan ninf G_FPTRUNC %vector
+ %copy:_(<3 x s32>) = COPY %trunc
+...
+---
+name: SelectPos0
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @SelectPos0
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %cond:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %lhs:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %rhs:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %sel:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pzero) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
+ %lhs:_(s32) = G_FCONSTANT float 0.0
+ %rhs:_(s32) = G_FCONSTANT float 0.0
+ %sel:_(s32) = G_SELECT %cond, %lhs, %rhs
+ %copy:_(s32) = COPY %sel
+...
+---
+name: SelectNeg0
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @SelectNeg0
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %cond:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %lhs:_ FPClasses:(nzero) SignBitKnown:1
+ ; CHECK-NEXT: %rhs:_ FPClasses:(nzero) SignBitKnown:1
+ ; CHECK-NEXT: %sel:_ FPClasses:(nzero) SignBitKnown:1
+ ; CHECK-NEXT: %copy:_ FPClasses:(nzero) SignBitKnown:1
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
+ %lhs:_(s32) = G_FCONSTANT float -0.0
+ %rhs:_(s32) = G_FCONSTANT float -0.0
+ %sel:_(s32) = G_SELECT %cond, %lhs, %rhs
+ %copy:_(s32) = COPY %sel
+...
+---
+name: SelectPosOrNeg0
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @SelectPosOrNeg0
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %cond:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %lhs:_ FPClasses:(nzero) SignBitKnown:1
+ ; CHECK-NEXT: %rhs:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %sel:_ FPClasses:(zero) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(zero) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
+ %lhs:_(s32) = G_FCONSTANT float -0.0
+ %rhs:_(s32) = G_FCONSTANT float 0.0
+ %sel:_(s32) = G_SELECT %cond, %lhs, %rhs
+ %copy:_(s32) = COPY %sel
+...
+---
+name: SelectPosInf
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @SelectPosInf
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %cond:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %lhs:_ FPClasses:(pinf) SignBitKnown:0
+ ; CHECK-NEXT: %rhs:_ FPClasses:(pinf) SignBitKnown:0
+ ; CHECK-NEXT: %sel:_ FPClasses:(pinf) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pinf) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
+ %lhs:_(s32) = G_FCONSTANT float 0x7FF0000000000000
+ %rhs:_(s32) = G_FCONSTANT float 0x7FF0000000000000
+ %sel:_(s32) = G_SELECT %cond, %lhs, %rhs
+ %copy:_(s32) = COPY %sel
+...
+---
+name: SelectNegInf
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @SelectNegInf
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %cond:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %lhs:_ FPClasses:(ninf) SignBitKnown:1
+ ; CHECK-NEXT: %rhs:_ FPClasses:(ninf) SignBitKnown:1
+ ; CHECK-NEXT: %sel:_ FPClasses:(ninf) SignBitKnown:1
+ ; CHECK-NEXT: %copy:_ FPClasses:(ninf) SignBitKnown:1
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
+ %lhs:_(s32) = G_FCONSTANT float 0xFFF0000000000000
+ %rhs:_(s32) = G_FCONSTANT float 0xFFF0000000000000
+ %sel:_(s32) = G_SELECT %cond, %lhs, %rhs
+ %copy:_(s32) = COPY %sel
+...
+---
+name: SelectPosOrNegInf
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @SelectPosOrNegInf
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %cond:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %lhs:_ FPClasses:(pinf) SignBitKnown:0
+ ; CHECK-NEXT: %rhs:_ FPClasses:(ninf) SignBitKnown:1
+ ; CHECK-NEXT: %sel:_ FPClasses:(inf) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(inf) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
+ %lhs:_(s32) = G_FCONSTANT float 0x7FF0000000000000
+ %rhs:_(s32) = G_FCONSTANT float 0xFFF0000000000000
+ %sel:_(s32) = G_SELECT %cond, %lhs, %rhs
+ %copy:_(s32) = COPY %sel
+...
+---
+name: SelectNNaN
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @SelectNNaN
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %cond:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %lhs:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %rhs:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %sel:_ FPClasses:(inf zero sub norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(inf zero sub norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
+ %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %rhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %sel:_(s32) = nnan G_SELECT %cond, %lhs, %rhs
+ %copy:_(s32) = COPY %sel
+...
+---
+name: SelectNInf
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @SelectNInf
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %cond:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %lhs:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %rhs:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %sel:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
+ %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %rhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %sel:_(s32) = ninf G_SELECT %cond, %lhs, %rhs
+ %copy:_(s32) = COPY %sel
+...
+---
+name: SelectNNaNNInf
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @SelectNNaNNInf
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %cond:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %lhs:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %rhs:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %sel:_ FPClasses:(zero sub norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(zero sub norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
+ %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %rhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %sel:_(s32) = nnan ninf G_SELECT %cond, %lhs, %rhs
+ %copy:_(s32) = COPY %sel
+...
+---
+name: FNegNInf
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FNegNInf
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fneg:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fneg:_(s32) = ninf G_FNEG %val
+ %copy:_(s32) = COPY %fneg
+...
+---
+name: FabsUnknown
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FabsUnknown
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = G_FABS %val
+ %copy:_(s32) = COPY %fabs
+...
+---
+name: VecFabsUnknown
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @VecFabsUnknown
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(<3 x s32>) = G_LOAD %ptr(p0) :: (load (<3 x s32>))
+ %fabs:_(<3 x s32>) = G_FABS %val
+ %copy:_(<3 x s32>) = COPY %fabs
+...
+---
+name: FnegFabs
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FnegFabs
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fneg:_ FPClasses:(nan ninf nzero nsub nnorm) SignBitKnown:1
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan ninf nzero nsub nnorm) SignBitKnown:1
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = G_FABS %val
+ %fneg:_(s32) = G_FNEG %fabs
+ %copy:_(s32) = COPY %fneg
+...
+---
+name: FnegFabsNInf
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FnegFabsNInf
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(nan pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fneg:_ FPClasses:(nan nzero nsub nnorm) SignBitKnown:1
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan nzero nsub nnorm) SignBitKnown:1
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = ninf G_FABS %val
+ %fneg:_(s32) = G_FNEG %fabs
+ %copy:_(s32) = COPY %fneg
+...
+---
+name: FnegFabsNNan
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FnegFabsNNan
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(pinf pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fneg:_ FPClasses:(ninf nzero nsub nnorm) SignBitKnown:1
+ ; CHECK-NEXT: %copy:_ FPClasses:(ninf nzero nsub nnorm) SignBitKnown:1
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = nnan G_FABS %val
+ %fneg:_(s32) = G_FNEG %fabs
+ %copy:_(s32) = COPY %fneg
+...
+---
+name: CopySignNNanSrc0
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @CopySignNNanSrc0
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %mag:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %sgn:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(pinf pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fcopysign:_ FPClasses:(inf zero sub norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(inf zero sub norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %mag:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %sgn:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = nnan G_FABS %mag
+ %fcopysign:_(s32) = G_FCOPYSIGN %fabs, %sgn
+ %copy:_(s32) = COPY %fcopysign
+...
+---
+name: CopySignNInfSrc0_NegSign
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @CopySignNInfSrc0_NegSign
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %mag:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %sgn:_ FPClasses:(nnorm) SignBitKnown:1
+ ; CHECK-NEXT: %flog:_ FPClasses:(nan pzero norm) SignBitKnown:?
+ ; CHECK-NEXT: %fcopysign:_ FPClasses:(nan nzero nnorm) SignBitKnown:1
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan nzero nnorm) SignBitKnown:1
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %mag:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %sgn:_(s32) = G_FCONSTANT float -1.0
+ %flog:_(s32) = ninf G_FLOG %mag
+ %fcopysign:_(s32) = G_FCOPYSIGN %flog, %sgn
+ %copy:_(s32) = COPY %fcopysign
+...
+---
+name: CopySignNInfSrc0_PosSign
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @CopySignNInfSrc0_PosSign
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %mag:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %sgn:_ FPClasses:(pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fsqrt:_ FPClasses:(nan zero pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %fcopysign:_ FPClasses:(nan pzero pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan pzero pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %mag:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %sgn:_(s32) = G_FCONSTANT float 1.0
+ %fsqrt:_(s32) = ninf G_FSQRT %mag
+ %fcopysign:_(s32) = G_FCOPYSIGN %fsqrt, %sgn
+ %copy:_(s32) = COPY %fcopysign
+...
+---
+name: UIToFP
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @UIToFP
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %cast:_ FPClasses:(pzero pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pzero pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %cast:_(s32) = G_UITOFP %val
+ %copy:_(s32) = COPY %cast
+...
+---
+name: SIToFP
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @SIToFP
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %cast:_ FPClasses:(pzero norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(pzero norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %cast:_(s32) = G_SITOFP %val
+ %copy:_(s32) = COPY %cast
+...
+---
+name: FAdd
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FAdd
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %lhs:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %rhs:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fadd:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(all) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %rhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fadd:_(s32) = G_FADD %lhs, %rhs
+ %copy:_(s32) = COPY %fadd
+...
+---
+name: FAdd_Zero
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FAdd_Zero
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %lhs:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %rhs:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %fadd:_ FPClasses:(nan inf pzero sub norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan inf pzero sub norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %rhs:_(s32) = G_FCONSTANT float 0.0
+ %fadd:_(s32) = G_FADD %lhs, %rhs
+ %copy:_(s32) = COPY %fadd
+...
+---
+name: FAdd_NegZero
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FAdd_NegZero
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %lhs:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %rhs:_ FPClasses:(nzero) SignBitKnown:1
+ ; CHECK-NEXT: %fadd:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(all) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %rhs:_(s32) = G_FCONSTANT float -0.0
+ %fadd:_(s32) = G_FADD %lhs, %rhs
+ %copy:_(s32) = COPY %fadd
+...
+---
+name: FstrictAdd_Zero
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FstrictAdd_Zero
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %lhs:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %rhs:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %fadd:_ FPClasses:(nan inf pzero sub norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan inf pzero sub norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %rhs:_(s32) = G_FCONSTANT float 0.0
+ %fadd:_(s32) = G_STRICT_FADD %lhs, %rhs
+ %copy:_(s32) = COPY %fadd
+...
+---
+name: FMul
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FMul
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %load:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fmul:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %val:_(s32) = G_FREEZE %load
+ %fmul:_(s32) = G_FMUL %val, %val
+ %copy:_(s32) = COPY %fmul
+...
+---
+name: FMulZero
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FMulZero
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %lhs:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %rhs:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %fabs:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fmul:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pzero) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %rhs:_(s32) = G_FCONSTANT float 0.0
+ %fabs:_(s32) = nnan ninf G_FABS %lhs
+ %fmul:_(s32) = G_FMUL %fabs, %rhs
+ %copy:_(s32) = COPY %fmul
+...
+---
+name: FLog
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FLog
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %flog:_ FPClasses:(nan inf pzero norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan inf pzero norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %flog:_(s32) = G_FLOG %val
+ %copy:_(s32) = COPY %flog
+...
+---
+name: FLogNeg
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FLogNeg
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fneg:_ FPClasses:(nzero nsub nnorm) SignBitKnown:1
+ ; CHECK-NEXT: %flog:_ FPClasses:(qnan ninf pzero norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(qnan ninf pzero norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = nnan ninf G_FABS %val
+ %fneg:_(s32) = nnan ninf G_FNEG %fabs
+ %flog:_(s32) = G_FLOG %fneg
+ %copy:_(s32) = COPY %flog
+...
+---
+name: FLogPosZero
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FLogPosZero
+ ; CHECK-NEXT: %val:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %flog:_ FPClasses:(ninf pzero norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(ninf pzero norm) SignBitKnown:?
+ %val:_(s32) = G_FCONSTANT float 0.0
+ %flog:_(s32) = G_FLOG %val
+ %copy:_(s32) = COPY %flog
+...
+---
+name: FLogNegZero
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FLogNegZero
+ ; CHECK-NEXT: %val:_ FPClasses:(nzero) SignBitKnown:1
+ ; CHECK-NEXT: %flog:_ FPClasses:(ninf pzero norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(ninf pzero norm) SignBitKnown:?
+ %val:_(s32) = G_FCONSTANT float -0.0
+ %flog:_(s32) = G_FLOG %val
+ %copy:_(s32) = COPY %flog
+...
+---
+name: CopyFabs
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @CopyFabs
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy0:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy1:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = G_FABS %val
+ %copy0:_(s32) = COPY %fabs
+ %copy1:_(s32) = COPY %copy0
+...
+---
+name: SelectIsFPClassZero
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @SelectIsFPClassZero
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %lhs:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %rhs:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %cond:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %sel:_ FPClasses:(zero) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(zero) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %rhs:_(s32) = G_FCONSTANT float 0.0
+ %cond:_(s1) = G_IS_FPCLASS %lhs, 96
+ %sel:_(s32) = G_SELECT %cond, %lhs, %rhs
+ %copy:_(s32) = COPY %sel
+...
+---
+name: FLDExp
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FLDExp
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %exp:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fldexp:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %exp:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = G_FABS %val
+ %fldexp:_(s32) = G_FLDEXP %fabs, %exp
+ %copy:_(s32) = COPY %fldexp
+...
+---
+name: FPowPos
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FPowPos
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %exp:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fpow:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %exp:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = G_FABS %val
+ %fpow:_(s32) = G_FPOW %fabs, %exp
+ %copy:_(s32) = COPY %fpow
+...
+---
+name: FPowPosNNaN
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FPowPosNNaN
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %exp:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(pinf pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fabs_exp:_ FPClasses:(pinf pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fpow:_ FPClasses:(pinf pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pinf pzero psub pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %exp:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = nnan G_FABS %val
+ %fabs_exp:_(s32) = nnan G_FABS %exp
+ %fpow:_(s32) = G_FPOW %fabs, %fabs_exp
+ %copy:_(s32) = COPY %fpow
+...
+---
+name: FPowIEvenExp
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FPowIEvenExp
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %pwr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fpowi:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan pinf pzero psub pnorm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %pwr:_(s32) = G_CONSTANT i32 2
+ %fpowi:_(s32) = G_FPOWI %val, %pwr
+ %copy:_(s32) = COPY %fpowi
+...
+---
+name: FPowIPos
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FPowIPos
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %pwr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fpowi:_ FPClasses:(pinf pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pinf pzero psub pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %pwr:_(s32) = G_CONSTANT i32 3
+ %fabs:_(s32) = nnan ninf G_FABS %val
+ %fpowi:_(s32) = G_FPOWI %fabs, %pwr
+ %copy:_(s32) = COPY %fpowi
+...
+---
+# powi(finite, 1): ninf G_FNEG rules out inf; exp=1 preserves.
+name: FPowIFinitePow1
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FPowIFinitePow1
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %load:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %finite:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ ; CHECK-NEXT: %one:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fpowi:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %val:_(s32) = G_FREEZE %load
+ %finite:_(s32) = ninf G_FNEG %val
+ %one:_(s32) = G_CONSTANT i32 1
+ %fpowi:_(s32) = G_FPOWI %finite, %one
+ %copy:_(s32) = COPY %fpowi
+...
+---
+# powi(normal, -1): 1/2.0 = 0.5, a positive finite value.
+name: FPowINormalPowNegOne
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FPowINormalPowNegOne
+ ; CHECK-NEXT: %normal:_ FPClasses:(pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %negone:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fpowi:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ %normal:_(s32) = G_FCONSTANT float 2.0
+ %negone:_(s32) = G_CONSTANT i32 -1
+ %fpowi:_(s32) = G_FPOWI %normal, %negone
+ %copy:_(s32) = COPY %fpowi
+...
+---
+name: FPowIZeroOrNaNNonnegativeExponent
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FPowIZeroOrNaNNonnegativeExponent
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %load:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %x:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %zero_or_nan:_ FPClasses:(nan zero) SignBitKnown:?
+ ; CHECK-NEXT: %nonneg_mask:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %nonneg:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fpowi:_ FPClasses:(nan zero psub pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan zero psub pnorm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %val:_(s32) = G_FREEZE %load
+ %x:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %zero_or_nan:_(s32) = G_FREM %val, %val
+ %nonneg_mask:_(s32) = G_CONSTANT i32 2147483647
+ %nonneg:_(s32) = G_AND %x, %nonneg_mask
+ %fpowi:_(s32) = G_FPOWI %zero_or_nan, %nonneg
+ %copy:_(s32) = COPY %fpowi
+...
+---
+name: FDiv
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FDiv
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %load:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fdiv:_ FPClasses:(nan pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan pnorm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %val:_(s32) = G_FREEZE %load
+ %fdiv:_(s32) = G_FDIV %val, %val
+ %copy:_(s32) = COPY %fdiv
+...
+---
+name: FDivInf
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FDivInf
+ ; CHECK-NEXT: %lhs:_ FPClasses:(pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %rhs:_ FPClasses:(pzero) SignBitKnown:0
+ ; CHECK-NEXT: %fdiv:_ FPClasses:(pinf) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pinf) SignBitKnown:0
+ %lhs:_(s32) = G_FCONSTANT float 1.0
+ %rhs:_(s32) = G_FCONSTANT float 0.0
+ %fdiv:_(s32) = G_FDIV %lhs, %rhs
+ %copy:_(s32) = COPY %fdiv
+...
+---
+name: FDivSqrt
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FDivSqrt
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %x:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %sqrt:_ FPClasses:(nan pinf zero pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %one:_ FPClasses:(pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fdiv:_ FPClasses:(nan inf zero psub pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan inf zero psub pnorm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %x:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %sqrt:_(s32) = G_FSQRT %x
+ %one:_(s32) = G_FCONSTANT float 1.0
+ %fdiv:_(s32) = G_FDIV %one, %sqrt
+ %copy:_(s32) = COPY %fdiv
+...
+---
+name: FDivNegSqrtNeg
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FDivNegSqrtNeg
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %x:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %neg_x:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %sqrt:_ FPClasses:(nan pinf zero pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %neg_one:_ FPClasses:(nnorm) SignBitKnown:1
+ ; CHECK-NEXT: %fdiv:_ FPClasses:(nan inf zero nsub nnorm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan inf zero nsub nnorm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %x:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %neg_x:_(s32) = G_FNEG %x
+ %sqrt:_(s32) = G_FSQRT %neg_x
+ %neg_one:_(s32) = G_FCONSTANT float -1.0
+ %fdiv:_(s32) = G_FDIV %neg_one, %sqrt
+ %copy:_(s32) = COPY %fdiv
+...
+---
+name: SqrtFDiv
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @SqrtFDiv
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %x:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %one:_ FPClasses:(pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %inv:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %sqrt:_ FPClasses:(nan pinf zero pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan pinf zero pnorm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %x:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %one:_(s32) = G_FCONSTANT float 1.0
+ %inv:_(s32) = G_FDIV %one, %x
+ %sqrt:_(s32) = G_FSQRT %inv
+ %copy:_(s32) = COPY %sqrt
+...
+---
+name: FRem
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FRem
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %load:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %frem:_ FPClasses:(nan zero) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan zero) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %val:_(s32) = G_FREEZE %load
+ %frem:_(s32) = G_FREM %val, %val
+ %copy:_(s32) = COPY %frem
+...
+---
+name: FRemSelfKnownFiniteNonZero
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FRemSelfKnownFiniteNonZero
+ ; CHECK-NEXT: %val:_ FPClasses:(pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %frem:_ FPClasses:(zero) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(zero) SignBitKnown:?
+ %val:_(s32) = G_FCONSTANT float 2.0
+ %frem:_(s32) = G_FREM %val, %val
+ %copy:_(s32) = COPY %frem
+...
+---
+name: ShuffleVec
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @ShuffleVec
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %vec:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %def:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %shuf:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %vec:_(<4 x s32>) = G_LOAD %ptr(p0) :: (load (<4 x s32>))
+ %fabs:_(<4 x s32>) = nnan ninf G_FABS %vec
+ %def:_(<4 x s32>) = G_IMPLICIT_DEF
+ %shuf:_(<4 x s32>) = G_SHUFFLE_VECTOR %fabs(<4 x s32>), %def, shufflemask(0, 0, 0, 0)
+ %copy:_(<4 x s32>) = COPY %shuf
+...
+---
+name: BuildVec
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @BuildVec
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val1:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %val2:_ FPClasses:(pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %vec:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val1:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = nnan ninf G_FABS %val1
+ %val2:_(s32) = G_FCONSTANT float 3.0
+ %vec:_(<2 x s32>) = G_BUILD_VECTOR %fabs, %val2
+ %copy:_(<2 x s32>) = COPY %vec
+...
+---
+name: ConcatVec
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @ConcatVec
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %vec1:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %c1:_ FPClasses:(pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %c2:_ FPClasses:(pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %vec2:_ FPClasses:(pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fabs1:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fabs2:_ FPClasses:(pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %cat:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %vec1:_(<2 x s32>) = G_LOAD %ptr(p0) :: (load (<2 x s32>))
+ %c1:_(s32) = G_FCONSTANT float 1.0
+ %c2:_(s32) = G_FCONSTANT float 2.0
+ %vec2:_(<2 x s32>) = G_BUILD_VECTOR %c1, %c2
+ %fabs1:_(<2 x s32>) = nnan ninf G_FABS %vec1
+ %fabs2:_(<2 x s32>) = nnan ninf G_FABS %vec2
+ %cat:_(<4 x s32>) = G_CONCAT_VECTORS %fabs1, %fabs2
+ %copy:_(<4 x s32>) = COPY %cat
+...
+---
+name: VecExtractElem
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @VecExtractElem
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %vec:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %idx:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %extract:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %vec:_(<4 x s32>) = G_LOAD %ptr(p0) :: (load (<4 x s32>))
+ %fabs:_(<4 x s32>) = nnan ninf G_FABS %vec
+ %idx:_(s64) = G_CONSTANT i64 1
+ %extract:_(s32) = G_EXTRACT_VECTOR_ELT %fabs, %idx
+ %copy:_(s32) = COPY %extract
+...
+---
+name: VecInsertElem
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @VecInsertElem
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %vec:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs1:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %elem:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs2:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %idx:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %insert:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %vec:_(<4 x s32>) = G_LOAD %ptr(p0) :: (load (<4 x s32>))
+ %fabs1:_(<4 x s32>) = nnan ninf G_FABS %vec
+ %elem:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs2:_(s32) = nnan ninf G_FABS %elem
+ %idx:_(s64) = G_CONSTANT i64 1
+ %insert:_(<4 x s32>) = G_INSERT_VECTOR_ELT %fabs1, %fabs2, %idx
+ %copy:_(<4 x s32>) = COPY %insert
+...
+---
+name: FSinh
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FSinh
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fsinh:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(all) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fsinh:_(s32) = G_FSINH %val
+ %copy:_(s32) = COPY %fsinh
+...
+---
+name: FSinhPos
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FSinhPos
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fsinh:_ FPClasses:(pinf pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pinf pzero psub pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = nnan ninf G_FABS %val
+ %fsinh:_(s32) = G_FSINH %fabs
+ %copy:_(s32) = COPY %fsinh
+...
+---
+name: FCosh
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FCosh
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fcosh:_ FPClasses:(nan pinf pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan pinf pnorm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fcosh:_(s32) = G_FCOSH %val
+ %copy:_(s32) = COPY %fcosh
+...
+---
+name: FCoshNNaN
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FCoshNNaN
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(pinf pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fcosh:_ FPClasses:(pinf pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pinf pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = nnan G_FABS %val
+ %fcosh:_(s32) = G_FCOSH %fabs
+ %copy:_(s32) = COPY %fcosh
+...
+---
+name: FTanh
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FTanh
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %ftanh:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %ftanh:_(s32) = G_FTANH %val
+ %copy:_(s32) = COPY %ftanh
+...
+---
+name: FTanhPos
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FTanhPos
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %ftanh:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = nnan ninf G_FABS %val
+ %ftanh:_(s32) = G_FTANH %fabs
+ %copy:_(s32) = COPY %ftanh
+...
+---
+name: FAsin
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FAsin
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fasin:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fasin:_(s32) = G_FASIN %val
+ %copy:_(s32) = COPY %fasin
+...
+---
+name: FAsinPos
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FAsinPos
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fasin:_ FPClasses:(qnan pzero psub pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(qnan pzero psub pnorm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = nnan ninf G_FABS %val
+ %fasin:_(s32) = G_FASIN %fabs
+ %copy:_(s32) = COPY %fasin
+...
+---
+name: FAcos
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FAcos
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %facos:_ FPClasses:(nan pzero pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan pzero pnorm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %facos:_(s32) = G_FACOS %val
+ %copy:_(s32) = COPY %facos
+...
+---
+name: FAcosPos
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FAcosPos
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %facos:_ FPClasses:(qnan pzero pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(qnan pzero pnorm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = nnan ninf G_FABS %val
+ %facos:_(s32) = G_FACOS %fabs
+ %copy:_(s32) = COPY %facos
+...
+---
+name: FAtan
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FAtan
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fatan:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fatan:_(s32) = G_FATAN %val
+ %copy:_(s32) = COPY %fatan
+...
+---
+name: FAtanPos
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FAtanPos
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fatan:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = nnan ninf G_FABS %val
+ %fatan:_(s32) = G_FATAN %fabs
+ %copy:_(s32) = COPY %fatan
+...
+---
+name: FTan
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FTan
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %ftan:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %ftan:_(s32) = G_FTAN %val
+ %copy:_(s32) = COPY %ftan
+...
+---
+name: FTanNNaN
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FTanNNaN
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %ftan:_ FPClasses:(zero sub norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(zero sub norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = nnan ninf G_FABS %val
+ %ftan:_(s32) = G_FTAN %fabs
+ %copy:_(s32) = COPY %ftan
+...
+---
+name: FAtan2
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FAtan2
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %y:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %x:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fatan2:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %y:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %x:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fatan2:_(s32) = G_FATAN2 %y, %x
+ %copy:_(s32) = COPY %fatan2
+...
+---
+name: FAtan2NNaN
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FAtan2NNaN
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %y:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %x:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %fabs_y:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fabs_x:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fatan2:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %copy:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %y:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %x:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs_y:_(s32) = nnan ninf G_FABS %y
+ %fabs_x:_(s32) = nnan ninf G_FABS %x
+ %fatan2:_(s32) = G_FATAN2 %fabs_y, %fabs_x
+ %copy:_(s32) = COPY %fatan2
+...
+---
+name: FMulAbsULEOne
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FMulAbsULEOne
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %x:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %floor:_ FPClasses:(nan inf zero norm) SignBitKnown:?
+ ; CHECK-NEXT: %fract:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %finite:_ FPClasses:(pzero psub pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fmul:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan zero sub norm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %x:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %floor:_(s32) = G_FFLOOR %x
+ %fract:_(s32) = G_FSUB %x, %floor
+ %finite:_(s32) = nnan ninf G_FABS %val
+ %fmul:_(s32) = G_FMUL %finite, %fract
+ %copy:_(s32) = COPY %fmul
+...
+---
+name: FMASelfSquare
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @FMASelfSquare
+ ; CHECK-NEXT: %ptr:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %load:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %val:_ FPClasses:(all) SignBitKnown:?
+ ; CHECK-NEXT: %c:_ FPClasses:(pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %fma:_ FPClasses:(nan pinf pnorm) SignBitKnown:?
+ ; CHECK-NEXT: %copy:_ FPClasses:(nan pinf pnorm) SignBitKnown:?
+ %ptr:_(p0) = G_IMPLICIT_DEF
+ %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %val:_(s32) = G_FREEZE %load
+ %c:_(s32) = G_FCONSTANT float 1.0
+ %fma:_(s32) = G_FMA %val, %val, %c
+ %copy:_(s32) = COPY %fma
+...
diff --git a/llvm/test/tools/UpdateTestChecks/update_givaluetracking_test_checks/Inputs/fpclass-const.mir b/llvm/test/tools/UpdateTestChecks/update_givaluetracking_test_checks/Inputs/fpclass-const.mir
new file mode 100644
index 0000000000000..018cb2231e768
--- /dev/null
+++ b/llvm/test/tools/UpdateTestChecks/update_givaluetracking_test_checks/Inputs/fpclass-const.mir
@@ -0,0 +1,12 @@
+# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple aarch64 -passes="print<gisel-value-tracking-fpclass>" %s -filetype=null 2>&1 | FileCheck %s
+
+---
+name: Cst
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @Cst
+ ; CHECK-NEXT: %0:_ FPClasses:(all) SignBitKnown:?
+ %0:_(s32) = G_FCONSTANT float 1.0
+ %1:_(s32) = COPY %0
+...
diff --git a/llvm/test/tools/UpdateTestChecks/update_givaluetracking_test_checks/Inputs/fpclass-const.mir.expected b/llvm/test/tools/UpdateTestChecks/update_givaluetracking_test_checks/Inputs/fpclass-const.mir.expected
new file mode 100644
index 0000000000000..188861ab81d49
--- /dev/null
+++ b/llvm/test/tools/UpdateTestChecks/update_givaluetracking_test_checks/Inputs/fpclass-const.mir.expected
@@ -0,0 +1,13 @@
+# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple aarch64 -passes="print<gisel-value-tracking-fpclass>" %s -filetype=null 2>&1 | FileCheck %s
+
+---
+name: Cst
+body: |
+ bb.1:
+ ; CHECK-LABEL: name: @Cst
+ ; CHECK-NEXT: %0:_ FPClasses:(pnorm) SignBitKnown:0
+ ; CHECK-NEXT: %1:_ FPClasses:(pnorm) SignBitKnown:0
+ %0:_(s32) = G_FCONSTANT float 1.0
+ %1:_(s32) = COPY %0
+...
diff --git a/llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp b/llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
index 6cdb01f0f7912..57656a91ddcd3 100644
--- a/llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
@@ -7,1893 +7,30 @@
//===----------------------------------------------------------------------===//
#include "GISelMITest.h"
-#include "llvm/ADT/FloatingPointMode.h"
#include "llvm/CodeGen/GlobalISel/GISelValueTracking.h"
-#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "gtest/gtest.h"
-#include <optional>
-TEST_F(AArch64GISelMITest, TestFPClassCstPosZero) {
- StringRef MIRString = " %3:_(s32) = G_FCONSTANT float 0.0\n"
- " %4:_(s32) = COPY %3\n";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- unsigned CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPosZero, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassCstNegZero) {
- StringRef MIRString = " %3:_(s32) = G_FCONSTANT float -0.0\n"
- " %4:_(s32) = COPY %3\n";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcNegZero, Known.getKnownFPClasses());
- EXPECT_EQ(true, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassUndef) {
- StringRef MIRString = R"(
- %def:_(s32) = G_IMPLICIT_DEF
- %copy_def:_(s32) = COPY %def
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcAllFlags, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassCstVecNegZero) {
- StringRef MIRString = R"(
- %c0:_(s32) = G_FCONSTANT float -0.0
- %c1:_(s32) = G_FCONSTANT float -0.0
- %c2:_(s32) = G_FCONSTANT float -0.0
- %vector:_(<3 x s32>) = G_BUILD_VECTOR %c0, %c1, %c2
- %copy_vector:_(<3 x s32>) = COPY %vector
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcNegZero, Known.getKnownFPClasses());
- EXPECT_EQ(true, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassCstZeroFPExt) {
- StringRef MIRString = R"(
- %c0:_(s32) = G_FCONSTANT float 0.0
- %ext:_(s64) = nnan ninf G_FPEXT %c0
- %copy_vector:_(s64) = COPY %ext
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPosZero, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassCstVecZeroFPExt) {
- StringRef MIRString = R"(
- %c0:_(s32) = G_FCONSTANT float 0.0
- %c1:_(s32) = G_FCONSTANT float 0.0
- %c2:_(s32) = G_FCONSTANT float 0.0
- %vector:_(<3 x s32>) = G_BUILD_VECTOR %c0, %c1, %c2
- %ext:_(<3 x s64>) = nnan ninf G_FPEXT %vector
- %copy_vector:_(<3 x s64>) = COPY %ext
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPosZero, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassCstZeroFPTrunc) {
- StringRef MIRString = R"(
- %c0:_(s64) = G_FCONSTANT double 0.0
- %trunc:_(s32) = nnan ninf G_FPTRUNC %c0
- %copy_vector:_(s32) = COPY %trunc
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPosFinite | fcNegZero, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassCstVecZeroFPTrunc) {
- StringRef MIRString = R"(
- %c0:_(s64) = G_FCONSTANT double 0.0
- %c1:_(s64) = G_FCONSTANT double 0.0
- %c2:_(s64) = G_FCONSTANT double 0.0
- %vector:_(<3 x s64>) = G_BUILD_VECTOR %c0, %c1, %c2
- %trunc:_(<3 x s32>) = nnan ninf G_FPTRUNC %vector
- %copy_vector:_(<3 x s32>) = COPY %trunc
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPosFinite | fcNegZero, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassSelectPos0) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
- %lhs:_(s32) = G_FCONSTANT float 0.0
- %rhs:_(s32) = G_FCONSTANT float 0.0
- %sel:_(s32) = G_SELECT %cond, %lhs, %rhs
- %copy_sel:_(s32) = COPY %sel
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPosZero, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassSelectNeg0) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
- %lhs:_(s32) = G_FCONSTANT float -0.0
- %rhs:_(s32) = G_FCONSTANT float -0.0
- %sel:_(s32) = G_SELECT %cond, %lhs, %rhs
- %copy_sel:_(s32) = COPY %sel
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcNegZero, Known.getKnownFPClasses());
- EXPECT_EQ(true, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassSelectPosOrNeg0) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
- %lhs:_(s32) = G_FCONSTANT float -0.0
- %rhs:_(s32) = G_FCONSTANT float 0.0
- %sel:_(s32) = G_SELECT %cond, %lhs, %rhs
- %copy_sel:_(s32) = COPY %sel
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcZero, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassSelectPosInf) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
- %lhs:_(s32) = G_FCONSTANT float f0x7F800000
- %rhs:_(s32) = G_FCONSTANT float f0x7F800000
- %sel:_(s32) = G_SELECT %cond, %lhs, %rhs
- %copy_sel:_(s32) = COPY %sel
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPosInf, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassSelectNegInf) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
- %lhs:_(s32) = G_FCONSTANT float f0xFF800000
- %rhs:_(s32) = G_FCONSTANT float f0xFF800000
- %sel:_(s32) = G_SELECT %cond, %lhs, %rhs
- %copy_sel:_(s32) = COPY %sel
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcNegInf, Known.getKnownFPClasses());
- EXPECT_EQ(true, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassSelectPosOrNegInf) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
- %lhs:_(s32) = G_FCONSTANT float f0x7F800000
- %rhs:_(s32) = G_FCONSTANT float f0xFF800000
- %sel:_(s32) = G_SELECT %cond, %lhs, %rhs
- %copy_sel:_(s32) = COPY %sel
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcInf, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassSelectNNaN) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
- %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %rhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %sel:_(s32) = nnan G_SELECT %cond, %lhs, %rhs
- %copy_sel:_(s32) = COPY %sel
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(~fcNan, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassSelectNInf) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
- %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %rhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %sel:_(s32) = ninf G_SELECT %cond, %lhs, %rhs
- %copy_sel:_(s32) = COPY %sel
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(~fcInf, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassSelectNNaNNInf) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %cond:_(s1) = G_LOAD %ptr(p0) :: (load (s1))
- %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %rhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %sel:_(s32) = nnan ninf G_SELECT %cond, %lhs, %rhs
- %copy_sel:_(s32) = COPY %sel
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(~(fcNan | fcInf), Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFNegNInf) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fneg:_(s32) = ninf G_FNEG %val
- %copy_fneg:_(s32) = COPY %fneg
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(~fcInf, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFabsUnknown) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = G_FABS %val
- %copy_fabs:_(s32) = COPY %fabs
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPositive | fcNan, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassVecFabsUnknown) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(<3 x s32>) = G_LOAD %ptr(p0) :: (load (<3 x s32>))
- %fabs:_(<3 x s32>) = G_FABS %val
- %copy_fabs:_(<3 x s32>) = COPY %fabs
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPositive | fcNan, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFnegFabs) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = G_FABS %val
- %fneg:_(s32) = G_FNEG %fabs
- %copy_fneg:_(s32) = COPY %fneg
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcNegative | fcNan, Known.getKnownFPClasses());
- EXPECT_EQ(true, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFnegFabsNInf) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = ninf G_FABS %val
- %fneg:_(s32) = G_FNEG %fabs
- %copy_fneg:_(s32) = COPY %fneg
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcNegFinite | fcNan, Known.getKnownFPClasses());
- EXPECT_EQ(true, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFnegFabsNNan) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = nnan G_FABS %val
- %fneg:_(s32) = G_FNEG %fabs
- %copy_fneg:_(s32) = COPY %fneg
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcNegative, Known.getKnownFPClasses());
- EXPECT_EQ(true, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassCopySignNNanSrc0) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %mag:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %sgn:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = nnan G_FABS %mag
- %fcopysign:_(s32) = G_FCOPYSIGN %fabs, %sgn
- %copy_fcopysign:_(s32) = COPY %fcopysign
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(~fcNan, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassCopySignNInfSrc0_NegSign) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %mag:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %sgn:_(s32) = G_FCONSTANT float -1.0
- %fabs:_(s32) = ninf G_FLOG %mag
- %fcopysign:_(s32) = G_FCOPYSIGN %fabs, %sgn
- %copy_fcopysign:_(s32) = COPY %fcopysign
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcNan | fcNegZero | fcNegNormal, Known.getKnownFPClasses());
- EXPECT_EQ(true, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassCopySignNInfSrc0_PosSign) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %mag:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %sgn:_(s32) = G_FCONSTANT float 1.0
- %fabs:_(s32) = ninf G_FSQRT %mag
- %fcopysign:_(s32) = G_FCOPYSIGN %fabs, %sgn
- %copy_fcopysign:_(s32) = COPY %fcopysign
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcNan | fcPosZero | fcPosNormal, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassUIToFP) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %cast:_(s32) = G_UITOFP %val
- %copy_cast:_(s32) = COPY %cast
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPosZero | fcPosNormal, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassSIToFP) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %cast:_(s32) = G_SITOFP %val
- %copy_cast:_(s32) = COPY %cast
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPosNormal | fcNegNormal | fcPosZero, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFAdd) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %rhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fadd:_(s32) = G_FADD %lhs, %rhs
- %copy_fadd:_(s32) = COPY %fadd
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcAllFlags, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFAdd_Zero) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %rhs:_(s32) = G_FCONSTANT float 0.0
- %fadd:_(s32) = G_FADD %lhs, %rhs
- %copy_fadd:_(s32) = COPY %fadd
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcAllFlags & ~fcNegZero, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFAdd_NegZero) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %rhs:_(s32) = G_FCONSTANT float -0.0
- %fadd:_(s32) = G_FADD %lhs, %rhs
- %copy_fadd:_(s32) = COPY %fadd
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcAllFlags, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFstrictAdd_Zero) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %rhs:_(s32) = G_FCONSTANT float 0.0
- %fadd:_(s32) = G_STRICT_FADD %lhs, %rhs
- %copy_fadd:_(s32) = COPY %fadd
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcAllFlags & ~fcNegZero, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFMul) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %val:_(s32) = G_FREEZE %load
- %fmul:_(s32) = G_FMUL %val, %val
- %copy_fadd:_(s32) = COPY %fmul
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPositive | fcNan, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFMulZero) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %rhs:_(s32) = G_FCONSTANT float 0.0
- %fabs:_(s32) = nnan ninf G_FABS %lhs
- %fmul:_(s32) = G_FMUL %fabs, %rhs
- %copy_fadd:_(s32) = COPY %fmul
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPosZero, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFLogNeg) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = nnan ninf G_FABS %val
- %fneg:_(s32) = nnan ninf G_FNEG %fabs
- %flog:_(s32) = G_FLOG %fneg
- %copy_flog:_(s32) = COPY %flog
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcQNan | fcNegInf | fcPosZero | fcNormal,
- Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFLogDeduceSubnormalOrNegativeZero) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %flog:_(s32) = G_FLOG %val
- %copy_flog:_(s32) = COPY %flog
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
- KnownFPClass Known =
- Info.computeKnownFPClass(SrcReg, fcNegZero | fcSubnormal);
-
- EXPECT_EQ(~(fcNegZero | fcSubnormal), Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFLogPosZero) {
- StringRef MIRString = R"(
- %val:_(s32) = G_FCONSTANT float 0.0
- %flog:_(s32) = G_FLOG %val
- %copy_flog:_(s32) = COPY %flog
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcNegInf | fcPosZero | fcNormal, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFLogNegZero) {
- StringRef MIRString = R"(
- %val:_(s32) = G_FCONSTANT float -0.0
- %flog:_(s32) = G_FLOG %val
- %copy_flog:_(s32) = COPY %flog
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcNegInf | fcPosZero | fcNormal, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassCopy) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = G_FABS %val
- %copy:_(s32) = COPY %fabs
- %copy_copy:_(s32) = COPY %copy
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(~fcNegative, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassSelectIsFPClass) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %lhs:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %rhs:_(s32) = G_FCONSTANT float 0.0
- %cond:_(s1) = G_IS_FPCLASS %lhs, 96
- %sel:_(s32) = G_SELECT %cond, %lhs, %rhs
- %copy_sel:_(s32) = COPY %sel
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcZero, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFLDExp) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %exp:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = G_FABS %val
- %fldexp:_(s32) = G_FLDEXP %fabs, %exp
- %copy_fldexp:_(s32) = COPY %fldexp
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPositive | fcNan, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFPowPos) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %exp:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = G_FABS %val
- %fpow:_(s32) = G_FPOW %fabs, %exp
- %copy_fpow:_(s32) = COPY %fpow
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPositive | fcNan, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
- EXPECT_TRUE(Info.isKnownNeverNaN(SrcReg, true));
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFPowPosNNaN) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %exp:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = nnan G_FABS %val
- %fabs_exp:_(s32) = nnan G_FABS %exp
- %fpow:_(s32) = G_FPOW %fabs, %fabs_exp
- %copy_fpow:_(s32) = COPY %fpow
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPositive, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFPowIEvenExp) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %pwr:_(s32) = G_CONSTANT i32 2
- %fpowi:_(s32) = G_FPOWI %val, %pwr
- %copy_fpowi:_(s32) = COPY %fpowi
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPositive | fcNan, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFPowIPos) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %pwr:_(s32) = G_CONSTANT i32 3
- %fabs:_(s32) = nnan ninf G_FABS %val
- %fpowi:_(s32) = G_FPOWI %fabs, %pwr
- %copy_fpowi:_(s32) = COPY %fpowi
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPositive, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFPowIInf) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %val:_(s32) = G_FREEZE %load
- %x:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %finite:_(s32) = ninf G_FNEG %val
- %normal:_(s32) = G_FCONSTANT float 2.0
- %zero_or_nan:_(s32) = G_FREM %val, %val
- %nonneg_mask:_(s32) = G_CONSTANT i32 2147483647
- %nonneg:_(s32) = G_AND %x, %nonneg_mask
- %one:_(s32) = G_CONSTANT i32 1
- %two:_(s32) = G_CONSTANT i32 2
- %negone:_(s32) = G_CONSTANT i32 -1
- %fpowi0:_(s32) = G_FPOWI %finite, %one
- %copy_fpowi0:_(s32) = COPY %fpowi0
- %fpowi1:_(s32) = G_FPOWI %finite, %two
- %copy_fpowi1:_(s32) = COPY %fpowi1
- %fpowi2:_(s32) = G_FPOWI %normal, %negone
- %copy_fpowi2:_(s32) = COPY %fpowi2
- %fpowi3:_(s32) = G_FPOWI %zero_or_nan, %nonneg
- %copy_fpowi3:_(s32) = COPY %fpowi3
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- GISelValueTracking Info(*MF);
-
- // powi(finite, 1) --> ~fcInf
- Register CopyReg0 = Copies[Copies.size() - 4];
- MachineInstr *FinalCopy0 = MRI->getVRegDef(CopyReg0);
- Register SrcReg0 = FinalCopy0->getOperand(1).getReg();
- KnownFPClass Known0 = Info.computeKnownFPClass(SrcReg0, fcAllFlags);
- KnownFPClass KnownInf0 = Info.computeKnownFPClass(SrcReg0, fcInf);
- EXPECT_EQ(~fcInf, Known0.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known0.getSignBit());
- EXPECT_TRUE(KnownInf0.isKnownNeverInfinity());
-
- // powi(finite, 2) --> fcPositive | fcNan
- Register CopyReg1 = Copies[Copies.size() - 3];
- MachineInstr *FinalCopy1 = MRI->getVRegDef(CopyReg1);
- Register SrcReg1 = FinalCopy1->getOperand(1).getReg();
- KnownFPClass Known1 = Info.computeKnownFPClass(SrcReg1, fcAllFlags);
- KnownFPClass KnownInf1 = Info.computeKnownFPClass(SrcReg1, fcInf);
- EXPECT_EQ(fcPositive | fcNan, Known1.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known1.getSignBit());
- EXPECT_FALSE(KnownInf1.isKnownNeverInfinity());
-
- // powi(normal, -1) --> fcPosFinite
- Register CopyReg2 = Copies[Copies.size() - 2];
- MachineInstr *FinalCopy2 = MRI->getVRegDef(CopyReg2);
- Register SrcReg2 = FinalCopy2->getOperand(1).getReg();
- KnownFPClass Known2 = Info.computeKnownFPClass(SrcReg2, fcAllFlags);
- KnownFPClass KnownInf2 = Info.computeKnownFPClass(SrcReg2, fcInf);
- EXPECT_EQ(fcPosFinite, Known2.getKnownFPClasses());
- EXPECT_EQ(false, Known2.getSignBit());
- EXPECT_TRUE(KnownInf2.isKnownNeverInfinity());
-
- // powi(zero_or_nan, nonneg) --> ~fcInf
- Register CopyReg3 = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy3 = MRI->getVRegDef(CopyReg3);
- Register SrcReg3 = FinalCopy3->getOperand(1).getReg();
- KnownFPClass KnownInf3 = Info.computeKnownFPClass(SrcReg3, fcInf);
- EXPECT_TRUE(KnownInf3.isKnownNeverInfinity());
-
- // TODO: Add powi(0/nan, exp), exp > 0 --> fcNan | fcZero | fcPosNormal
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFDiv) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %val:_(s32) = G_FREEZE %load
- %fdiv:_(s32) = G_FDIV %val, %val
- %copy_fdiv:_(s32) = COPY %fdiv
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPosNormal | fcNan, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFDiv_Inf) {
- StringRef MIRString = R"(
- %lhs:_(s32) = G_FCONSTANT float 1.0
- %rhs:_(s32) = G_FCONSTANT float 0.0
- %fdiv:_(s32) = G_FDIV %lhs, %rhs
- %copy_fdiv:_(s32) = COPY %fdiv
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPosInf, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFDivSqrt) {
- // The only negative value sqrt(x) can produce is -0.0, so the only negative
- // value 1.0 / sqrt(x) can produce is -Inf.
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %x:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %sqrt:_(s32) = G_FSQRT %x
- %one:_(s32) = G_FCONSTANT float 1.0
- %fdiv:_(s32) = G_FDIV %one, %sqrt
- %copy_fdiv:_(s32) = COPY %fdiv
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcAllFlags & ~(fcNegNormal | fcNegSubnormal),
- Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFDivNegSqrtNeg) {
- // The only negative value sqrt(-x) can produce is -0.0, so the only positive
- // value -1.0 / sqrt(-x) can produce is +Inf.
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %x:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %neg_x:_(s32) = G_FNEG %x
- %sqrt:_(s32) = G_FSQRT %neg_x
- %neg_one:_(s32) = G_FCONSTANT float -1.0
- %fdiv:_(s32) = G_FDIV %neg_one, %sqrt
- %copy_fdiv:_(s32) = COPY %fdiv
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg, fcPositive);
-
- EXPECT_EQ(fcAllFlags & ~(fcPosNormal | fcPosSubnormal),
- Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassSqrtFDiv) {
- // sqrt(1.0 / x) may produce -0.0 when x is -Inf, but cannot produce any
- // other negative value or a subnormal value.
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %x:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %one:_(s32) = G_FCONSTANT float 1.0
- %inv:_(s32) = G_FDIV %one, %x
- %sqrt:_(s32) = G_FSQRT %inv
- %copy_sqrt:_(s32) = COPY %sqrt
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcNan | fcZero | fcPosNormal | fcPosInf, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFRem) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %val:_(s32) = G_FREEZE %load
- %frem:_(s32) = G_FREM %val, %val
- %copy_frem:_(s32) = COPY %frem
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcZero | fcNan, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFRemSelf_KnownFiniteNonZero) {
- // X % X where X is a known-finite, known-nonzero value should produce
- // exactly [+-]0.0 (no NaN possible).
- StringRef MIRString = R"(
- %val:_(s32) = G_FCONSTANT float 2.0
- %frem:_(s32) = G_FREM %val, %val
- %copy_frem:_(s32) = COPY %frem
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- // 2.0 % 2.0 = 0.0 exactly — NaN is impossible since 2.0 is finite and
- // nonzero.
- EXPECT_EQ(fcZero, Known.getKnownFPClasses());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassShuffleVec) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %vec:_(<4 x s32>) = G_LOAD %ptr(p0) :: (load (<4 x s32>))
- %fabs:_(<4 x s32>) = nnan ninf G_FABS %vec
- %def:_(<4 x s32>) = G_IMPLICIT_DEF
- %shuf:_(<4 x s32>) = G_SHUFFLE_VECTOR %fabs(<4 x s32>), %def, shufflemask(0, 0, 0, 0)
- %copy_shuf:_(<4 x s32>) = COPY %shuf
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPosFinite, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassBuildVec) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val1:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = nnan ninf G_FABS %val1
- %val2:_(s32) = G_FCONSTANT float 3.0
- %vec:_(<2 x s32>) = G_BUILD_VECTOR %fabs, %val2
- %copy_vec:_(<2 x s32>) = COPY %vec
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPosFinite, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassConcatVec) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %vec1:_(<2 x s32>) = G_LOAD %ptr(p0) :: (load (<2 x s32>))
- %c1:_(s32) = G_FCONSTANT float 1.0
- %c2:_(s32) = G_FCONSTANT float 2.0
- %vec2:_(<2 x s32>) = G_BUILD_VECTOR %c1, %c2
- %fabs1:_(<2 x s32>) = nnan ninf G_FABS %vec1
- %fabs2:_(<2 x s32>) = nnan ninf G_FABS %vec2
- %cat:_(<4 x s32>) = G_CONCAT_VECTORS %fabs1, %fabs2
- %copy_cat:_(<4 x s32>) = COPY %cat
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
+// This test exercises the signaling-NaN query that the
+// `print<gisel-value-tracking-fpclass>` pass cannot represent.
- EXPECT_EQ(fcPosFinite, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassVecExtractElem) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %vec:_(<4 x s32>) = G_LOAD %ptr(p0) :: (load (<4 x s32>))
- %fabs:_(<4 x s32>) = nnan ninf G_FABS %vec
- %idx:_(s64) = G_CONSTANT i64 1
- %extract:_(s32) = G_EXTRACT_VECTOR_ELT %fabs, %idx
- %copy_elem:_(s32) = COPY %extract
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPosFinite, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassVecInsertElem) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %vec:_(<4 x s32>) = G_LOAD %ptr(p0) :: (load (<4 x s32>))
- %fabs1:_(<4 x s32>) = nnan ninf G_FABS %vec
- %elem:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs2:_(s32) = nnan ninf G_FABS %elem
- %idx:_(s64) = G_CONSTANT i64 1
- %insert:_(<4 x s32>) = G_INSERT_VECTOR_ELT %fabs1, %fabs2, %idx
- %copy_insert:_(<4 x s32>) = COPY %insert
-)";
-
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
-
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
-
- GISelValueTracking Info(*MF);
-
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
-
- EXPECT_EQ(fcPosFinite, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFSinh) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fsinh:_(s32) = G_FSINH %val
- %copy:_(s32) = COPY %fsinh
-)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcAllFlags, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFSinhPos) {
- // sinh is sign-preserving: non-negative input → non-negative output.
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = nnan ninf G_FABS %val
- %fsinh:_(s32) = G_FSINH %fabs
- %copy:_(s32) = COPY %fsinh
-)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcPositive, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFCosh) {
- // cosh(x) >= 1 for all real x; never negative, zero, or subnormal.
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fcosh:_(s32) = G_FCOSH %val
- %copy:_(s32) = COPY %fcosh
-)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcPosNormal | fcPosInf | fcNan, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFCoshNNaN) {
- // cosh of a non-NaN value is either positive normal or positive infinity.
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = nnan G_FABS %val
- %fcosh:_(s32) = G_FCOSH %fabs
- %copy:_(s32) = COPY %fcosh
-)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcPosNormal | fcPosInf, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFTanh) {
- // tanh is bounded to (-1, 1): never Inf.
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %ftanh:_(s32) = G_FTANH %val
- %copy:_(s32) = COPY %ftanh
-)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcAllFlags & ~fcInf, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFTanhPos) {
- // tanh is sign-preserving and bounded to (-1,1): non-negative finite output.
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = nnan ninf G_FABS %val
- %ftanh:_(s32) = G_FTANH %fabs
- %copy:_(s32) = COPY %ftanh
-)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcPosFinite, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFAsin) {
- // asin is bounded to [-π/2, π/2]: never Inf.
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fasin:_(s32) = G_FASIN %val
- %copy:_(s32) = COPY %fasin
-)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcAllFlags & ~fcInf, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFAsinPos) {
- // For 0 <= x <= 1, asin is sign-preserving and returns a non-negative
- // finite value. For x > 1, it returns NaN.
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = nnan ninf G_FABS %val
- %fasin:_(s32) = G_FASIN %fabs
- %copy:_(s32) = COPY %fasin
-)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcPosFinite | fcQNan, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFAcos) {
- // acos is bounded to [0, π]: never infinite, negative, or subnormal.
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %facos:_(s32) = G_FACOS %val
- %copy:_(s32) = COPY %facos
-)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcPosZero | fcPosNormal | fcNan, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFAcosPos) {
- // For 0 <= x <= 1, acos returns a non-negative finite value.
- // For x > 1, acos returns NaN.
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = nnan ninf G_FABS %val
- %facos:_(s32) = G_FACOS %fabs
- %copy:_(s32) = COPY %facos
-)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcPosZero | fcPosNormal | fcQNan, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFAtan) {
- // atan is bounded to (-π/2, π/2): never Inf (atan(±Inf) = ±π/2, finite).
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fatan:_(s32) = G_FATAN %val
- %copy:_(s32) = COPY %fatan
-)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcAllFlags & ~fcInf, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFAtanPos) {
- // atan is sign-preserving and bounded: non-negative finite output.
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = nnan ninf G_FABS %val
- %fatan:_(s32) = G_FATAN %fabs
- %copy:_(s32) = COPY %fatan
-)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcPosFinite, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFTan) {
- // tan(±Inf) = NaN, tan(finite) = finite: never Inf.
+TEST_F(AArch64GISelMITest, TestFPClassFPowPosNeverSNaN) {
StringRef MIRString = R"(
%ptr:_(p0) = G_IMPLICIT_DEF
%val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %ftan:_(s32) = G_FTAN %val
- %copy:_(s32) = COPY %ftan
-)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcAllFlags & ~fcInf, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFTanNNaN) {
- // tan of a non-NaN, non-Inf source is non-NaN and non-Inf.
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs:_(s32) = nnan ninf G_FABS %val
- %ftan:_(s32) = G_FTAN %fabs
- %copy:_(s32) = COPY %ftan
-)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcFinite, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-
-TEST_F(AArch64GISelMITest, TestFPClassFAtan2) {
- // atan2 result is in (-π, π]: never Inf.
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %y:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %x:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fatan2:_(s32) = G_FATAN2 %y, %x
- %copy:_(s32) = COPY %fatan2
+ %exp:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
+ %fabs:_(s32) = G_FABS %val
+ %fpow:_(s32) = G_FPOW %fabs, %exp
+ %copy_fpow:_(s32) = COPY %fpow
)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcAllFlags & ~fcInf, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-TEST_F(AArch64GISelMITest, TestFPClassFAtan2NNaN) {
- // atan2 with two non-negative finite inputs is non-negative and finite.
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %y:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %x:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %fabs_y:_(s32) = nnan ninf G_FABS %y
- %fabs_x:_(s32) = nnan ninf G_FABS %x
- %fatan2:_(s32) = G_FATAN2 %fabs_y, %fabs_x
- %copy:_(s32) = COPY %fatan2
-)";
setUp(MIRString);
if (!TM)
GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcPosFinite, Known.getKnownFPClasses());
- EXPECT_EQ(false, Known.getSignBit());
-}
-// isAbsoluteValueULEOne: x - floor(x) is in [0, 1), so multiplying a known-
-// finite value by it cannot overflow to infinity.
-TEST_F(AArch64GISelMITest, TestFPClassFMulAbsULEOne) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %x:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %val:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %floor:_(s32) = G_FFLOOR %x
- %fract:_(s32) = G_FSUB %x, %floor
- %finite:_(s32) = nnan ninf G_FABS %val
- %fmul:_(s32) = G_FMUL %finite, %fract
- %copy:_(s32) = COPY %fmul
-)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
Register CopyReg = Copies[Copies.size() - 1];
MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
Register SrcReg = FinalCopy->getOperand(1).getReg();
- GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(~fcInf, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
-}
-// G_FMA with A == B (and A guaranteed not-undef): the multiply part is a
-// square, so the result is known non-negative (never fcNegative).
-TEST_F(AArch64GISelMITest, TestFPClassFMASelfSquare) {
- StringRef MIRString = R"(
- %ptr:_(p0) = G_IMPLICIT_DEF
- %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))
- %val:_(s32) = G_FREEZE %load
- %c:_(s32) = G_FCONSTANT float 1.0
- %fma:_(s32) = G_FMA %val, %val, %c
- %copy:_(s32) = COPY %fma
-)";
- setUp(MIRString);
- if (!TM)
- GTEST_SKIP();
- Register CopyReg = Copies[Copies.size() - 1];
- MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
- Register SrcReg = FinalCopy->getOperand(1).getReg();
GISelValueTracking Info(*MF);
- KnownFPClass Known = Info.computeKnownFPClass(SrcReg);
- EXPECT_EQ(fcNan | fcPosInf | fcPosNormal, Known.getKnownFPClasses());
- EXPECT_EQ(std::nullopt, Known.getSignBit());
+ EXPECT_TRUE(Info.isKnownNeverNaN(SrcReg, true));
}
diff --git a/llvm/utils/update_givaluetracking_test_checks.py b/llvm/utils/update_givaluetracking_test_checks.py
index c11b279dca318..f2ff4c033216c 100755
--- a/llvm/utils/update_givaluetracking_test_checks.py
+++ b/llvm/utils/update_givaluetracking_test_checks.py
@@ -1,13 +1,13 @@
#!/usr/bin/env python3
-"""Updates FileCheck checks in GlobalISel Known Bits tests.
+"""Updates FileCheck checks in GlobalISel value-tracking tests.
This script is a utility to update MIR based tests with new FileCheck
-patterns for GlobalISel Known Bits.
+patterns for GlobalISel KnownBits and KnownFPClass results.
The checks added by this script are similar to update_mir_test_checks, using
-the output of KnownBits, SignBits, and IsKnownNeverZero from
--passes=print<gisel-value-tracking>.
+the output of -passes=print<gisel-value-tracking> or
+-passes=print<gisel-value-tracking-fpclass>.
"""
from __future__ import print_function
@@ -24,8 +24,9 @@
VT_FUNCTION_RE = re.compile(
r"\s*name:\s*@(?P<func>[A-Za-z0-9_-]+)"
- r"(?P<body>(\s*%[0-9a-zA-Z_]+:[A-Za-z0-9_-]+\s*KnownBits:[01?]+"
- r"\sSignBits:[0-9]+\sIsKnownNeverZero:[01]$)+)",
+ r"(?P<body>(\s*%[0-9a-zA-Z_]+:[A-Za-z0-9_-]+\s*"
+ r"(?:KnownBits:[01?]+\sSignBits:[0-9]+\sIsKnownNeverZero:[01]"
+ r"|FPClasses:\([^)]*\)\sSignBitKnown:[01?])$)+)",
flags=(re.X | re.M),
)
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