[llvm] [AMDGPU] Generalize scratch SGPR CFI emission (PR #217066)
Emma Pilkington via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 22 06:41:14 PDT 2026
================
@@ -3065,6 +3065,169 @@ define void @spill_exec_to_vcc() #3 {
ret void
}
+define void @spill_exec_to_vcc_hi() #3 {
+; WAVE64-LABEL: spill_exec_to_vcc_hi:
+; WAVE64: .Lfunc_begin9:
+; WAVE64-NEXT: .cfi_startproc
+; WAVE64-NEXT: ; %bb.0:
+; WAVE64-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; WAVE64-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; WAVE64-NEXT: .cfi_undefined 36
+; WAVE64-NEXT: .cfi_undefined 37
+; WAVE64-NEXT: .cfi_undefined 38
+; WAVE64-NEXT: .cfi_undefined 39
+; WAVE64-NEXT: .cfi_undefined 40
+; WAVE64-NEXT: .cfi_undefined 41
+; WAVE64-NEXT: .cfi_undefined 42
+; WAVE64-NEXT: .cfi_undefined 43
+; WAVE64-NEXT: .cfi_undefined 44
+; WAVE64-NEXT: .cfi_undefined 45
+; WAVE64-NEXT: .cfi_undefined 46
+; WAVE64-NEXT: .cfi_undefined 47
+; WAVE64-NEXT: .cfi_undefined 48
+; WAVE64-NEXT: .cfi_undefined 49
+; WAVE64-NEXT: .cfi_undefined 50
+; WAVE64-NEXT: .cfi_undefined 51
+; WAVE64-NEXT: .cfi_undefined 52
+; WAVE64-NEXT: .cfi_undefined 53
+; WAVE64-NEXT: .cfi_undefined 54
+; WAVE64-NEXT: .cfi_undefined 55
+; WAVE64-NEXT: .cfi_undefined 56
+; WAVE64-NEXT: .cfi_undefined 57
+; WAVE64-NEXT: .cfi_undefined 58
+; WAVE64-NEXT: .cfi_undefined 59
+; WAVE64-NEXT: .cfi_undefined 60
+; WAVE64-NEXT: .cfi_undefined 61
+; WAVE64-NEXT: .cfi_undefined 72
+; WAVE64-NEXT: .cfi_undefined 73
+; WAVE64-NEXT: .cfi_undefined 74
+; WAVE64-NEXT: .cfi_undefined 75
+; WAVE64-NEXT: .cfi_undefined 76
+; WAVE64-NEXT: .cfi_undefined 77
+; WAVE64-NEXT: .cfi_undefined 78
+; WAVE64-NEXT: .cfi_undefined 79
+; WAVE64-NEXT: .cfi_undefined 88
+; WAVE64-NEXT: .cfi_undefined 89
+; WAVE64-NEXT: .cfi_undefined 90
+; WAVE64-NEXT: .cfi_undefined 91
+; WAVE64-NEXT: .cfi_undefined 92
+; WAVE64-NEXT: .cfi_undefined 93
+; WAVE64-NEXT: .cfi_undefined 94
+; WAVE64-NEXT: .cfi_undefined 95
+; WAVE64-NEXT: .cfi_undefined 1096
+; WAVE64-NEXT: .cfi_undefined 1097
+; WAVE64-NEXT: .cfi_undefined 1098
+; WAVE64-NEXT: .cfi_undefined 1099
+; WAVE64-NEXT: .cfi_undefined 1100
+; WAVE64-NEXT: .cfi_undefined 1101
+; WAVE64-NEXT: .cfi_undefined 1102
+; WAVE64-NEXT: .cfi_undefined 1103
+; WAVE64-NEXT: .cfi_undefined 1112
+; WAVE64-NEXT: .cfi_undefined 1113
+; WAVE64-NEXT: .cfi_undefined 1114
+; WAVE64-NEXT: .cfi_undefined 1115
+; WAVE64-NEXT: .cfi_undefined 1116
+; WAVE64-NEXT: .cfi_undefined 1117
+; WAVE64-NEXT: .cfi_undefined 1118
+; WAVE64-NEXT: .cfi_undefined 1119
+; WAVE64-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; WAVE64-NEXT: s_xor_saveexec_b64 s[4:5], -1
+; WAVE64-NEXT: buffer_store_dword v0, off, s[0:3], s32 ; 4-byte Folded Spill
+; WAVE64-NEXT: .cfi_offset 2560, 0
+; WAVE64-NEXT: s_mov_b64 exec, s[4:5]
+; WAVE64-NEXT: v_writelane_b32 v0, exec_lo, 0
+; WAVE64-NEXT: v_writelane_b32 v0, exec_hi, 1
+; WAVE64-NEXT: .cfi_llvm_vector_registers 17, 2560, 0, 32, 2560, 1, 32
+; WAVE64-NEXT: ;;#ASMSTART
+; WAVE64-NEXT: ; clobber scratch SGPRs
+; WAVE64-NEXT: ;;#ASMEND
+; WAVE64-NEXT: s_xor_saveexec_b64 s[4:5], -1
+; WAVE64-NEXT: buffer_load_dword v0, off, s[0:3], s32 ; 4-byte Folded Reload
+; WAVE64-NEXT: s_mov_b64 exec, s[4:5]
+; WAVE64-NEXT: s_waitcnt vmcnt(0)
+; WAVE64-NEXT: s_setpc_b64 s[30:31]
+;
+; WAVE32-LABEL: spill_exec_to_vcc_hi:
+; WAVE32: .Lfunc_begin9:
+; WAVE32-NEXT: .cfi_startproc
+; WAVE32-NEXT: ; %bb.0:
+; WAVE32-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; WAVE32-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; WAVE32-NEXT: .cfi_undefined 36
+; WAVE32-NEXT: .cfi_undefined 37
+; WAVE32-NEXT: .cfi_undefined 38
+; WAVE32-NEXT: .cfi_undefined 39
+; WAVE32-NEXT: .cfi_undefined 40
+; WAVE32-NEXT: .cfi_undefined 41
+; WAVE32-NEXT: .cfi_undefined 42
+; WAVE32-NEXT: .cfi_undefined 43
+; WAVE32-NEXT: .cfi_undefined 44
+; WAVE32-NEXT: .cfi_undefined 45
+; WAVE32-NEXT: .cfi_undefined 46
+; WAVE32-NEXT: .cfi_undefined 47
+; WAVE32-NEXT: .cfi_undefined 48
+; WAVE32-NEXT: .cfi_undefined 49
+; WAVE32-NEXT: .cfi_undefined 50
+; WAVE32-NEXT: .cfi_undefined 51
+; WAVE32-NEXT: .cfi_undefined 52
+; WAVE32-NEXT: .cfi_undefined 53
+; WAVE32-NEXT: .cfi_undefined 54
+; WAVE32-NEXT: .cfi_undefined 55
+; WAVE32-NEXT: .cfi_undefined 56
+; WAVE32-NEXT: .cfi_undefined 57
+; WAVE32-NEXT: .cfi_undefined 58
+; WAVE32-NEXT: .cfi_undefined 59
+; WAVE32-NEXT: .cfi_undefined 60
+; WAVE32-NEXT: .cfi_undefined 61
+; WAVE32-NEXT: .cfi_undefined 72
+; WAVE32-NEXT: .cfi_undefined 73
+; WAVE32-NEXT: .cfi_undefined 74
+; WAVE32-NEXT: .cfi_undefined 75
+; WAVE32-NEXT: .cfi_undefined 76
+; WAVE32-NEXT: .cfi_undefined 77
+; WAVE32-NEXT: .cfi_undefined 78
+; WAVE32-NEXT: .cfi_undefined 79
+; WAVE32-NEXT: .cfi_undefined 88
+; WAVE32-NEXT: .cfi_undefined 89
+; WAVE32-NEXT: .cfi_undefined 90
+; WAVE32-NEXT: .cfi_undefined 91
+; WAVE32-NEXT: .cfi_undefined 92
+; WAVE32-NEXT: .cfi_undefined 93
+; WAVE32-NEXT: .cfi_undefined 94
+; WAVE32-NEXT: .cfi_undefined 95
+; WAVE32-NEXT: .cfi_undefined 1096
+; WAVE32-NEXT: .cfi_undefined 1097
+; WAVE32-NEXT: .cfi_undefined 1098
+; WAVE32-NEXT: .cfi_undefined 1099
+; WAVE32-NEXT: .cfi_undefined 1100
+; WAVE32-NEXT: .cfi_undefined 1101
+; WAVE32-NEXT: .cfi_undefined 1102
+; WAVE32-NEXT: .cfi_undefined 1103
+; WAVE32-NEXT: .cfi_undefined 1112
+; WAVE32-NEXT: .cfi_undefined 1113
+; WAVE32-NEXT: .cfi_undefined 1114
+; WAVE32-NEXT: .cfi_undefined 1115
+; WAVE32-NEXT: .cfi_undefined 1116
+; WAVE32-NEXT: .cfi_undefined 1117
+; WAVE32-NEXT: .cfi_undefined 1118
+; WAVE32-NEXT: .cfi_undefined 1119
+; WAVE32-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; WAVE32-NEXT: s_mov_b32 vcc_hi, exec_lo
+; WAVE32-NEXT: .cfi_undefined 1
+; WAVE32-NEXT: ;;#ASMSTART
+; WAVE32-NEXT: ; clobber scratch SGPRs
+; WAVE32-NEXT: ;;#ASMEND
+; WAVE32-NEXT: s_setpc_b64 s[30:31]
+ call void asm sideeffect "; clobber scratch SGPRs",
----------------
epilk wrote:
Yes, added a comment for clarity.
https://github.com/llvm/llvm-project/pull/217066
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