[llvm] [SelectionDAG] Add BUILD_PAIR to computeKnownBits (PR #225073)
Timur Golubovich via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 22 05:26:56 PDT 2026
https://github.com/timurgol007 updated https://github.com/llvm/llvm-project/pull/225073
>From d830f325835f07977ac16b61b211e9f683db6dad Mon Sep 17 00:00:00 2001
From: Timur Golubovich <timur.golubovich at intel.com>
Date: Tue, 22 Sep 2026 14:16:55 +0200
Subject: [PATCH 1/2] [Test] Add test coverage for
computeKnownBits(ISD::BUILD_PAIR)
Cross-block values of illegal types are reassembled with ISD::BUILD_PAIR, whose
known bits are not computed, so the known-zero i128 below reaches type
legalization and its variable shift is expanded through a stack slot. SPARC
covers both endiannesses.
---
llvm/test/CodeGen/SPARC/known-bits.ll | 135 ++++++++++++++++++++++++++
llvm/test/CodeGen/X86/known-bits.ll | 69 +++++++++++++
2 files changed, 204 insertions(+)
create mode 100644 llvm/test/CodeGen/SPARC/known-bits.ll
diff --git a/llvm/test/CodeGen/SPARC/known-bits.ll b/llvm/test/CodeGen/SPARC/known-bits.ll
new file mode 100644
index 0000000000000..431f40fe11855
--- /dev/null
+++ b/llvm/test/CodeGen/SPARC/known-bits.ll
@@ -0,0 +1,135 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc < %s -mtriple=sparc-unknown-linux-gnu | FileCheck %s --check-prefix=BE
+; RUN: llc < %s -mtriple=sparcel-unknown-linux-gnu | FileCheck %s --check-prefix=LE
+
+; %bb sees the zero %v only as an ISD::BUILD_PAIR of known-zero parts, because
+; cross-block values are passed in parts. Operand 0 is the low half on
+; big-endian targets too, so the shift folds either way.
+
+define i128 @knownbits_build_pair_shl(i128 %a0, i128 %a1, i1 %a2) nounwind {
+; BE-LABEL: knownbits_build_pair_shl:
+; BE: ! %bb.0: ! %entry
+; BE-NEXT: add %sp, -144, %sp
+; BE-NEXT: ld [%sp+244], %o0
+; BE-NEXT: andcc %o0, 1, %g0
+; BE-NEXT: be .LBB0_2
+; BE-NEXT: nop
+; BE-NEXT: ! %bb.1: ! %bb
+; BE-NEXT: mov %g0, %o0
+; BE-NEXT: ld [%sp+240], %o2
+; BE-NEXT: mov %g0, %o1
+; BE-NEXT: std %o0, [%sp+136]
+; BE-NEXT: std %o0, [%sp+128]
+; BE-NEXT: std %o0, [%sp+120]
+; BE-NEXT: std %o0, [%sp+112]
+; BE-NEXT: srl %o2, 3, %o0
+; BE-NEXT: and %o0, 12, %o0
+; BE-NEXT: add %sp, 112, %o1
+; BE-NEXT: add %o1, %o0, %o3
+; BE-NEXT: ld [%o3+4], %o4
+; BE-NEXT: add %sp, 96, %o5
+; BE-NEXT: or %o5, 4, %o5
+; BE-NEXT: st %o4, [%o5]
+; BE-NEXT: ld [%o3+12], %o4
+; BE-NEXT: add %sp, 104, %o5
+; BE-NEXT: or %o5, 4, %o5
+; BE-NEXT: st %o4, [%o5]
+; BE-NEXT: ld [%o1+%o0], %o0
+; BE-NEXT: st %o0, [%sp+96]
+; BE-NEXT: ld [%o3+8], %o0
+; BE-NEXT: st %o0, [%sp+104]
+; BE-NEXT: ldd [%sp+96], %o4
+; BE-NEXT: and %o2, 31, %o3
+; BE-NEXT: sll %o4, %o3, %o0
+; BE-NEXT: xor %o3, 31, %o2
+; BE-NEXT: srl %o5, 1, %o1
+; BE-NEXT: ldd [%sp+104], %g2
+; BE-NEXT: srl %o1, %o2, %o1
+; BE-NEXT: or %o0, %o1, %o0
+; BE-NEXT: sll %o5, %o3, %o1
+; BE-NEXT: srl %g2, 1, %o4
+; BE-NEXT: srl %o4, %o2, %o4
+; BE-NEXT: or %o1, %o4, %o1
+; BE-NEXT: sll %g2, %o3, %o4
+; BE-NEXT: srl %g3, 1, %o5
+; BE-NEXT: srl %o5, %o2, %o2
+; BE-NEXT: or %o4, %o2, %o2
+; BE-NEXT: sll %g3, %o3, %o3
+; BE-NEXT: retl
+; BE-NEXT: add %sp, 144, %sp
+; BE-NEXT: .LBB0_2: ! %exit
+; BE-NEXT: mov %g0, %o0
+; BE-NEXT: mov %g0, %o1
+; BE-NEXT: mov %g0, %o2
+; BE-NEXT: mov %g0, %o3
+; BE-NEXT: retl
+; BE-NEXT: add %sp, 144, %sp
+;
+; LE-LABEL: knownbits_build_pair_shl:
+; LE: ! %bb.0: ! %entry
+; LE-NEXT: add %sp, -144, %sp
+; LE-NEXT: ld [%sp+244], %o0
+; LE-NEXT: andcc %o0, 1, %g0
+; LE-NEXT: be .LBB0_2
+; LE-NEXT: nop
+; LE-NEXT: ! %bb.1: ! %bb
+; LE-NEXT: mov %g0, %o0
+; LE-NEXT: mov %g0, %o1
+; LE-NEXT: std %o0, [%sp+136]
+; LE-NEXT: std %o0, [%sp+128]
+; LE-NEXT: std %o0, [%sp+120]
+; LE-NEXT: std %o0, [%sp+112]
+; LE-NEXT: add %sp, 112, %o0
+; LE-NEXT: add %o0, 16, %o0
+; LE-NEXT: srl %o4, 3, %o1
+; LE-NEXT: and %o1, 12, %o1
+; LE-NEXT: sub %o0, %o1, %o0
+; LE-NEXT: ld [%o0+4], %o1
+; LE-NEXT: add %sp, 96, %o2
+; LE-NEXT: or %o2, 4, %o2
+; LE-NEXT: st %o1, [%o2]
+; LE-NEXT: ld [%o0+12], %o1
+; LE-NEXT: add %sp, 104, %o2
+; LE-NEXT: or %o2, 4, %o2
+; LE-NEXT: st %o1, [%o2]
+; LE-NEXT: ld [%o0], %o1
+; LE-NEXT: st %o1, [%sp+96]
+; LE-NEXT: ld [%o0+8], %o0
+; LE-NEXT: st %o0, [%sp+104]
+; LE-NEXT: ldd [%sp+96], %g2
+; LE-NEXT: and %o4, 31, %o0
+; LE-NEXT: sll %g3, %o0, %o1
+; LE-NEXT: xor %o0, 31, %o3
+; LE-NEXT: ldd [%sp+104], %o4
+; LE-NEXT: srl %g2, 1, %o2
+; LE-NEXT: srl %o2, %o3, %o2
+; LE-NEXT: or %o1, %o2, %o1
+; LE-NEXT: sll %o4, %o0, %o2
+; LE-NEXT: srl %g3, 1, %g4
+; LE-NEXT: srl %g4, %o3, %g4
+; LE-NEXT: or %o2, %g4, %o2
+; LE-NEXT: sll %o5, %o0, %g4
+; LE-NEXT: srl %o4, 1, %o4
+; LE-NEXT: srl %o4, %o3, %o3
+; LE-NEXT: or %g4, %o3, %o3
+; LE-NEXT: sll %g2, %o0, %o0
+; LE-NEXT: retl
+; LE-NEXT: add %sp, 144, %sp
+; LE-NEXT: .LBB0_2: ! %exit
+; LE-NEXT: mov %g0, %o0
+; LE-NEXT: mov %g0, %o1
+; LE-NEXT: mov %g0, %o2
+; LE-NEXT: mov %g0, %o3
+; LE-NEXT: retl
+; LE-NEXT: add %sp, 144, %sp
+entry:
+ %v = and i128 %a0, 0
+ br i1 %a2, label %bb, label %exit
+
+bb:
+ %s = shl i128 %v, %a1
+ ret i128 %s
+
+exit:
+ ret i128 0
+}
diff --git a/llvm/test/CodeGen/X86/known-bits.ll b/llvm/test/CodeGen/X86/known-bits.ll
index 0fef1170112a1..18a2d536f5fb1 100644
--- a/llvm/test/CodeGen/X86/known-bits.ll
+++ b/llvm/test/CodeGen/X86/known-bits.ll
@@ -205,3 +205,72 @@ define i32 @knownbits_add_self_lsb(i32 %a0) nounwind {
%and = and i32 %sum, 1
ret i32 %and
}
+
+define i128 @knownbits_build_pair_shl(i128 %a0, i128 %a1, i1 %a2) nounwind {
+; X86-LABEL: knownbits_build_pair_shl:
+; X86: # %bb.0: # %entry
+; X86-NEXT: pushl %ebp
+; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: andl $-16, %esp
+; X86-NEXT: subl $48, %esp
+; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: testb $1, 56(%ebp)
+; X86-NEXT: je .LBB8_2
+; X86-NEXT: # %bb.1: # %bb
+; X86-NEXT: movl 40(%ebp), %ecx
+; X86-NEXT: vxorps %xmm0, %xmm0, %xmm0
+; X86-NEXT: vmovups %ymm0, (%esp)
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: shrb $3, %dl
+; X86-NEXT: andb $12, %dl
+; X86-NEXT: negb %dl
+; X86-NEXT: movsbl %dl, %ebx
+; X86-NEXT: movl 20(%esp,%ebx), %edx
+; X86-NEXT: movl 24(%esp,%ebx), %eax
+; X86-NEXT: movl %eax, %edi
+; X86-NEXT: shldl %cl, %edx, %edi
+; X86-NEXT: movl 16(%esp,%ebx), %esi
+; X86-NEXT: movl 28(%esp,%ebx), %ebx
+; X86-NEXT: shldl %cl, %eax, %ebx
+; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: movl %ebx, 12(%eax)
+; X86-NEXT: movl %edi, 8(%eax)
+; X86-NEXT: movl %esi, %edi
+; X86-NEXT: shll %cl, %edi
+; X86-NEXT: # kill: def $cl killed $cl killed $ecx
+; X86-NEXT: shldl %cl, %esi, %edx
+; X86-NEXT: movl %edx, 4(%eax)
+; X86-NEXT: movl %edi, (%eax)
+; X86-NEXT: jmp .LBB8_3
+; X86-NEXT: .LBB8_2: # %exit
+; X86-NEXT: vxorps %xmm0, %xmm0, %xmm0
+; X86-NEXT: vmovaps %xmm0, (%eax)
+; X86-NEXT: .LBB8_3: # %exit
+; X86-NEXT: leal -12(%ebp), %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: popl %ebp
+; X86-NEXT: vzeroupper
+; X86-NEXT: retl $4
+;
+; X64-LABEL: knownbits_build_pair_shl:
+; X64: # %bb.0: # %entry
+; X64-NEXT: testb $1, %r8b
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: xorl %edx, %edx
+; X64-NEXT: retq
+entry:
+ %v = and i128 %a0, 0
+ br i1 %a2, label %bb, label %exit
+
+bb:
+ %s = shl i128 %v, %a1
+ ret i128 %s
+
+exit:
+ ret i128 0
+}
>From 8c63a5bbc2404fde6e0ad32d3fd13fe0fd613d0d Mon Sep 17 00:00:00 2001
From: Timur Golubovich <timur.golubovich at intel.com>
Date: Tue, 22 Sep 2026 14:17:17 +0200
Subject: [PATCH 2/2] [SelectionDAG] Handle BUILD_PAIR in computeKnownBits
Concatenate the known bits of both halves, with operand 0 as the low half and
operand 1 as the high half, matching TargetLowering::SimplifyDemandedBits and
GlobalISel's G_MERGE_VALUES. getCopyFromParts() reassembles cross-block values
of illegal types with BUILD_PAIR, so pr38539.ll folds a known-zero i66 shift.
---
.../lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 8 +
llvm/test/CodeGen/SPARC/known-bits.ll | 104 +------
llvm/test/CodeGen/X86/known-bits.ll | 40 +--
llvm/test/CodeGen/X86/pr38539.ll | 271 ++++++++----------
4 files changed, 129 insertions(+), 294 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 7b1995f4fd7e3..8c67b0449ddb6 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4317,6 +4317,14 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
Known = Known.anyext(BitWidth);
break;
}
+ case ISD::BUILD_PAIR: {
+ // Operand 0 is the low half and operand 1 the high half,
+ // KnownBits::concat places its argument in the low bits.
+ Known = computeKnownBits(Op.getOperand(0), Depth + 1);
+ Known2 = computeKnownBits(Op.getOperand(1), Depth + 1);
+ Known = Known2.concat(Known);
+ break;
+ }
case ISD::INSERT_VECTOR_ELT: {
if (Op.getValueType().isScalableVector())
break;
diff --git a/llvm/test/CodeGen/SPARC/known-bits.ll b/llvm/test/CodeGen/SPARC/known-bits.ll
index 431f40fe11855..959c78b0c64f9 100644
--- a/llvm/test/CodeGen/SPARC/known-bits.ll
+++ b/llvm/test/CodeGen/SPARC/known-bits.ll
@@ -9,119 +9,23 @@
define i128 @knownbits_build_pair_shl(i128 %a0, i128 %a1, i1 %a2) nounwind {
; BE-LABEL: knownbits_build_pair_shl:
; BE: ! %bb.0: ! %entry
-; BE-NEXT: add %sp, -144, %sp
-; BE-NEXT: ld [%sp+244], %o0
+; BE-NEXT: ld [%sp+100], %o0
; BE-NEXT: andcc %o0, 1, %g0
-; BE-NEXT: be .LBB0_2
-; BE-NEXT: nop
-; BE-NEXT: ! %bb.1: ! %bb
-; BE-NEXT: mov %g0, %o0
-; BE-NEXT: ld [%sp+240], %o2
-; BE-NEXT: mov %g0, %o1
-; BE-NEXT: std %o0, [%sp+136]
-; BE-NEXT: std %o0, [%sp+128]
-; BE-NEXT: std %o0, [%sp+120]
-; BE-NEXT: std %o0, [%sp+112]
-; BE-NEXT: srl %o2, 3, %o0
-; BE-NEXT: and %o0, 12, %o0
-; BE-NEXT: add %sp, 112, %o1
-; BE-NEXT: add %o1, %o0, %o3
-; BE-NEXT: ld [%o3+4], %o4
-; BE-NEXT: add %sp, 96, %o5
-; BE-NEXT: or %o5, 4, %o5
-; BE-NEXT: st %o4, [%o5]
-; BE-NEXT: ld [%o3+12], %o4
-; BE-NEXT: add %sp, 104, %o5
-; BE-NEXT: or %o5, 4, %o5
-; BE-NEXT: st %o4, [%o5]
-; BE-NEXT: ld [%o1+%o0], %o0
-; BE-NEXT: st %o0, [%sp+96]
-; BE-NEXT: ld [%o3+8], %o0
-; BE-NEXT: st %o0, [%sp+104]
-; BE-NEXT: ldd [%sp+96], %o4
-; BE-NEXT: and %o2, 31, %o3
-; BE-NEXT: sll %o4, %o3, %o0
-; BE-NEXT: xor %o3, 31, %o2
-; BE-NEXT: srl %o5, 1, %o1
-; BE-NEXT: ldd [%sp+104], %g2
-; BE-NEXT: srl %o1, %o2, %o1
-; BE-NEXT: or %o0, %o1, %o0
-; BE-NEXT: sll %o5, %o3, %o1
-; BE-NEXT: srl %g2, 1, %o4
-; BE-NEXT: srl %o4, %o2, %o4
-; BE-NEXT: or %o1, %o4, %o1
-; BE-NEXT: sll %g2, %o3, %o4
-; BE-NEXT: srl %g3, 1, %o5
-; BE-NEXT: srl %o5, %o2, %o2
-; BE-NEXT: or %o4, %o2, %o2
-; BE-NEXT: sll %g3, %o3, %o3
-; BE-NEXT: retl
-; BE-NEXT: add %sp, 144, %sp
-; BE-NEXT: .LBB0_2: ! %exit
; BE-NEXT: mov %g0, %o0
; BE-NEXT: mov %g0, %o1
; BE-NEXT: mov %g0, %o2
-; BE-NEXT: mov %g0, %o3
; BE-NEXT: retl
-; BE-NEXT: add %sp, 144, %sp
+; BE-NEXT: mov %g0, %o3
;
; LE-LABEL: knownbits_build_pair_shl:
; LE: ! %bb.0: ! %entry
-; LE-NEXT: add %sp, -144, %sp
-; LE-NEXT: ld [%sp+244], %o0
+; LE-NEXT: ld [%sp+100], %o0
; LE-NEXT: andcc %o0, 1, %g0
-; LE-NEXT: be .LBB0_2
-; LE-NEXT: nop
-; LE-NEXT: ! %bb.1: ! %bb
-; LE-NEXT: mov %g0, %o0
-; LE-NEXT: mov %g0, %o1
-; LE-NEXT: std %o0, [%sp+136]
-; LE-NEXT: std %o0, [%sp+128]
-; LE-NEXT: std %o0, [%sp+120]
-; LE-NEXT: std %o0, [%sp+112]
-; LE-NEXT: add %sp, 112, %o0
-; LE-NEXT: add %o0, 16, %o0
-; LE-NEXT: srl %o4, 3, %o1
-; LE-NEXT: and %o1, 12, %o1
-; LE-NEXT: sub %o0, %o1, %o0
-; LE-NEXT: ld [%o0+4], %o1
-; LE-NEXT: add %sp, 96, %o2
-; LE-NEXT: or %o2, 4, %o2
-; LE-NEXT: st %o1, [%o2]
-; LE-NEXT: ld [%o0+12], %o1
-; LE-NEXT: add %sp, 104, %o2
-; LE-NEXT: or %o2, 4, %o2
-; LE-NEXT: st %o1, [%o2]
-; LE-NEXT: ld [%o0], %o1
-; LE-NEXT: st %o1, [%sp+96]
-; LE-NEXT: ld [%o0+8], %o0
-; LE-NEXT: st %o0, [%sp+104]
-; LE-NEXT: ldd [%sp+96], %g2
-; LE-NEXT: and %o4, 31, %o0
-; LE-NEXT: sll %g3, %o0, %o1
-; LE-NEXT: xor %o0, 31, %o3
-; LE-NEXT: ldd [%sp+104], %o4
-; LE-NEXT: srl %g2, 1, %o2
-; LE-NEXT: srl %o2, %o3, %o2
-; LE-NEXT: or %o1, %o2, %o1
-; LE-NEXT: sll %o4, %o0, %o2
-; LE-NEXT: srl %g3, 1, %g4
-; LE-NEXT: srl %g4, %o3, %g4
-; LE-NEXT: or %o2, %g4, %o2
-; LE-NEXT: sll %o5, %o0, %g4
-; LE-NEXT: srl %o4, 1, %o4
-; LE-NEXT: srl %o4, %o3, %o3
-; LE-NEXT: or %g4, %o3, %o3
-; LE-NEXT: sll %g2, %o0, %o0
-; LE-NEXT: retl
-; LE-NEXT: add %sp, 144, %sp
-; LE-NEXT: .LBB0_2: ! %exit
; LE-NEXT: mov %g0, %o0
; LE-NEXT: mov %g0, %o1
; LE-NEXT: mov %g0, %o2
-; LE-NEXT: mov %g0, %o3
; LE-NEXT: retl
-; LE-NEXT: add %sp, 144, %sp
+; LE-NEXT: mov %g0, %o3
entry:
%v = and i128 %a0, 0
br i1 %a2, label %bb, label %exit
diff --git a/llvm/test/CodeGen/X86/known-bits.ll b/llvm/test/CodeGen/X86/known-bits.ll
index 18a2d536f5fb1..729bf06da5f5c 100644
--- a/llvm/test/CodeGen/X86/known-bits.ll
+++ b/llvm/test/CodeGen/X86/known-bits.ll
@@ -211,50 +211,14 @@ define i128 @knownbits_build_pair_shl(i128 %a0, i128 %a1, i1 %a2) nounwind {
; X86: # %bb.0: # %entry
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
-; X86-NEXT: pushl %ebx
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
-; X86-NEXT: subl $48, %esp
+; X86-NEXT: subl $16, %esp
; X86-NEXT: movl 8(%ebp), %eax
; X86-NEXT: testb $1, 56(%ebp)
-; X86-NEXT: je .LBB8_2
-; X86-NEXT: # %bb.1: # %bb
-; X86-NEXT: movl 40(%ebp), %ecx
-; X86-NEXT: vxorps %xmm0, %xmm0, %xmm0
-; X86-NEXT: vmovups %ymm0, (%esp)
-; X86-NEXT: movl %ecx, %edx
-; X86-NEXT: shrb $3, %dl
-; X86-NEXT: andb $12, %dl
-; X86-NEXT: negb %dl
-; X86-NEXT: movsbl %dl, %ebx
-; X86-NEXT: movl 20(%esp,%ebx), %edx
-; X86-NEXT: movl 24(%esp,%ebx), %eax
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: shldl %cl, %edx, %edi
-; X86-NEXT: movl 16(%esp,%ebx), %esi
-; X86-NEXT: movl 28(%esp,%ebx), %ebx
-; X86-NEXT: shldl %cl, %eax, %ebx
-; X86-NEXT: movl 8(%ebp), %eax
-; X86-NEXT: movl %ebx, 12(%eax)
-; X86-NEXT: movl %edi, 8(%eax)
-; X86-NEXT: movl %esi, %edi
-; X86-NEXT: shll %cl, %edi
-; X86-NEXT: # kill: def $cl killed $cl killed $ecx
-; X86-NEXT: shldl %cl, %esi, %edx
-; X86-NEXT: movl %edx, 4(%eax)
-; X86-NEXT: movl %edi, (%eax)
-; X86-NEXT: jmp .LBB8_3
-; X86-NEXT: .LBB8_2: # %exit
; X86-NEXT: vxorps %xmm0, %xmm0, %xmm0
; X86-NEXT: vmovaps %xmm0, (%eax)
-; X86-NEXT: .LBB8_3: # %exit
-; X86-NEXT: leal -12(%ebp), %esp
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
-; X86-NEXT: popl %ebx
+; X86-NEXT: movl %ebp, %esp
; X86-NEXT: popl %ebp
-; X86-NEXT: vzeroupper
; X86-NEXT: retl $4
;
; X64-LABEL: knownbits_build_pair_shl:
diff --git a/llvm/test/CodeGen/X86/pr38539.ll b/llvm/test/CodeGen/X86/pr38539.ll
index eecd15dd2afe9..e0e6f6bec4876 100644
--- a/llvm/test/CodeGen/X86/pr38539.ll
+++ b/llvm/test/CodeGen/X86/pr38539.ll
@@ -22,223 +22,182 @@ define void @f() nounwind {
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
-; X86-NEXT: subl $176, %esp
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: subl $96, %esp
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movzbl (%eax), %eax
; X86-NEXT: movzbl (%eax), %ecx
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: movb %cl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
; X86-NEXT: divb %cl
-; X86-NEXT: movl %edi, %eax
+; X86-NEXT: movl %edx, %eax
; X86-NEXT: shll $30, %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: sarl $30, %ecx
; X86-NEXT: sarl $31, %eax
-; X86-NEXT: xorl %eax, %edi
-; X86-NEXT: xorl %eax, %ebx
+; X86-NEXT: xorl %eax, %edx
+; X86-NEXT: xorl %eax, %esi
; X86-NEXT: shrdl $1, %eax, %ecx
-; X86-NEXT: xorl %ecx, %esi
-; X86-NEXT: subl %ecx, %esi
-; X86-NEXT: sbbl %eax, %ebx
-; X86-NEXT: sbbl %eax, %edi
-; X86-NEXT: movl %edi, %ecx
-; X86-NEXT: shldl $30, %ebx, %ecx
-; X86-NEXT: movl %esi, %edx
-; X86-NEXT: shrdl $2, %ebx, %edx
-; X86-NEXT: testl %ecx, %ecx
-; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: xorl %ecx, %ebx
+; X86-NEXT: subl %ecx, %ebx
+; X86-NEXT: sbbl %eax, %esi
+; X86-NEXT: sbbl %eax, %edx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: shldl $30, %esi, %eax
+; X86-NEXT: movl %ebx, %edi
+; X86-NEXT: movl %ebx, %ecx
+; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: shrdl $2, %esi, %ecx
+; X86-NEXT: testl %eax, %eax
+; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: jne .LBB0_1
; X86-NEXT: # %bb.2: # %BB_udiv-special-cases
-; X86-NEXT: bsrl %edx, %eax
-; X86-NEXT: xorl $31, %eax
-; X86-NEXT: orl $32, %eax
+; X86-NEXT: bsrl %ecx, %esi
+; X86-NEXT: xorl $31, %esi
+; X86-NEXT: orl $32, %esi
; X86-NEXT: jmp .LBB0_3
; X86-NEXT: .LBB0_1:
-; X86-NEXT: bsrl %ecx, %eax
-; X86-NEXT: xorl $31, %eax
+; X86-NEXT: bsrl %eax, %esi
+; X86-NEXT: xorl $31, %esi
; X86-NEXT: .LBB0_3: # %BB_udiv-special-cases
-; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: shll $30, %esi
+; X86-NEXT: movl %edi, %edx
+; X86-NEXT: shll $30, %edx
; X86-NEXT: jne .LBB0_4
; X86-NEXT: # %bb.5: # %BB_udiv-special-cases
-; X86-NEXT: movl $64, %esi
-; X86-NEXT: orl %ecx, %edx
+; X86-NEXT: movl $64, %edx
+; X86-NEXT: orl %eax, %ecx
; X86-NEXT: je .LBB0_7
; X86-NEXT: jmp .LBB0_8
; X86-NEXT: .LBB0_4:
-; X86-NEXT: bsrl %esi, %esi
-; X86-NEXT: xorl $31, %esi
-; X86-NEXT: orl %ecx, %edx
+; X86-NEXT: bsrl %edx, %edx
+; X86-NEXT: xorl $31, %edx
+; X86-NEXT: orl %eax, %ecx
; X86-NEXT: jne .LBB0_8
; X86-NEXT: .LBB0_7: # %BB_udiv-special-cases
-; X86-NEXT: addl $64, %esi
-; X86-NEXT: movl %esi, %eax
+; X86-NEXT: addl $64, %edx
+; X86-NEXT: movl %edx, %esi
; X86-NEXT: .LBB0_8: # %BB_udiv-special-cases
-; X86-NEXT: addl $-66, %eax
+; X86-NEXT: movl %esi, %edx
+; X86-NEXT: addl $-66, %edx
; X86-NEXT: movl $0, %ebx
; X86-NEXT: adcl $-1, %ebx
; X86-NEXT: movl $0, %esi
; X86-NEXT: adcl $3, %esi
; X86-NEXT: andl $3, %esi
-; X86-NEXT: movb $1, %cl
-; X86-NEXT: testb %cl, %cl
+; X86-NEXT: movb $1, %al
+; X86-NEXT: testb %al, %al
; X86-NEXT: jne .LBB0_10
; X86-NEXT: # %bb.9: # %select.false.sink
-; X86-NEXT: xorl %ecx, %ecx
-; X86-NEXT: movl $65, %edx
-; X86-NEXT: cmpl %eax, %edx
-; X86-NEXT: movl $0, %edx
-; X86-NEXT: sbbl %ebx, %edx
-; X86-NEXT: movl $0, %edx
-; X86-NEXT: sbbl %esi, %edx
-; X86-NEXT: sbbl %ecx, %ecx
-; X86-NEXT: setb %cl
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: movl $65, %ecx
+; X86-NEXT: cmpl %edx, %ecx
+; X86-NEXT: movl $0, %ecx
+; X86-NEXT: sbbl %ebx, %ecx
+; X86-NEXT: movl $0, %ecx
+; X86-NEXT: sbbl %esi, %ecx
+; X86-NEXT: sbbl %eax, %eax
+; X86-NEXT: setb %al
; X86-NEXT: .LBB0_10: # %select.end
-; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: testb %cl, %cl
+; X86-NEXT: testb %al, %al
; X86-NEXT: jne .LBB0_15
; X86-NEXT: # %bb.11: # %select.end
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: xorl $65, %ecx
-; X86-NEXT: orl %esi, %ecx
-; X86-NEXT: orl %ebx, %ecx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: xorl $65, %eax
+; X86-NEXT: orl %esi, %eax
+; X86-NEXT: orl %ebx, %eax
; X86-NEXT: je .LBB0_15
; X86-NEXT: # %bb.12: # %udiv-bb1
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: addl $1, %ecx
-; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: addl $1, %edx
+; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: adcl $0, %ebx
; X86-NEXT: adcl $0, %esi
; X86-NEXT: andl $3, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: movb $65, %cl
-; X86-NEXT: subb %al, %cl
-; X86-NEXT: movl %ecx, %eax
-; X86-NEXT: shrb $3, %al
-; X86-NEXT: andb $12, %al
-; X86-NEXT: negb %al
-; X86-NEXT: movsbl %al, %edx
-; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl 128(%esp,%edx), %eax
-; X86-NEXT: movl 132(%esp,%edx), %edi
-; X86-NEXT: movl 136(%esp,%edx), %edx
-; X86-NEXT: shldl %cl, %edi, %edx
-; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: shldl %cl, %eax, %edi
-; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: shll %cl, %eax
-; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: movl %edx, %eax
; X86-NEXT: orl %esi, %eax
-; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: orl %ebx, %eax
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: je .LBB0_15
; X86-NEXT: # %bb.13: # %udiv-preheader
-; X86-NEXT: andl $3, %esi
-; X86-NEXT: andl $3, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
-; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
-; X86-NEXT: movl %ecx, %eax
-; X86-NEXT: shrb $3, %al
-; X86-NEXT: andb $12, %al
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movl 88(%esp,%eax), %edi
-; X86-NEXT: movl 80(%esp,%eax), %ebx
-; X86-NEXT: movl 84(%esp,%eax), %eax
-; X86-NEXT: movl %eax, %edx
-; X86-NEXT: shrdl %cl, %edi, %edx
-; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: # kill: def $cl killed $cl killed $ecx
-; X86-NEXT: shrdl %cl, %eax, %ebx
+; X86-NEXT: andl $3, %eax
+; X86-NEXT: xorl %ecx, %ecx
; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
-; X86-NEXT: addl $-1, %eax
+; X86-NEXT: movl %edi, %edx
+; X86-NEXT: addl $-1, %edx
+; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
+; X86-NEXT: adcl $-1, %edx
+; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
-; X86-NEXT: adcl $-1, %eax
+; X86-NEXT: adcl $3, %eax
+; X86-NEXT: andl $3, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: adcl $3, %esi
-; X86-NEXT: andl $3, %esi
-; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
-; X86-NEXT: xorl %ecx, %ecx
+; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; X86-NEXT: xorl %esi, %esi
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB0_14: # %udiv-do-while
; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
-; X86-NEXT: shldl $1, %edx, %ecx
-; X86-NEXT: shldl $1, %ebx, %edx
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
-; X86-NEXT: movl %edi, %esi
-; X86-NEXT: andl $2, %esi
-; X86-NEXT: shrl %esi
-; X86-NEXT: leal (%esi,%ebx,2), %ebx
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
-; X86-NEXT: shldl $1, %esi, %edi
-; X86-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
-; X86-NEXT: shldl $1, %eax, %esi
-; X86-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: addl %eax, %eax
-; X86-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
-; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: andl $3, %edi
-; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: cmpl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
-; X86-NEXT: sbbl %edx, %esi
+; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: shldl $1, %esi, %eax
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
-; X86-NEXT: sbbl %ecx, %esi
-; X86-NEXT: shll $30, %esi
-; X86-NEXT: movl %esi, %edi
-; X86-NEXT: sarl $31, %edi
-; X86-NEXT: sarl $30, %esi
-; X86-NEXT: shrdl $1, %edi, %esi
-; X86-NEXT: movl %esi, %eax
-; X86-NEXT: andl $1, %eax
-; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: andl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Folded Reload
-; X86-NEXT: movl %edi, %eax
-; X86-NEXT: andl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
-; X86-NEXT: andl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
-; X86-NEXT: subl %esi, %ebx
+; X86-NEXT: shldl $1, %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: andl $2, %edx
+; X86-NEXT: shrl %edx
+; X86-NEXT: leal (%edx,%esi,2), %esi
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
+; X86-NEXT: shldl $1, %edi, %ecx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
+; X86-NEXT: orl %edx, %ecx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
+; X86-NEXT: shldl $1, %ebx, %edi
+; X86-NEXT: orl %edx, %edi
+; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: addl %ebx, %ebx
+; X86-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: sbbl %edi, %edx
-; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: sbbl %eax, %ecx
; X86-NEXT: andl $3, %ecx
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
-; X86-NEXT: addl $-1, %eax
+; X86-NEXT: cmpl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
+; X86-NEXT: sbbl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
+; X86-NEXT: sbbl %eax, %edx
+; X86-NEXT: shll $30, %edx
+; X86-NEXT: movl %edx, %ebx
+; X86-NEXT: sarl $31, %ebx
+; X86-NEXT: sarl $30, %edx
+; X86-NEXT: shrdl $1, %ebx, %edx
+; X86-NEXT: movl %edx, %edi
+; X86-NEXT: andl $1, %edi
+; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: andl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
+; X86-NEXT: movl %ebx, %edi
+; X86-NEXT: andl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
+; X86-NEXT: andl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
+; X86-NEXT: subl %edx, %esi
+; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
-; X86-NEXT: adcl $-1, %esi
+; X86-NEXT: sbbl %ebx, %esi
+; X86-NEXT: sbbl %edi, %eax
+; X86-NEXT: andl $3, %eax
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
+; X86-NEXT: addl $-1, %edx
+; X86-NEXT: adcl $-1, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X86-NEXT: adcl $3, %ebx
; X86-NEXT: andl $3, %ebx
-; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: orl %ebx, %eax
+; X86-NEXT: orl %ebx, %edx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
-; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: orl %esi, %eax
+; X86-NEXT: orl %ebx, %edx
; X86-NEXT: jne .LBB0_14
; X86-NEXT: .LBB0_15: # %udiv-end
; X86-NEXT: cmpb $0, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Reload
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