[llvm] [Mips] Add lowerConstantFP to optimize some floating load instrs to mtc1+mthc1 (PR #196226)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp -- llvm/lib/Target/Mips/MipsISelLowering.cpp llvm/lib/Target/Mips/MipsISelLowering.h --diff_from_common_commit
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``````````diff
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 1ac9ca19e..aa3e0bc5a 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -2131,7 +2131,8 @@ SDValue MipsTargetLowering::lowerConstantFP(SDValue Op,
 
     // TODO: DAG.getConstant(0) should be optimized to avoid generate an extra
     // instr `addiu $x, $zero, 0`.
-    SDValue Low = DAG.getCopyFromReg(DAG.getEntryNode(), DL, Mips::ZERO, MVT::i32);
+    SDValue Low =
+        DAG.getCopyFromReg(DAG.getEntryNode(), DL, Mips::ZERO, MVT::i32);
     SDValue Hi = DAG.getConstant(INTVal.extractBits(32, 32), DL, MVT::i32);
     return DAG.getNode(MipsISD::BuildPairF64, DL, MVT::f64, Low, Hi);
   }

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https://github.com/llvm/llvm-project/pull/196226