[llvm] [RISCV] Reject XTHeadMemIdx load-update with rd == rs1 (PR #225271)

[Zeyi Xu via llvm-commits]

zeyi2 wrote:

> How is this checked in the disassembler?

Sorry, "correct" was inaccurate wording on my side. What I meant was that the disassembler follows the existing way of handling this, consistent with the `TH_LDD / TH_LWUD / TH_LWD` overlap check just below. (Since those existing checks also do not have corresponding checks in the disassembler, I did not consider this a blocker at that time).

I'll add the disassembler checks for all these instructions later in this PR.

https://github.com/llvm/llvm-project/pull/225271