[llvm] [RISCV] Fix scalable expandload lowering for i8 types (PR #225141)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 21 11:49:33 PDT 2026
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@@ -15342,7 +15342,10 @@ SDValue RISCVTargetLowering::lowerMaskedLoad(SDValue Op,
// If index vector is an i8 vector and the element count exceeds 256, we
// should change the element type of index vector to i16 to avoid
// overflow.
- if (IndexEltVT == MVT::i8 && VT.getVectorNumElements() > 256) {
+ uint64_t MaxEltCount = VT.getVectorMinNumElements();
+ if (VT.isScalableVector())
+ MaxEltCount *= Subtarget.getRealMaxVLen() / RISCV::RVVBitsPerBlock;
+ if (IndexEltVT == MVT::i8 && MaxEltCount > 256) {
// FIXME: We need to do vector splitting manually for LMUL=8 cases.
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topperc wrote:
Is this FIXME still relevant?
https://github.com/llvm/llvm-project/pull/225141
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