[llvm] [RISCV] Eliminate redundant VSLIDEDOWN_VL/VSLIDEUP_VL pairs (PR #223863)
Min-Yih Hsu via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 21 09:55:04 PDT 2026
https://github.com/mshockwave updated https://github.com/llvm/llvm-project/pull/223863
>From 0f439ac5cb85fdc0fe6df193cb579491e1133ed5 Mon Sep 17 00:00:00 2001
From: Min-Yih Hsu <min.hsu at sifive.com>
Date: Tue, 15 Sep 2026 12:35:03 -0700
Subject: [PATCH 1/8] [RISCV] Eliminate redundant VSLIDEDOWN_VL/VSLIDEUP_VL
pairs
---
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 58 ++-
.../CodeGen/RISCV/rvv/vector-interleave.ll | 372 +++++++-----------
2 files changed, 202 insertions(+), 228 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 2c05e3000c5eb..e3c5a301f0b44 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -22265,6 +22265,60 @@ static SDValue performVECTOR_INTERLEAVECombine(SDNode *N, SelectionDAG &DAG) {
return DAG.getMergeValues(Operands, DL);
}
+static SDValue performVSlideUpDownCombine(SDNode *N, SelectionDAG &DAG,
+ const RISCVSubtarget &Subtarget) {
+ unsigned Opcode = N->getOpcode();
+ assert(Opcode == RISCVISD::VSLIDEUP_VL || Opcode == RISCVISD::VSLIDEDOWN_VL);
+ SDValue Passthru = N->getOperand(0);
+ SDValue Val = N->getOperand(1);
+ SDValue ShiftAmt = N->getOperand(2);
+ SDValue Mask = N->getOperand(3);
+ SDValue VL = N->getOperand(4);
+
+ // Trivial case.
+ if (N->getOperand(1)->isUndef())
+ return N->getOperand(0);
+
+ // Given this pattern
+ // ```
+ // %down = RISCVISD::VSLIDEDOWN_VL undef, %val, %shift, %mask, %vl0
+ // %up = RISCVISD::VSLIDEUP_VL %val, %down, %shift, %mask, %vl1
+ // ```
+ // We can simplify it with `%val`, as it's doing redundant shifting.
+ // Note that we actually don't need to check their VLs: First, VSLIDEUP_VL
+ // is literally just putting %down back to their original position in %val.
+ // The only situation we need to worry about is actually the zeros shifted
+ // into VSLIDEDOWN_VL. In this scenario, the worst case would be %vl0 = VLMAX,
+ // as %down is gaurantee to have those zeros. Our goal here is to ensure
+ // elements from %down that are actually inserted into %up are not those
+ // zeros. The number of %down that are actually inserted would be `%vl1 -
+ // %shift`, and the number of non-zero elements from %down would be `VLMAX -
+ // %shift`. Therefore, the invariant would be
+ // `%vl1 - %shift <= VLMAX - %shift` ---> `%vl1 <= VLMAX`
+ // Thus, we will never read those zeros that are shifted in by VSLIDEDOWN_VL.
+ if (Opcode != RISCVISD::VSLIDEUP_VL || !Val ||
+ Val->getOpcode() != RISCVISD::VSLIDEDOWN_VL)
+ return SDValue();
+
+ SDValue SlideDown = Val;
+ SDValue SlideDownPassthru = SlideDown->getOperand(0);
+ SDValue SlideDownVal = SlideDown->getOperand(1);
+ SDValue SlideDownShiftAmt = SlideDown->getOperand(2);
+ SDValue SlideDownMask = SlideDown->getOperand(3);
+ SDValue SlideDownVL = SlideDown->getOperand(4);
+ if (!SlideDownPassthru.isUndef() || SlideDownVal != Passthru ||
+ SlideDownShiftAmt != ShiftAmt)
+ return SDValue();
+ // We can loosen the mask requirement in the future.
+ if (SlideDownMask != Mask &&
+ (SlideDownMask.getOpcode() != RISCVISD::VMSET_VL ||
+ Mask.getOpcode() != RISCVISD::VMSET_VL ||
+ SlideDownMask.getOperand(0) != SlideDownVL || Mask.getOperand(0) != VL))
+ return SDValue();
+
+ return SlideDownVal;
+}
+
// Convert from one FMA opcode to another based on whether we are negating the
// multiply result and/or the accumulator.
// NOTE: Only supports RVV operations with VL.
@@ -25562,9 +25616,7 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N,
}
case RISCVISD::VSLIDEDOWN_VL:
case RISCVISD::VSLIDEUP_VL:
- if (N->getOperand(1)->isUndef())
- return N->getOperand(0);
- break;
+ return performVSlideUpDownCombine(N, DAG, Subtarget);
case RISCVISD::VSLIDE1UP_VL:
case RISCVISD::VFSLIDE1UP_VL: {
using namespace SDPatternMatch;
diff --git a/llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll b/llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
index 6fb9b73783d43..e1ae4595f363e 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
@@ -58,9 +58,7 @@ define <vscale x 32 x i1> @vector_interleave_nxv32i1_nxv16i1(<vscale x 16 x i1>
; ZVZIP-NEXT: vmerge.vim v12, v10, 1, v0
; ZVZIP-NEXT: vmv1r.v v0, v9
; ZVZIP-NEXT: vmerge.vim v14, v10, 1, v0
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vmsne.vi v12, v10, 0
; ZVZIP-NEXT: vmsne.vi v0, v8, 0
; ZVZIP-NEXT: csrr a0, vlenb
@@ -94,7 +92,7 @@ define <vscale x 32 x i8> @vector_interleave_nxv32i8_nxv16i8(<vscale x 16 x i8>
;
; ZVZIP-LABEL: vector_interleave_nxv32i8_nxv16i8:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vmv2r.v v12, v10
; ZVZIP-NEXT: vmv2r.v v14, v8
; ZVZIP-NEXT: vzip.vv v8, v14, v12
@@ -125,7 +123,7 @@ define <vscale x 16 x i16> @vector_interleave_nxv16i16_nxv8i16(<vscale x 8 x i16
;
; ZVZIP-LABEL: vector_interleave_nxv16i16_nxv8i16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vmv2r.v v12, v10
; ZVZIP-NEXT: vmv2r.v v14, v8
; ZVZIP-NEXT: vzip.vv v8, v14, v12
@@ -157,7 +155,7 @@ define <vscale x 8 x i32> @vector_interleave_nxv8i32_nxv4i32(<vscale x 4 x i32>
;
; ZVZIP-LABEL: vector_interleave_nxv8i32_nxv4i32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vmv2r.v v12, v10
; ZVZIP-NEXT: vmv2r.v v14, v8
; ZVZIP-NEXT: vzip.vv v8, v14, v12
@@ -199,7 +197,7 @@ define <vscale x 4 x i64> @vector_interleave_nxv4i64_nxv2i64(<vscale x 2 x i64>
;
; ZVZIP-LABEL: vector_interleave_nxv4i64_nxv2i64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
; ZVZIP-NEXT: vmv2r.v v12, v10
; ZVZIP-NEXT: vmv2r.v v14, v8
; ZVZIP-NEXT: vzip.vv v8, v14, v12
@@ -260,9 +258,13 @@ define <vscale x 128 x i1> @vector_interleave_nxv128i1_nxv64i1(<vscale x 64 x i1
; ZVZIP-NEXT: vmerge.vim v16, v24, 1, v0
; ZVZIP-NEXT: vmv1r.v v0, v9
; ZVZIP-NEXT: vmerge.vim v8, v24, 1, v0
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vmsne.vi v0, v24, 0
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v12, v20
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vmsne.vi v8, v24, 0
; ZVZIP-NEXT: ret
%res = call <vscale x 128 x i1> @llvm.vector.interleave2.nxv128i1(<vscale x 64 x i1> %a, <vscale x 64 x i1> %b)
@@ -295,11 +297,11 @@ define <vscale x 128 x i8> @vector_interleave_nxv128i8_nxv64i8(<vscale x 64 x i8
;
; ZVZIP-LABEL: vector_interleave_nxv128i8_nxv64i8:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: vzip.vv v0, v12, v20
-; ZVZIP-NEXT: vmv.v.v v8, v24
-; ZVZIP-NEXT: vmv.v.v v16, v0
+; ZVZIP-NEXT: vmv8r.v v8, v24
+; ZVZIP-NEXT: vmv8r.v v16, v0
; ZVZIP-NEXT: ret
%res = call <vscale x 128 x i8> @llvm.vector.interleave2.nxv128i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %b)
ret <vscale x 128 x i8> %res
@@ -331,11 +333,11 @@ define <vscale x 64 x i16> @vector_interleave_nxv64i16_nxv32i16(<vscale x 32 x i
;
; ZVZIP-LABEL: vector_interleave_nxv64i16_nxv32i16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: vzip.vv v0, v12, v20
-; ZVZIP-NEXT: vmv.v.v v8, v24
-; ZVZIP-NEXT: vmv.v.v v16, v0
+; ZVZIP-NEXT: vmv8r.v v8, v24
+; ZVZIP-NEXT: vmv8r.v v16, v0
; ZVZIP-NEXT: ret
%res = call <vscale x 64 x i16> @llvm.vector.interleave2.nxv64i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b)
ret <vscale x 64 x i16> %res
@@ -368,11 +370,11 @@ define <vscale x 32 x i32> @vector_interleave_nxv32i32_nxv16i32(<vscale x 16 x i
;
; ZVZIP-LABEL: vector_interleave_nxv32i32_nxv16i32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: vzip.vv v0, v12, v20
-; ZVZIP-NEXT: vmv.v.v v8, v24
-; ZVZIP-NEXT: vmv.v.v v16, v0
+; ZVZIP-NEXT: vmv8r.v v8, v24
+; ZVZIP-NEXT: vmv8r.v v16, v0
; ZVZIP-NEXT: ret
%res = call <vscale x 32 x i32> @llvm.vector.interleave2.nxv32i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b)
ret <vscale x 32 x i32> %res
@@ -423,11 +425,11 @@ define <vscale x 16 x i64> @vector_interleave_nxv16i64_nxv8i64(<vscale x 8 x i64
;
; ZVZIP-LABEL: vector_interleave_nxv16i64_nxv8i64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: vzip.vv v0, v12, v20
-; ZVZIP-NEXT: vmv.v.v v8, v24
-; ZVZIP-NEXT: vmv.v.v v16, v0
+; ZVZIP-NEXT: vmv8r.v v8, v24
+; ZVZIP-NEXT: vmv8r.v v16, v0
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x i64> @llvm.vector.interleave2.nxv16i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b)
ret <vscale x 16 x i64> %res
@@ -869,9 +871,7 @@ define <vscale x 64 x i1> @vector_interleave_nxv64i1_nxv16i1(<vscale x 16 x i1>
; ZVZIP-NEXT: vmerge.vim v16, v20, 1, v0
; ZVZIP-NEXT: vmv1r.v v0, v8
; ZVZIP-NEXT: vmerge.vim v18, v20, 1, v0
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v18, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vmsne.vi v8, v14, 0
; ZVZIP-NEXT: vmsne.vi v0, v12, 0
; ZVZIP-NEXT: csrr a0, vlenb
@@ -886,18 +886,14 @@ define <vscale x 64 x i1> @vector_interleave_nxv64i1_nxv16i1(<vscale x 16 x i1>
; ZVZIP-NEXT: vmerge.vim v22, v20, 1, v0
; ZVZIP-NEXT: vmv1r.v v0, v11
; ZVZIP-NEXT: vmerge.vim v20, v20, 1, v0
-; ZVZIP-NEXT: vsetvli a2, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v22
-; ZVZIP-NEXT: vsetvli a2, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vmsne.vi v20, v10, 0
; ZVZIP-NEXT: vmsne.vi v0, v8, 0
; ZVZIP-NEXT: vsetvli a2, zero, e8, mf2, ta, ma
; ZVZIP-NEXT: vslideup.vx v0, v20, a1
; ZVZIP-NEXT: vsetvli a1, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vmerge.vim v20, v12, 1, v0
-; ZVZIP-NEXT: vsetvli a1, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
-; ZVZIP-NEXT: vsetvli a1, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vmsne.vi v16, v12, 0
; ZVZIP-NEXT: vmsne.vi v0, v8, 0
; ZVZIP-NEXT: srli a0, a0, 1
@@ -960,10 +956,10 @@ define <vscale x 64 x i8> @vector_interleave_nxv64i8_nxv16i8(<vscale x 16 x i8>
;
; ZVZIP-LABEL: vector_interleave_nxv64i8_nxv16i8:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v10, v14
; ZVZIP-NEXT: vzip.vv v20, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 64 x i8> @llvm.vector.interleave4.nxv64i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c, <vscale x 16 x i8> %d)
@@ -1019,10 +1015,10 @@ define <vscale x 32 x i8> @vector_interleave_nxv32i8_nxv8i8(<vscale x 8 x i8> %a
;
; ZVZIP-LABEL: vector_interleave_nxv32i8_nxv8i8:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v14, v8, v10
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 32 x i8> @llvm.vector.interleave4.nxv32i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b, <vscale x 8 x i8> %c, <vscale x 8 x i8> %d)
@@ -1081,10 +1077,10 @@ define <vscale x 16 x i32> @vector_interleave_nxv16i32_nxv4i32(<vscale x 4 x i32
;
; ZVZIP-LABEL: vector_interleave_nxv16i32_nxv4i32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v10, v14
; ZVZIP-NEXT: vzip.vv v20, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x i32> @llvm.vector.interleave4.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c, <vscale x 4 x i32> %d)
@@ -1143,10 +1139,10 @@ define <vscale x 8 x i64> @vector_interleave_nxv8i64_nxv2i64(<vscale x 2 x i64>
;
; ZVZIP-LABEL: vector_interleave_nxv8i64_nxv2i64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v10, v14
; ZVZIP-NEXT: vzip.vv v20, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 8 x i64> @llvm.vector.interleave4.nxv8i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i64> %c, <vscale x 2 x i64> %d)
@@ -5731,9 +5727,7 @@ define <vscale x 128 x i1> @vector_interleave_nxv128i1_nxv16i1(<vscale x 16 x i1
; ZVZIP-NEXT: vmerge.vim v20, v2, 1, v0
; ZVZIP-NEXT: vmv1r.v v0, v10
; ZVZIP-NEXT: vmerge.vim v22, v2, 1, v0
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v22, v20
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vmsne.vi v10, v18, 0
; ZVZIP-NEXT: vmsne.vi v0, v16, 0
; ZVZIP-NEXT: csrr a1, vlenb
@@ -5748,18 +5742,14 @@ define <vscale x 128 x i1> @vector_interleave_nxv128i1_nxv16i1(<vscale x 16 x i1
; ZVZIP-NEXT: vmerge.vim v24, v2, 1, v0
; ZVZIP-NEXT: vmv1r.v v0, v14
; ZVZIP-NEXT: vmerge.vim v14, v2, 1, v0
-; ZVZIP-NEXT: vsetvli a2, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v20, v14, v24
-; ZVZIP-NEXT: vsetvli a2, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vmsne.vi v10, v22, 0
; ZVZIP-NEXT: vmsne.vi v0, v20, 0
; ZVZIP-NEXT: vsetvli a2, zero, e8, mf2, ta, ma
; ZVZIP-NEXT: vslideup.vx v0, v10, a0
; ZVZIP-NEXT: vsetvli a2, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vmerge.vim v20, v4, 1, v0
-; ZVZIP-NEXT: vsetvli a2, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v20, v16
-; ZVZIP-NEXT: vsetvli a2, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vmsne.vi v10, v28, 0
; ZVZIP-NEXT: vmsne.vi v0, v24, 0
; ZVZIP-NEXT: srli a1, a1, 1
@@ -5773,9 +5763,7 @@ define <vscale x 128 x i1> @vector_interleave_nxv128i1_nxv16i1(<vscale x 16 x i1
; ZVZIP-NEXT: vmerge.vim v16, v2, 1, v0
; ZVZIP-NEXT: vmv1r.v v0, v9
; ZVZIP-NEXT: vmerge.vim v18, v2, 1, v0
-; ZVZIP-NEXT: vsetvli a2, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v18, v16
-; ZVZIP-NEXT: vsetvli a2, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vmsne.vi v9, v14, 0
; ZVZIP-NEXT: vmsne.vi v0, v12, 0
; ZVZIP-NEXT: vsetvli a2, zero, e8, mf2, ta, ma
@@ -5787,18 +5775,14 @@ define <vscale x 128 x i1> @vector_interleave_nxv128i1_nxv16i1(<vscale x 16 x i1
; ZVZIP-NEXT: vmerge.vim v12, v2, 1, v0
; ZVZIP-NEXT: vmv1r.v v0, v8
; ZVZIP-NEXT: vmerge.vim v14, v2, 1, v0
-; ZVZIP-NEXT: vsetvli a2, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
-; ZVZIP-NEXT: vsetvli a2, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vmsne.vi v12, v10, 0
; ZVZIP-NEXT: vmsne.vi v0, v8, 0
; ZVZIP-NEXT: vsetvli a2, zero, e8, mf2, ta, ma
; ZVZIP-NEXT: vslideup.vx v0, v12, a0
; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vmerge.vim v20, v4, 1, v0
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vmsne.vi v16, v12, 0
; ZVZIP-NEXT: vmsne.vi v0, v8, 0
; ZVZIP-NEXT: vsetvli a0, zero, e8, m1, ta, ma
@@ -5806,9 +5790,13 @@ define <vscale x 128 x i1> @vector_interleave_nxv128i1_nxv16i1(<vscale x 16 x i1
; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vmv.v.i v8, 0
; ZVZIP-NEXT: vmerge.vim v8, v8, 1, v0
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v8, v24
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vmsne.vi v0, v16, 0
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v12, v28
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vmsne.vi v8, v16, 0
; ZVZIP-NEXT: ret
%res = call <vscale x 128 x i1> @llvm.vector.interleave8.nxv128i1(<vscale x 16 x i1> %a, <vscale x 16 x i1> %b, <vscale x 16 x i1> %c, <vscale x 16 x i1> %d, <vscale x 16 x i1> %e, <vscale x 16 x i1> %f, <vscale x 16 x i1> %g, <vscale x 16 x i1> %h)
@@ -5954,17 +5942,17 @@ define <vscale x 128 x i8> @vector_interleave_nxv128i8_nxv16i8(<vscale x 16 x i8
;
; ZVZIP-LABEL: vector_interleave_nxv128i8_nxv16i8:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vmv2r.v v24, v22
; ZVZIP-NEXT: vmv2r.v v22, v8
; ZVZIP-NEXT: vzip.vv v4, v14, v24
; ZVZIP-NEXT: vzip.vv v0, v10, v18
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v0, v4
; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v24, v0, v4
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v12, v20
; ZVZIP-NEXT: vzip.vv v12, v22, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v12, v8
; ZVZIP-NEXT: vzip.vv v8, v0, v24
; ZVZIP-NEXT: vzip.vv v16, v4, v28
@@ -6112,17 +6100,17 @@ define <vscale x 64 x i16> @vector_interleave_nxv64i16_nxv8i16(<vscale x 8 x i16
;
; ZVZIP-LABEL: vector_interleave_nxv64i16_nxv8i16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vmv2r.v v24, v22
; ZVZIP-NEXT: vmv2r.v v22, v8
; ZVZIP-NEXT: vzip.vv v4, v14, v24
; ZVZIP-NEXT: vzip.vv v0, v10, v18
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v0, v4
; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v24, v0, v4
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v12, v20
; ZVZIP-NEXT: vzip.vv v12, v22, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v12, v8
; ZVZIP-NEXT: vzip.vv v8, v0, v24
; ZVZIP-NEXT: vzip.vv v16, v4, v28
@@ -6270,17 +6258,17 @@ define <vscale x 32 x i32> @vector_interleave_nxv32i32_nxv4i32(<vscale x 4 x i32
;
; ZVZIP-LABEL: vector_interleave_nxv32i32_nxv4i32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vmv2r.v v24, v22
; ZVZIP-NEXT: vmv2r.v v22, v8
; ZVZIP-NEXT: vzip.vv v4, v14, v24
; ZVZIP-NEXT: vzip.vv v0, v10, v18
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v0, v4
; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v24, v0, v4
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v12, v20
; ZVZIP-NEXT: vzip.vv v12, v22, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v12, v8
; ZVZIP-NEXT: vzip.vv v8, v0, v24
; ZVZIP-NEXT: vzip.vv v16, v4, v28
@@ -6427,17 +6415,17 @@ define <vscale x 16 x i64> @vector_interleave_nxv16i64_nxv2i64(<vscale x 2 x i64
;
; ZVZIP-LABEL: vector_interleave_nxv16i64_nxv2i64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
; ZVZIP-NEXT: vmv2r.v v24, v22
; ZVZIP-NEXT: vmv2r.v v22, v8
; ZVZIP-NEXT: vzip.vv v4, v14, v24
; ZVZIP-NEXT: vzip.vv v0, v10, v18
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v0, v4
; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v24, v0, v4
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v12, v20
; ZVZIP-NEXT: vzip.vv v12, v22, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v12, v8
; ZVZIP-NEXT: vzip.vv v8, v0, v24
; ZVZIP-NEXT: vzip.vv v16, v4, v28
@@ -6478,13 +6466,9 @@ define <vscale x 4 x bfloat> @vector_interleave_nxv4bf16_nxv2bf16(<vscale x 2 x
;
; ZVZIP-LABEL: vector_interleave_nxv4bf16_nxv2bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
; ZVZIP-NEXT: vzip.vv v10, v8, v9
-; ZVZIP-NEXT: csrr a0, vlenb
-; ZVZIP-NEXT: srli a0, a0, 2
-; ZVZIP-NEXT: vslidedown.vx v8, v10, a0
-; ZVZIP-NEXT: vslideup.vx v10, v8, a0
-; ZVZIP-NEXT: vmv.v.v v8, v10
+; ZVZIP-NEXT: vmv1r.v v8, v10
; ZVZIP-NEXT: ret
%res = call <vscale x 4 x bfloat> @llvm.vector.interleave2.nxv4bf16(<vscale x 2 x bfloat> %a, <vscale x 2 x bfloat> %b)
ret <vscale x 4 x bfloat> %res
@@ -6512,7 +6496,7 @@ define <vscale x 8 x bfloat> @vector_interleave_nxv8bf16_nxv4bf16(<vscale x 4 x
;
; ZVZIP-LABEL: vector_interleave_nxv8bf16_nxv4bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vmv1r.v v10, v9
; ZVZIP-NEXT: vmv1r.v v11, v8
; ZVZIP-NEXT: vzip.vv v8, v11, v10
@@ -6551,13 +6535,9 @@ define <vscale x 4 x half> @vector_interleave_nxv4f16_nxv2f16(<vscale x 2 x half
;
; ZVZIP-LABEL: vector_interleave_nxv4f16_nxv2f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
; ZVZIP-NEXT: vzip.vv v10, v8, v9
-; ZVZIP-NEXT: csrr a0, vlenb
-; ZVZIP-NEXT: srli a0, a0, 2
-; ZVZIP-NEXT: vslidedown.vx v8, v10, a0
-; ZVZIP-NEXT: vslideup.vx v10, v8, a0
-; ZVZIP-NEXT: vmv.v.v v8, v10
+; ZVZIP-NEXT: vmv1r.v v8, v10
; ZVZIP-NEXT: ret
%res = call <vscale x 4 x half> @llvm.vector.interleave2.nxv4f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b)
ret <vscale x 4 x half> %res
@@ -6585,7 +6565,7 @@ define <vscale x 8 x half> @vector_interleave_nxv8f16_nxv4f16(<vscale x 4 x half
;
; ZVZIP-LABEL: vector_interleave_nxv8f16_nxv4f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vmv1r.v v10, v9
; ZVZIP-NEXT: vmv1r.v v11, v8
; ZVZIP-NEXT: vzip.vv v8, v11, v10
@@ -6617,7 +6597,7 @@ define <vscale x 4 x float> @vector_interleave_nxv4f32_nxv2f32(<vscale x 2 x flo
;
; ZVZIP-LABEL: vector_interleave_nxv4f32_nxv2f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m1, ta, ma
; ZVZIP-NEXT: vmv1r.v v10, v9
; ZVZIP-NEXT: vmv1r.v v11, v8
; ZVZIP-NEXT: vzip.vv v8, v11, v10
@@ -6648,7 +6628,7 @@ define <vscale x 16 x bfloat> @vector_interleave_nxv16bf16_nxv8bf16(<vscale x 8
;
; ZVZIP-LABEL: vector_interleave_nxv16bf16_nxv8bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vmv2r.v v12, v10
; ZVZIP-NEXT: vmv2r.v v14, v8
; ZVZIP-NEXT: vzip.vv v8, v14, v12
@@ -6679,7 +6659,7 @@ define <vscale x 16 x half> @vector_interleave_nxv16f16_nxv8f16(<vscale x 8 x ha
;
; ZVZIP-LABEL: vector_interleave_nxv16f16_nxv8f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vmv2r.v v12, v10
; ZVZIP-NEXT: vmv2r.v v14, v8
; ZVZIP-NEXT: vzip.vv v8, v14, v12
@@ -6711,7 +6691,7 @@ define <vscale x 8 x float> @vector_interleave_nxv8f32_nxv4f32(<vscale x 4 x flo
;
; ZVZIP-LABEL: vector_interleave_nxv8f32_nxv4f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vmv2r.v v12, v10
; ZVZIP-NEXT: vmv2r.v v14, v8
; ZVZIP-NEXT: vzip.vv v8, v14, v12
@@ -6753,7 +6733,7 @@ define <vscale x 4 x double> @vector_interleave_nxv4f64_nxv2f64(<vscale x 2 x do
;
; ZVZIP-LABEL: vector_interleave_nxv4f64_nxv2f64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
; ZVZIP-NEXT: vmv2r.v v12, v10
; ZVZIP-NEXT: vmv2r.v v14, v8
; ZVZIP-NEXT: vzip.vv v8, v14, v12
@@ -6790,11 +6770,11 @@ define <vscale x 64 x bfloat> @vector_interleave_nxv64bf16_nxv32bf16(<vscale x 3
;
; ZVZIP-LABEL: vector_interleave_nxv64bf16_nxv32bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: vzip.vv v0, v12, v20
-; ZVZIP-NEXT: vmv.v.v v8, v24
-; ZVZIP-NEXT: vmv.v.v v16, v0
+; ZVZIP-NEXT: vmv8r.v v8, v24
+; ZVZIP-NEXT: vmv8r.v v16, v0
; ZVZIP-NEXT: ret
%res = call <vscale x 64 x bfloat> @llvm.vector.interleave2.nxv64bf16(<vscale x 32 x bfloat> %a, <vscale x 32 x bfloat> %b)
ret <vscale x 64 x bfloat> %res
@@ -6826,11 +6806,11 @@ define <vscale x 64 x half> @vector_interleave_nxv64f16_nxv32f16(<vscale x 32 x
;
; ZVZIP-LABEL: vector_interleave_nxv64f16_nxv32f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: vzip.vv v0, v12, v20
-; ZVZIP-NEXT: vmv.v.v v8, v24
-; ZVZIP-NEXT: vmv.v.v v16, v0
+; ZVZIP-NEXT: vmv8r.v v8, v24
+; ZVZIP-NEXT: vmv8r.v v16, v0
; ZVZIP-NEXT: ret
%res = call <vscale x 64 x half> @llvm.vector.interleave2.nxv64f16(<vscale x 32 x half> %a, <vscale x 32 x half> %b)
ret <vscale x 64 x half> %res
@@ -6863,11 +6843,11 @@ define <vscale x 32 x float> @vector_interleave_nxv32f32_nxv16f32(<vscale x 16 x
;
; ZVZIP-LABEL: vector_interleave_nxv32f32_nxv16f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: vzip.vv v0, v12, v20
-; ZVZIP-NEXT: vmv.v.v v8, v24
-; ZVZIP-NEXT: vmv.v.v v16, v0
+; ZVZIP-NEXT: vmv8r.v v8, v24
+; ZVZIP-NEXT: vmv8r.v v16, v0
; ZVZIP-NEXT: ret
%res = call <vscale x 32 x float> @llvm.vector.interleave2.nxv32f32(<vscale x 16 x float> %a, <vscale x 16 x float> %b)
ret <vscale x 32 x float> %res
@@ -6918,11 +6898,11 @@ define <vscale x 16 x double> @vector_interleave_nxv16f64_nxv8f64(<vscale x 8 x
;
; ZVZIP-LABEL: vector_interleave_nxv16f64_nxv8f64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: vzip.vv v0, v12, v20
-; ZVZIP-NEXT: vmv.v.v v8, v24
-; ZVZIP-NEXT: vmv.v.v v16, v0
+; ZVZIP-NEXT: vmv8r.v v8, v24
+; ZVZIP-NEXT: vmv8r.v v16, v0
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x double> @llvm.vector.interleave2.nxv16f64(<vscale x 8 x double> %a, <vscale x 8 x double> %b)
ret <vscale x 16 x double> %res
@@ -7567,16 +7547,10 @@ define <vscale x 8 x half> @vector_interleave_nxv8f16_nxv2f16(<vscale x 2 x half
;
; ZVZIP-LABEL: vector_interleave_nxv8f16_nxv2f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: csrr a0, vlenb
-; ZVZIP-NEXT: srli a0, a0, 2
-; ZVZIP-NEXT: vsetvli a1, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v11, v8, v10
-; ZVZIP-NEXT: vslidedown.vx v8, v12, a0
-; ZVZIP-NEXT: vslidedown.vx v9, v11, a0
-; ZVZIP-NEXT: vslideup.vx v12, v8, a0
-; ZVZIP-NEXT: vslideup.vx v11, v9, a0
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v11, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 8 x half> @llvm.vector.interleave4.nxv8f16(<vscale x 2 x half> %v0, <vscale x 2 x half> %v1, <vscale x 2 x half> %v2, <vscale x 2 x half> %v3)
@@ -7632,10 +7606,10 @@ define <vscale x 16 x half> @vector_interleave_nxv16f16_nxv4f16(<vscale x 4 x ha
;
; ZVZIP-LABEL: vector_interleave_nxv16f16_nxv4f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v14, v8, v10
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x half> @llvm.vector.interleave4.nxv16f16(<vscale x 4 x half> %v0, <vscale x 4 x half> %v1, <vscale x 4 x half> %v2, <vscale x 4 x half> %v3)
@@ -7693,10 +7667,10 @@ define <vscale x 32 x half> @vector_interleave_nxv32f16_nxv8f16(<vscale x 8 x ha
;
; ZVZIP-LABEL: vector_interleave_nxv32f16_nxv8f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v10, v14
; ZVZIP-NEXT: vzip.vv v20, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 32 x half> @llvm.vector.interleave4.nxv32f16(<vscale x 8 x half> %v0, <vscale x 8 x half> %v1, <vscale x 8 x half> %v2, <vscale x 8 x half> %v3)
@@ -7766,16 +7740,10 @@ define <vscale x 8 x bfloat> @vector_interleave_nxv8bf16_nxv2bf16(<vscale x 2 x
;
; ZVZIP-LABEL: vector_interleave_nxv8bf16_nxv2bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: csrr a0, vlenb
-; ZVZIP-NEXT: srli a0, a0, 2
-; ZVZIP-NEXT: vsetvli a1, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v11, v8, v10
-; ZVZIP-NEXT: vslidedown.vx v8, v12, a0
-; ZVZIP-NEXT: vslidedown.vx v9, v11, a0
-; ZVZIP-NEXT: vslideup.vx v12, v8, a0
-; ZVZIP-NEXT: vslideup.vx v11, v9, a0
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v11, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 8 x bfloat> @llvm.vector.interleave4.nxv8bf16(<vscale x 2 x bfloat> %v0, <vscale x 2 x bfloat> %v1, <vscale x 2 x bfloat> %v2, <vscale x 2 x bfloat> %v3)
@@ -7831,10 +7799,10 @@ define <vscale x 16 x bfloat> @vector_interleave_nxv16bf16_nxv4bf16(<vscale x 4
;
; ZVZIP-LABEL: vector_interleave_nxv16bf16_nxv4bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v14, v8, v10
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x bfloat> @llvm.vector.interleave4.nxv16bf16(<vscale x 4 x bfloat> %v0, <vscale x 4 x bfloat> %v1, <vscale x 4 x bfloat> %v2, <vscale x 4 x bfloat> %v3)
@@ -7892,10 +7860,10 @@ define <vscale x 32 x bfloat> @vector_interleave_nxv32bf16_nxv8bf16(<vscale x 8
;
; ZVZIP-LABEL: vector_interleave_nxv32bf16_nxv8bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v10, v14
; ZVZIP-NEXT: vzip.vv v20, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 32 x bfloat> @llvm.vector.interleave4.nxv32bf16(<vscale x 8 x bfloat> %v0, <vscale x 8 x bfloat> %v1, <vscale x 8 x bfloat> %v2, <vscale x 8 x bfloat> %v3)
@@ -7965,16 +7933,10 @@ define <vscale x 4 x float> @vector_interleave_nxv4f32_nxv1f32(<vscale x 1 x flo
;
; ZVZIP-LABEL: vector_interleave_nxv4f32_nxv1f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: csrr a0, vlenb
-; ZVZIP-NEXT: srli a0, a0, 3
-; ZVZIP-NEXT: vsetvli a1, zero, e32, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v11, v8, v10
-; ZVZIP-NEXT: vslidedown.vx v8, v12, a0
-; ZVZIP-NEXT: vslidedown.vx v9, v11, a0
-; ZVZIP-NEXT: vslideup.vx v12, v8, a0
-; ZVZIP-NEXT: vslideup.vx v11, v9, a0
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v11, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 4 x float> @llvm.vector.interleave4.nxv4f32(<vscale x 1 x float> %v0, <vscale x 1 x float> %v1, <vscale x 1 x float> %v2, <vscale x 1 x float> %v3)
@@ -8030,10 +7992,10 @@ define <vscale x 8 x float> @vector_interleave_nxv8f32_nxv2f32(<vscale x 2 x flo
;
; ZVZIP-LABEL: vector_interleave_nxv8f32_nxv2f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v14, v8, v10
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 8 x float> @llvm.vector.interleave4.nxv8f32(<vscale x 2 x float> %v0, <vscale x 2 x float> %v1, <vscale x 2 x float> %v2, <vscale x 2 x float> %v3)
@@ -8091,10 +8053,10 @@ define <vscale x 16 x float> @vector_interleave_nxv16f32_nxv4f32(<vscale x 4 x f
;
; ZVZIP-LABEL: vector_interleave_nxv16f32_nxv4f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v10, v14
; ZVZIP-NEXT: vzip.vv v20, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x float> @llvm.vector.interleave4.nxv16f32(<vscale x 4 x float> %v0, <vscale x 4 x float> %v1, <vscale x 4 x float> %v2, <vscale x 4 x float> %v3)
@@ -8150,10 +8112,10 @@ define <vscale x 4 x double> @vector_interleave_nxv4f64_nxv1f64(<vscale x 1 x do
;
; ZVZIP-LABEL: vector_interleave_nxv4f64_nxv1f64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v14, v8, v10
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 4 x double> @llvm.vector.interleave4.nxv4f64(<vscale x 1 x double> %v0, <vscale x 1 x double> %v1, <vscale x 1 x double> %v2, <vscale x 1 x double> %v3)
@@ -8211,10 +8173,10 @@ define <vscale x 8 x double> @vector_interleave_nxv8f64_nxv2f64(<vscale x 2 x do
;
; ZVZIP-LABEL: vector_interleave_nxv8f64_nxv2f64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v10, v14
; ZVZIP-NEXT: vzip.vv v20, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 8 x double> @llvm.vector.interleave4.nxv6f64(<vscale x 2 x double> %v0, <vscale x 2 x double> %v1, <vscale x 2 x double> %v2, <vscale x 2 x double> %v3)
@@ -14178,25 +14140,15 @@ define <vscale x 16 x half> @vector_interleave_nxv16f16_nxv2f16(<vscale x 2 x ha
;
; ZVZIP-LABEL: vector_interleave_nxv16f16_nxv2f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: csrr a0, vlenb
-; ZVZIP-NEXT: srli a0, a0, 2
-; ZVZIP-NEXT: vsetvli a1, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v11, v15
; ZVZIP-NEXT: vzip.vv v11, v9, v13
-; ZVZIP-NEXT: vslidedown.vx v9, v16, a0
-; ZVZIP-NEXT: vzip.vv v17, v10, v14
-; ZVZIP-NEXT: vslidedown.vx v10, v11, a0
-; ZVZIP-NEXT: vzip.vv v18, v8, v12
-; ZVZIP-NEXT: vslidedown.vx v8, v17, a0
-; ZVZIP-NEXT: vslidedown.vx v12, v18, a0
-; ZVZIP-NEXT: vslideup.vx v16, v9, a0
-; ZVZIP-NEXT: vslideup.vx v11, v10, a0
-; ZVZIP-NEXT: vslideup.vx v17, v8, a0
-; ZVZIP-NEXT: vslideup.vx v18, v12, a0
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vzip.vv v9, v10, v14
+; ZVZIP-NEXT: vzip.vv v10, v8, v12
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v11, v16
-; ZVZIP-NEXT: vzip.vv v14, v18, v17
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v14, v10, v9
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x half> @llvm.vector.interleave8.nxv16f16(<vscale x 2 x half> %v0, <vscale x 2 x half> %v1, <vscale x 2 x half> %v2, <vscale x 2 x half> %v3, <vscale x 2 x half> %v4, <vscale x 2 x half> %v5, <vscale x 2 x half> %v6, <vscale x 2 x half> %v7)
@@ -14268,17 +14220,17 @@ define <vscale x 32 x half> @vector_interleave_nxv32f16_nxv4f16(<vscale x 4 x ha
;
; ZVZIP-LABEL: vector_interleave_nxv32f16_nxv4f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v20, v11, v15
; ZVZIP-NEXT: vzip.vv v22, v9, v13
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v22, v20
; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vzip.vv v16, v22, v20
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v10, v14
; ZVZIP-NEXT: vzip.vv v10, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v20, v10, v24
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 32 x half> @llvm.vector.interleave8.nxv32f16(<vscale x 4 x half> %v0, <vscale x 4 x half> %v1, <vscale x 4 x half> %v2, <vscale x 4 x half> %v3, <vscale x 4 x half> %v4, <vscale x 4 x half> %v5, <vscale x 4 x half> %v6, <vscale x 4 x half> %v7)
@@ -14422,17 +14374,17 @@ define <vscale x 64 x half> @vector_interleave_nxv64f16_nxv8f16(<vscale x 8 x ha
;
; ZVZIP-LABEL: vector_interleave_nxv64f16_nxv8f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vmv2r.v v24, v22
; ZVZIP-NEXT: vmv2r.v v22, v8
; ZVZIP-NEXT: vzip.vv v4, v14, v24
; ZVZIP-NEXT: vzip.vv v0, v10, v18
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v0, v4
; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v24, v0, v4
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v12, v20
; ZVZIP-NEXT: vzip.vv v12, v22, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v12, v8
; ZVZIP-NEXT: vzip.vv v8, v0, v24
; ZVZIP-NEXT: vzip.vv v16, v4, v28
@@ -14532,25 +14484,15 @@ define <vscale x 16 x bfloat> @vector_interleave_nxv16bf16_nxv2bf16(<vscale x 2
;
; ZVZIP-LABEL: vector_interleave_nxv16bf16_nxv2bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: csrr a0, vlenb
-; ZVZIP-NEXT: srli a0, a0, 2
-; ZVZIP-NEXT: vsetvli a1, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v11, v15
; ZVZIP-NEXT: vzip.vv v11, v9, v13
-; ZVZIP-NEXT: vslidedown.vx v9, v16, a0
-; ZVZIP-NEXT: vzip.vv v17, v10, v14
-; ZVZIP-NEXT: vslidedown.vx v10, v11, a0
-; ZVZIP-NEXT: vzip.vv v18, v8, v12
-; ZVZIP-NEXT: vslidedown.vx v8, v17, a0
-; ZVZIP-NEXT: vslidedown.vx v12, v18, a0
-; ZVZIP-NEXT: vslideup.vx v16, v9, a0
-; ZVZIP-NEXT: vslideup.vx v11, v10, a0
-; ZVZIP-NEXT: vslideup.vx v17, v8, a0
-; ZVZIP-NEXT: vslideup.vx v18, v12, a0
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vzip.vv v9, v10, v14
+; ZVZIP-NEXT: vzip.vv v10, v8, v12
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v11, v16
-; ZVZIP-NEXT: vzip.vv v14, v18, v17
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v14, v10, v9
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x bfloat> @llvm.vector.interleave8.nxv16bf16(<vscale x 2 x bfloat> %v0, <vscale x 2 x bfloat> %v1, <vscale x 2 x bfloat> %v2, <vscale x 2 x bfloat> %v3, <vscale x 2 x bfloat> %v4, <vscale x 2 x bfloat> %v5, <vscale x 2 x bfloat> %v6, <vscale x 2 x bfloat> %v7)
@@ -14622,17 +14564,17 @@ define <vscale x 32 x bfloat> @vector_interleave_nxv32bf16_nxv4bf16(<vscale x 4
;
; ZVZIP-LABEL: vector_interleave_nxv32bf16_nxv4bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v20, v11, v15
; ZVZIP-NEXT: vzip.vv v22, v9, v13
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v22, v20
; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vzip.vv v16, v22, v20
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v10, v14
; ZVZIP-NEXT: vzip.vv v10, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v20, v10, v24
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 32 x bfloat> @llvm.vector.interleave8.nxv32bf16(<vscale x 4 x bfloat> %v0, <vscale x 4 x bfloat> %v1, <vscale x 4 x bfloat> %v2, <vscale x 4 x bfloat> %v3, <vscale x 4 x bfloat> %v4, <vscale x 4 x bfloat> %v5, <vscale x 4 x bfloat> %v6, <vscale x 4 x bfloat> %v7)
@@ -14776,17 +14718,17 @@ define <vscale x 64 x bfloat> @vector_interleave_nxv64bf16_nxv8bf16(<vscale x 8
;
; ZVZIP-LABEL: vector_interleave_nxv64bf16_nxv8bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vmv2r.v v24, v22
; ZVZIP-NEXT: vmv2r.v v22, v8
; ZVZIP-NEXT: vzip.vv v4, v14, v24
; ZVZIP-NEXT: vzip.vv v0, v10, v18
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v0, v4
; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v24, v0, v4
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v12, v20
; ZVZIP-NEXT: vzip.vv v12, v22, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v12, v8
; ZVZIP-NEXT: vzip.vv v8, v0, v24
; ZVZIP-NEXT: vzip.vv v16, v4, v28
@@ -14886,25 +14828,15 @@ define <vscale x 8 x float> @vector_interleave_nxv8f32_nxv1f32(<vscale x 1 x flo
;
; ZVZIP-LABEL: vector_interleave_nxv8f32_nxv1f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: csrr a0, vlenb
-; ZVZIP-NEXT: srli a0, a0, 3
-; ZVZIP-NEXT: vsetvli a1, zero, e32, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v11, v15
; ZVZIP-NEXT: vzip.vv v11, v9, v13
-; ZVZIP-NEXT: vslidedown.vx v9, v16, a0
-; ZVZIP-NEXT: vzip.vv v17, v10, v14
-; ZVZIP-NEXT: vslidedown.vx v10, v11, a0
-; ZVZIP-NEXT: vzip.vv v18, v8, v12
-; ZVZIP-NEXT: vslidedown.vx v8, v17, a0
-; ZVZIP-NEXT: vslidedown.vx v12, v18, a0
-; ZVZIP-NEXT: vslideup.vx v16, v9, a0
-; ZVZIP-NEXT: vslideup.vx v11, v10, a0
-; ZVZIP-NEXT: vslideup.vx v17, v8, a0
-; ZVZIP-NEXT: vslideup.vx v18, v12, a0
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vzip.vv v9, v10, v14
+; ZVZIP-NEXT: vzip.vv v10, v8, v12
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v11, v16
-; ZVZIP-NEXT: vzip.vv v14, v18, v17
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v14, v10, v9
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 8 x float> @llvm.vector.interleave8.nxv8f32(<vscale x 1 x float> %v0, <vscale x 1 x float> %v1, <vscale x 1 x float> %v2, <vscale x 1 x float> %v3, <vscale x 1 x float> %v4, <vscale x 1 x float> %v5, <vscale x 1 x float> %v6, <vscale x 1 x float> %v8)
@@ -14976,17 +14908,17 @@ define <vscale x 16 x float> @vector_interleave_nxv16f32_nxv2f32(<vscale x 2 x f
;
; ZVZIP-LABEL: vector_interleave_nxv16f32_nxv2f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v20, v11, v15
; ZVZIP-NEXT: vzip.vv v22, v9, v13
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v22, v20
; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vzip.vv v16, v22, v20
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v10, v14
; ZVZIP-NEXT: vzip.vv v10, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v20, v10, v24
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x float> @llvm.vector.interleave8.nxv16f32(<vscale x 2 x float> %v0, <vscale x 2 x float> %v1, <vscale x 2 x float> %v2, <vscale x 2 x float> %v3, <vscale x 2 x float> %v4, <vscale x 2 x float> %v5, <vscale x 2 x float> %v6, <vscale x 2 x float> %v7)
@@ -15130,17 +15062,17 @@ define <vscale x 32 x float> @vector_interleave_nxv32f32_nxv4f32(<vscale x 4 x f
;
; ZVZIP-LABEL: vector_interleave_nxv32f32_nxv4f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vmv2r.v v24, v22
; ZVZIP-NEXT: vmv2r.v v22, v8
; ZVZIP-NEXT: vzip.vv v4, v14, v24
; ZVZIP-NEXT: vzip.vv v0, v10, v18
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v0, v4
; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v24, v0, v4
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v12, v20
; ZVZIP-NEXT: vzip.vv v12, v22, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v12, v8
; ZVZIP-NEXT: vzip.vv v8, v0, v24
; ZVZIP-NEXT: vzip.vv v16, v4, v28
@@ -15214,17 +15146,17 @@ define <vscale x 8 x double> @vector_interleave_nxv8f64_nxv1f64(<vscale x 1 x do
;
; ZVZIP-LABEL: vector_interleave_nxv8f64_nxv1f64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v20, v11, v15
; ZVZIP-NEXT: vzip.vv v22, v9, v13
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v22, v20
; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; ZVZIP-NEXT: vzip.vv v16, v22, v20
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v10, v14
; ZVZIP-NEXT: vzip.vv v10, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v20, v10, v24
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 8 x double> @llvm.vector.interleave8.nxv8f64(<vscale x 1 x double> %v0, <vscale x 1 x double> %v1, <vscale x 1 x double> %v2, <vscale x 1 x double> %v3, <vscale x 1 x double> %v4, <vscale x 1 x double> %v5, <vscale x 1 x double> %v6, <vscale x 1 x double> %v8)
@@ -15368,17 +15300,17 @@ define <vscale x 16 x double> @vector_interleave_nxv16f64_nxv2f64(<vscale x 2 x
;
; ZVZIP-LABEL: vector_interleave_nxv16f64_nxv2f64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
; ZVZIP-NEXT: vmv2r.v v24, v22
; ZVZIP-NEXT: vmv2r.v v22, v8
; ZVZIP-NEXT: vzip.vv v4, v14, v24
; ZVZIP-NEXT: vzip.vv v0, v10, v18
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v0, v4
; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v24, v0, v4
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v12, v20
; ZVZIP-NEXT: vzip.vv v12, v22, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v12, v8
; ZVZIP-NEXT: vzip.vv v8, v0, v24
; ZVZIP-NEXT: vzip.vv v16, v4, v28
@@ -15438,12 +15370,7 @@ define <vscale x 4 x i16> @interleave2_diff_const_splat_nxv4i16() {
; ZVZIP-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
; ZVZIP-NEXT: vmv.v.i v9, 4
; ZVZIP-NEXT: vmv.v.i v10, 3
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v10, v9
-; ZVZIP-NEXT: csrr a0, vlenb
-; ZVZIP-NEXT: srli a0, a0, 2
-; ZVZIP-NEXT: vslidedown.vx v9, v8, a0
-; ZVZIP-NEXT: vslideup.vx v8, v9, a0
; ZVZIP-NEXT: ret
%retval = call <vscale x 4 x i16> @llvm.vector.interleave2.v4i16(<vscale x 2 x i16> splat(i16 3), <vscale x 2 x i16> splat(i16 4))
ret <vscale x 4 x i16> %retval
@@ -15500,12 +15427,7 @@ define <vscale x 4 x i16> @interleave2_diff_nonconst_splat_nxv4i16(i16 %a, i16 %
; ZVZIP-NEXT: vsetvli a2, zero, e16, mf2, ta, ma
; ZVZIP-NEXT: vmv.v.x v9, a0
; ZVZIP-NEXT: vmv.v.x v10, a1
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v9, v10
-; ZVZIP-NEXT: csrr a0, vlenb
-; ZVZIP-NEXT: srli a0, a0, 2
-; ZVZIP-NEXT: vslidedown.vx v9, v8, a0
-; ZVZIP-NEXT: vslideup.vx v8, v9, a0
; ZVZIP-NEXT: ret
%ins1 = insertelement <vscale x 2 x i16> poison, i16 %a, i32 0
%splat1 = shufflevector <vscale x 2 x i16> %ins1, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
>From 59c554f1f6674566cde6900bcb13360ab3688961 Mon Sep 17 00:00:00 2001
From: Min-Yih Hsu <min.hsu at sifive.com>
Date: Tue, 15 Sep 2026 15:33:51 -0700
Subject: [PATCH 2/8] fixup! Update more tests
---
.../CodeGen/RISCV/rvv/vector-deinterleave.ll | 57 ++++---------------
1 file changed, 12 insertions(+), 45 deletions(-)
diff --git a/llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll b/llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
index 9f7419800fe52..6a23fb8f437fe 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
@@ -1997,11 +1997,6 @@ define {<vscale x 2 x half>, <vscale x 2 x half>, <vscale x 2 x half>} @vector_d
; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: slli a0, a0, 1
; CHECK-NEXT: sub sp, sp, a0
-; CHECK-NEXT: csrr a0, vlenb
-; CHECK-NEXT: srli a0, a0, 2
-; CHECK-NEXT: vsetvli a1, zero, e16, m1, ta, ma
-; CHECK-NEXT: vslidedown.vx v10, v8, a0
-; CHECK-NEXT: vslideup.vx v8, v10, a0
; CHECK-NEXT: addi a0, sp, 16
; CHECK-NEXT: vs2r.v v8, (a0)
; CHECK-NEXT: vsetvli a1, zero, e16, mf2, ta, ma
@@ -2062,11 +2057,6 @@ define {<vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>} @ve
; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: slli a0, a0, 1
; CHECK-NEXT: sub sp, sp, a0
-; CHECK-NEXT: csrr a0, vlenb
-; CHECK-NEXT: srli a0, a0, 2
-; CHECK-NEXT: vsetvli a1, zero, e16, m1, ta, ma
-; CHECK-NEXT: vslidedown.vx v10, v8, a0
-; CHECK-NEXT: vslideup.vx v8, v10, a0
; CHECK-NEXT: addi a0, sp, 16
; CHECK-NEXT: vs2r.v v8, (a0)
; CHECK-NEXT: vsetvli a1, zero, e16, mf2, ta, ma
@@ -2127,11 +2117,6 @@ define {<vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x float>} @vecto
; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: slli a0, a0, 1
; CHECK-NEXT: sub sp, sp, a0
-; CHECK-NEXT: csrr a0, vlenb
-; CHECK-NEXT: srli a0, a0, 3
-; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma
-; CHECK-NEXT: vslidedown.vx v10, v8, a0
-; CHECK-NEXT: vslideup.vx v8, v10, a0
; CHECK-NEXT: addi a0, sp, 16
; CHECK-NEXT: vs2r.v v8, (a0)
; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
@@ -2457,8 +2442,6 @@ define {<vscale x 2 x half>, <vscale x 2 x half>, <vscale x 2 x half>, <vscale x
; CHECK-NEXT: vsetvli a1, zero, e16, m1, ta, ma
; CHECK-NEXT: vslidedown.vx v11, v9, a0
; CHECK-NEXT: vslideup.vx v9, v11, a0
-; CHECK-NEXT: vslidedown.vx v11, v8, a0
-; CHECK-NEXT: vslideup.vx v8, v11, a0
; CHECK-NEXT: addi a0, sp, 16
; CHECK-NEXT: vs4r.v v8, (a0)
; CHECK-NEXT: vsetvli a1, zero, e16, mf2, ta, ma
@@ -2544,8 +2527,6 @@ define {<vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vs
; CHECK-NEXT: vsetvli a1, zero, e16, m1, ta, ma
; CHECK-NEXT: vslidedown.vx v11, v9, a0
; CHECK-NEXT: vslideup.vx v9, v11, a0
-; CHECK-NEXT: vslidedown.vx v11, v8, a0
-; CHECK-NEXT: vslideup.vx v8, v11, a0
; CHECK-NEXT: addi a0, sp, 16
; CHECK-NEXT: vs4r.v v8, (a0)
; CHECK-NEXT: vsetvli a1, zero, e16, mf2, ta, ma
@@ -2631,8 +2612,6 @@ define {<vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x float>, <vscal
; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma
; CHECK-NEXT: vslidedown.vx v11, v9, a0
; CHECK-NEXT: vslideup.vx v9, v11, a0
-; CHECK-NEXT: vslidedown.vx v11, v8, a0
-; CHECK-NEXT: vslideup.vx v8, v11, a0
; CHECK-NEXT: addi a0, sp, 16
; CHECK-NEXT: vs4r.v v8, (a0)
; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
@@ -2776,12 +2755,10 @@ define {<vscale x 2 x half>, <vscale x 2 x half>, <vscale x 2 x half>, <vscale x
; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: srli a0, a0, 2
; CHECK-NEXT: vsetvli a1, zero, e16, m1, ta, ma
-; CHECK-NEXT: vslidedown.vx v11, v9, a0
-; CHECK-NEXT: vslideup.vx v9, v11, a0
-; CHECK-NEXT: vslidedown.vx v11, v8, a0
-; CHECK-NEXT: vslideup.vx v8, v11, a0
; CHECK-NEXT: vslidedown.vx v11, v10, a0
; CHECK-NEXT: vslideup.vx v10, v11, a0
+; CHECK-NEXT: vslidedown.vx v11, v9, a0
+; CHECK-NEXT: vslideup.vx v9, v11, a0
; CHECK-NEXT: addi a0, sp, 16
; CHECK-NEXT: vs4r.v v8, (a0)
; CHECK-NEXT: vsetvli a1, zero, e16, mf2, ta, ma
@@ -2866,12 +2843,10 @@ define {<vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vs
; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: srli a0, a0, 2
; CHECK-NEXT: vsetvli a1, zero, e16, m1, ta, ma
-; CHECK-NEXT: vslidedown.vx v11, v9, a0
-; CHECK-NEXT: vslideup.vx v9, v11, a0
-; CHECK-NEXT: vslidedown.vx v11, v8, a0
-; CHECK-NEXT: vslideup.vx v8, v11, a0
; CHECK-NEXT: vslidedown.vx v11, v10, a0
; CHECK-NEXT: vslideup.vx v10, v11, a0
+; CHECK-NEXT: vslidedown.vx v11, v9, a0
+; CHECK-NEXT: vslideup.vx v9, v11, a0
; CHECK-NEXT: addi a0, sp, 16
; CHECK-NEXT: vs4r.v v8, (a0)
; CHECK-NEXT: vsetvli a1, zero, e16, mf2, ta, ma
@@ -2956,12 +2931,10 @@ define {<vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x float>, <vscal
; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: srli a0, a0, 3
; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma
-; CHECK-NEXT: vslidedown.vx v11, v9, a0
-; CHECK-NEXT: vslideup.vx v9, v11, a0
-; CHECK-NEXT: vslidedown.vx v11, v8, a0
-; CHECK-NEXT: vslideup.vx v8, v11, a0
; CHECK-NEXT: vslidedown.vx v11, v10, a0
; CHECK-NEXT: vslideup.vx v10, v11, a0
+; CHECK-NEXT: vslidedown.vx v11, v9, a0
+; CHECK-NEXT: vslideup.vx v9, v11, a0
; CHECK-NEXT: addi a0, sp, 16
; CHECK-NEXT: vs4r.v v8, (a0)
; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
@@ -3107,12 +3080,10 @@ define {<vscale x 2 x half>, <vscale x 2 x half>, <vscale x 2 x half>, <vscale x
; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: srli a0, a0, 2
; CHECK-NEXT: vsetvli a1, zero, e16, m1, ta, ma
-; CHECK-NEXT: vslidedown.vx v12, v9, a0
-; CHECK-NEXT: vslideup.vx v9, v12, a0
-; CHECK-NEXT: vslidedown.vx v12, v8, a0
-; CHECK-NEXT: vslideup.vx v8, v12, a0
; CHECK-NEXT: vslidedown.vx v12, v10, a0
; CHECK-NEXT: vslideup.vx v10, v12, a0
+; CHECK-NEXT: vslidedown.vx v12, v9, a0
+; CHECK-NEXT: vslideup.vx v9, v12, a0
; CHECK-NEXT: addi a0, sp, 16
; CHECK-NEXT: vs4r.v v8, (a0)
; CHECK-NEXT: vsetvli a1, zero, e16, mf2, ta, ma
@@ -3202,12 +3173,10 @@ define {<vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vscale x 2 x bfloat>, <vs
; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: srli a0, a0, 2
; CHECK-NEXT: vsetvli a1, zero, e16, m1, ta, ma
-; CHECK-NEXT: vslidedown.vx v12, v9, a0
-; CHECK-NEXT: vslideup.vx v9, v12, a0
-; CHECK-NEXT: vslidedown.vx v12, v8, a0
-; CHECK-NEXT: vslideup.vx v8, v12, a0
; CHECK-NEXT: vslidedown.vx v12, v10, a0
; CHECK-NEXT: vslideup.vx v10, v12, a0
+; CHECK-NEXT: vslidedown.vx v12, v9, a0
+; CHECK-NEXT: vslideup.vx v9, v12, a0
; CHECK-NEXT: addi a0, sp, 16
; CHECK-NEXT: vs4r.v v8, (a0)
; CHECK-NEXT: vsetvli a1, zero, e16, mf2, ta, ma
@@ -3297,12 +3266,10 @@ define {<vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x float>, <vscal
; CHECK-NEXT: csrr a0, vlenb
; CHECK-NEXT: srli a0, a0, 3
; CHECK-NEXT: vsetvli a1, zero, e32, m1, ta, ma
-; CHECK-NEXT: vslidedown.vx v12, v9, a0
-; CHECK-NEXT: vslideup.vx v9, v12, a0
-; CHECK-NEXT: vslidedown.vx v12, v8, a0
-; CHECK-NEXT: vslideup.vx v8, v12, a0
; CHECK-NEXT: vslidedown.vx v12, v10, a0
; CHECK-NEXT: vslideup.vx v10, v12, a0
+; CHECK-NEXT: vslidedown.vx v12, v9, a0
+; CHECK-NEXT: vslideup.vx v9, v12, a0
; CHECK-NEXT: addi a0, sp, 16
; CHECK-NEXT: vs4r.v v8, (a0)
; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
>From 226f3222edfd38a62272c1b5bc2a17c6d783a026 Mon Sep 17 00:00:00 2001
From: Min-Yih Hsu <min.hsu at sifive.com>
Date: Wed, 16 Sep 2026 15:14:31 -0700
Subject: [PATCH 3/8] fixup! Rebase
---
.../RISCV/rvv/vector-interleave-fixed.ll | 1230 +++++++++++++----
1 file changed, 956 insertions(+), 274 deletions(-)
diff --git a/llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll b/llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
index e2dcae0b8ca30..b4ccc99a24d88 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
@@ -339,20 +339,17 @@ define <8 x i32> @vector_interleave4_v8i32_v2i32(<2 x i32> %a, <2 x i32> %b, <2
; ZVZIP-NEXT: vsetivli zero, 4, e32, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v11, v8, v10
-; ZVZIP-NEXT: vsetivli zero, 2, e32, m1, ta, ma
-; ZVZIP-NEXT: vslidedown.vi v8, v12, 2
-; ZVZIP-NEXT: vslidedown.vi v9, v11, 2
; ZVZIP-NEXT: vsetivli zero, 4, e32, m1, ta, ma
+<<<<<<< HEAD
; ZVZIP-NEXT: vslideup.vi v12, v8, 2
; ZVZIP-NEXT: vslideup.vi v11, v9, 2
; ZVZIP-NEXT: vsetivli zero, 8, e32, m2, ta, ma
+=======
+>>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: vzip.vv v8, v11, v12
-; ZVZIP-NEXT: vsetivli zero, 4, e32, m2, ta, ma
-; ZVZIP-NEXT: vslidedown.vi v10, v8, 4
-; ZVZIP-NEXT: vsetivli zero, 8, e32, m2, ta, ma
-; ZVZIP-NEXT: vslideup.vi v8, v10, 4
; ZVZIP-NEXT: ret
;
+<<<<<<< HEAD
; ZVZIP-ZVL2048-LABEL: vector_interleave4_v8i32_v2i32:
; ZVZIP-ZVL2048: # %bb.0:
; ZVZIP-ZVL2048-NEXT: vsetivli zero, 4, e32, m1, ta, ma
@@ -379,6 +376,28 @@ define <8 x i32> @vector_interleave4_v8i32_v2i32(<2 x i32> %a, <2 x i32> %b, <2
; ZVZIP-ZVL2048-NEXT: vsetivli zero, 8, e32, mf2, ta, ma
; ZVZIP-ZVL2048-NEXT: vslideup.vi v8, v9, 6
; ZVZIP-ZVL2048-NEXT: ret
+=======
+; ZVZIP-WIDE-LABEL: vector_interleave4_v8i32_v2i32:
+; ZVZIP-WIDE: # %bb.0:
+; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; ZVZIP-WIDE-NEXT: vzip.vv v12, v9, v11
+; ZVZIP-WIDE-NEXT: vzip.vv v9, v8, v10
+; ZVZIP-WIDE-NEXT: vsetivli zero, 4, e32, mf2, ta, ma
+; ZVZIP-WIDE-NEXT: vzip.vv v8, v9, v12
+; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; ZVZIP-WIDE-NEXT: vslidedown.vi v9, v8, 2
+; ZVZIP-WIDE-NEXT: vsetivli zero, 4, e32, mf2, ta, ma
+; ZVZIP-WIDE-NEXT: vslidedown.vi v10, v8, 4
+; ZVZIP-WIDE-NEXT: vsetvli zero, zero, e32, mf2, tu, ma
+; ZVZIP-WIDE-NEXT: vslideup.vi v8, v9, 2
+; ZVZIP-WIDE-NEXT: vsetivli zero, 6, e32, mf2, tu, ma
+; ZVZIP-WIDE-NEXT: vslideup.vi v8, v10, 4
+; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; ZVZIP-WIDE-NEXT: vslidedown.vi v9, v10, 2
+; ZVZIP-WIDE-NEXT: vsetivli zero, 8, e32, mf2, ta, ma
+; ZVZIP-WIDE-NEXT: vslideup.vi v8, v9, 6
+; ZVZIP-WIDE-NEXT: ret
+>>>>>>> c3762a810ef6 (fixup! Rebase)
%res = call <8 x i32> @llvm.vector.interleave4.v8i32(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c, <2 x i32> %d)
ret <8 x i32> %res
}
@@ -9243,21 +9262,15 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP: # %bb.0:
; ZVZIP-NEXT: addi sp, sp, -16
; ZVZIP-NEXT: csrr a2, vlenb
-; ZVZIP-NEXT: slli a2, a2, 3
+; ZVZIP-NEXT: slli a2, a2, 4
; ZVZIP-NEXT: mv a4, a2
-; ZVZIP-NEXT: slli a2, a2, 2
-; ZVZIP-NEXT: add a4, a4, a2
-; ZVZIP-NEXT: slli a2, a2, 3
+; ZVZIP-NEXT: slli a2, a2, 4
; ZVZIP-NEXT: add a2, a2, a4
; ZVZIP-NEXT: sub sp, sp, a2
; ZVZIP-NEXT: csrr a2, vlenb
-; ZVZIP-NEXT: slli a2, a2, 3
+; ZVZIP-NEXT: slli a2, a2, 6
; ZVZIP-NEXT: mv a4, a2
; ZVZIP-NEXT: slli a2, a2, 1
-; ZVZIP-NEXT: add a4, a4, a2
-; ZVZIP-NEXT: slli a2, a2, 1
-; ZVZIP-NEXT: add a4, a4, a2
-; ZVZIP-NEXT: slli a2, a2, 2
; ZVZIP-NEXT: add a2, a2, a4
; ZVZIP-NEXT: add a2, sp, a2
; ZVZIP-NEXT: addi a2, a2, 16
@@ -9265,24 +9278,16 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: csrr a2, vlenb
; ZVZIP-NEXT: slli a2, a2, 3
; ZVZIP-NEXT: mv a4, a2
-; ZVZIP-NEXT: slli a2, a2, 1
-; ZVZIP-NEXT: add a4, a4, a2
-; ZVZIP-NEXT: slli a2, a2, 1
-; ZVZIP-NEXT: add a4, a4, a2
-; ZVZIP-NEXT: slli a2, a2, 1
-; ZVZIP-NEXT: add a4, a4, a2
-; ZVZIP-NEXT: slli a2, a2, 1
+; ZVZIP-NEXT: slli a2, a2, 5
; ZVZIP-NEXT: add a2, a2, a4
; ZVZIP-NEXT: add a2, sp, a2
; ZVZIP-NEXT: addi a2, a2, 16
; ZVZIP-NEXT: vs8r.v v8, (a2) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: li a2, 128
; ZVZIP-NEXT: csrr a4, vlenb
-; ZVZIP-NEXT: slli a4, a4, 3
+; ZVZIP-NEXT: slli a4, a4, 4
; ZVZIP-NEXT: mv a5, a4
-; ZVZIP-NEXT: slli a4, a4, 2
-; ZVZIP-NEXT: add a5, a5, a4
-; ZVZIP-NEXT: slli a4, a4, 3
+; ZVZIP-NEXT: slli a4, a4, 4
; ZVZIP-NEXT: add a4, a4, a5
; ZVZIP-NEXT: add a4, sp, a4
; ZVZIP-NEXT: addi a4, a4, 528
@@ -9305,27 +9310,29 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vle8.v v24, (a5)
; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 8
+; ZVZIP-NEXT: slli a5, a5, 3
+; ZVZIP-NEXT: mv a6, a5
+; ZVZIP-NEXT: slli a5, a5, 1
+; ZVZIP-NEXT: add a6, a6, a5
+; ZVZIP-NEXT: slli a5, a5, 1
+; ZVZIP-NEXT: add a6, a6, a5
+; ZVZIP-NEXT: slli a5, a5, 2
+; ZVZIP-NEXT: add a5, a5, a6
; ZVZIP-NEXT: add a5, sp, a5
; ZVZIP-NEXT: addi a5, a5, 16
; ZVZIP-NEXT: vs8r.v v24, (a5) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 8
-; ZVZIP-NEXT: add a5, sp, a5
-; ZVZIP-NEXT: addi a5, a5, 16
-; ZVZIP-NEXT: vl8r.v v24, (a5) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v24, v24, a4
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v24, v8
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v0, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v0, v8, a4
; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 5
+; ZVZIP-NEXT: slli a5, a5, 4
; ZVZIP-NEXT: mv a6, a5
-; ZVZIP-NEXT: slli a5, a5, 3
+; ZVZIP-NEXT: slli a5, a5, 1
+; ZVZIP-NEXT: add a6, a6, a5
+; ZVZIP-NEXT: slli a5, a5, 1
+; ZVZIP-NEXT: add a6, a6, a5
+; ZVZIP-NEXT: slli a5, a5, 1
; ZVZIP-NEXT: add a5, a5, a6
; ZVZIP-NEXT: add a5, sp, a5
; ZVZIP-NEXT: addi a5, a5, 16
@@ -9335,7 +9342,9 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: csrr a5, vlenb
; ZVZIP-NEXT: slli a5, a5, 3
; ZVZIP-NEXT: mv a6, a5
-; ZVZIP-NEXT: slli a5, a5, 2
+; ZVZIP-NEXT: slli a5, a5, 1
+; ZVZIP-NEXT: add a6, a6, a5
+; ZVZIP-NEXT: slli a5, a5, 1
; ZVZIP-NEXT: add a6, a6, a5
; ZVZIP-NEXT: slli a5, a5, 1
; ZVZIP-NEXT: add a6, a6, a5
@@ -9346,6 +9355,7 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vs8r.v v8, (a5) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: addi a5, a7, 128
; ZVZIP-NEXT: vslidedown.vx v8, v16, a4
+<<<<<<< HEAD
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vle8.v v16, (a5)
; ZVZIP-NEXT: csrr a5, vlenb
@@ -9385,9 +9395,13 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: addi a5, a5, 656
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
+=======
+>>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: csrr a6, vlenb
-; ZVZIP-NEXT: slli a6, a6, 5
+; ZVZIP-NEXT: slli a6, a6, 3
; ZVZIP-NEXT: mv t0, a6
+; ZVZIP-NEXT: slli a6, a6, 2
+; ZVZIP-NEXT: add t0, t0, a6
; ZVZIP-NEXT: slli a6, a6, 1
; ZVZIP-NEXT: add t0, t0, a6
; ZVZIP-NEXT: slli a6, a6, 1
@@ -9398,16 +9412,25 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vle8.v v8, (a5)
; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 3
+; ZVZIP-NEXT: slli a5, a5, 4
; ZVZIP-NEXT: mv a6, a5
-; ZVZIP-NEXT: slli a5, a5, 5
+; ZVZIP-NEXT: slli a5, a5, 1
+; ZVZIP-NEXT: add a6, a6, a5
+; ZVZIP-NEXT: slli a5, a5, 2
; ZVZIP-NEXT: add a5, a5, a6
; ZVZIP-NEXT: add a5, sp, a5
; ZVZIP-NEXT: addi a5, a5, 16
; ZVZIP-NEXT: vs8r.v v8, (a5) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: addi a5, a3, 256
+; ZVZIP-NEXT: csrr a5, vlenb
+; ZVZIP-NEXT: slli a5, a5, 4
+; ZVZIP-NEXT: mv a6, a5
+; ZVZIP-NEXT: slli a5, a5, 4
+; ZVZIP-NEXT: add a5, a5, a6
+; ZVZIP-NEXT: add a5, sp, a5
+; ZVZIP-NEXT: addi a5, a5, 656
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v8, v8, a4
+<<<<<<< HEAD
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vle8.v v16, (a5)
; ZVZIP-NEXT: csrr a5, vlenb
@@ -9506,6 +9529,8 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: addi a5, a5, 784
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
+=======
+>>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: csrr a6, vlenb
; ZVZIP-NEXT: slli a6, a6, 3
; ZVZIP-NEXT: mv t0, a6
@@ -9521,8 +9546,109 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vle8.v v8, (a5)
; ZVZIP-NEXT: csrr a5, vlenb
+; ZVZIP-NEXT: slli a5, a5, 3
+; ZVZIP-NEXT: mv a6, a5
+; ZVZIP-NEXT: slli a5, a5, 2
+; ZVZIP-NEXT: add a6, a6, a5
+; ZVZIP-NEXT: slli a5, a5, 1
+; ZVZIP-NEXT: add a5, a5, a6
+; ZVZIP-NEXT: add a5, sp, a5
+; ZVZIP-NEXT: addi a5, a5, 16
+; ZVZIP-NEXT: vs8r.v v8, (a5) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: addi a5, a3, 256
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v8, v8, a4
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vle8.v v16, (a5)
+; ZVZIP-NEXT: csrr a5, vlenb
+; ZVZIP-NEXT: slli a5, a5, 5
+; ZVZIP-NEXT: mv a6, a5
+; ZVZIP-NEXT: slli a5, a5, 1
+; ZVZIP-NEXT: add a5, a5, a6
+; ZVZIP-NEXT: add a5, sp, a5
+; ZVZIP-NEXT: addi a5, a5, 16
+; ZVZIP-NEXT: vs8r.v v16, (a5) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v16, v16, a4
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v24, v16, v8
+; ZVZIP-NEXT: csrr a5, vlenb
+; ZVZIP-NEXT: slli a5, a5, 4
+; ZVZIP-NEXT: mv a6, a5
+; ZVZIP-NEXT: slli a5, a5, 2
+; ZVZIP-NEXT: add a6, a6, a5
+; ZVZIP-NEXT: slli a5, a5, 1
+; ZVZIP-NEXT: add a5, a5, a6
+; ZVZIP-NEXT: add a5, sp, a5
+; ZVZIP-NEXT: addi a5, a5, 16
+; ZVZIP-NEXT: vs8r.v v24, (a5) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
+; ZVZIP-NEXT: csrr a5, vlenb
+; ZVZIP-NEXT: slli a5, a5, 5
+; ZVZIP-NEXT: mv a6, a5
+; ZVZIP-NEXT: slli a5, a5, 1
+; ZVZIP-NEXT: add a6, a6, a5
+; ZVZIP-NEXT: slli a5, a5, 1
+; ZVZIP-NEXT: add a5, a5, a6
+; ZVZIP-NEXT: add a5, sp, a5
+; ZVZIP-NEXT: addi a5, a5, 16
+; ZVZIP-NEXT: vs8r.v v8, (a5) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vle8.v v8, (a1)
+; ZVZIP-NEXT: csrr a5, vlenb
+; ZVZIP-NEXT: slli a5, a5, 4
+; ZVZIP-NEXT: mv a6, a5
+; ZVZIP-NEXT: slli a5, a5, 2
+; ZVZIP-NEXT: add a5, a5, a6
+; ZVZIP-NEXT: add a5, sp, a5
+; ZVZIP-NEXT: addi a5, a5, 16
+; ZVZIP-NEXT: vs8r.v v8, (a5) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: addi a5, a7, 256
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v8, v8, a4
+; ZVZIP-NEXT: csrr a6, vlenb
+; ZVZIP-NEXT: slli a6, a6, 3
+; ZVZIP-NEXT: mv t0, a6
+; ZVZIP-NEXT: slli a6, a6, 2
+; ZVZIP-NEXT: add t0, t0, a6
+; ZVZIP-NEXT: slli a6, a6, 2
+; ZVZIP-NEXT: add a6, a6, t0
+; ZVZIP-NEXT: add a6, sp, a6
+; ZVZIP-NEXT: addi a6, a6, 16
+; ZVZIP-NEXT: vs8r.v v8, (a6) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vle8.v v8, (a5)
+; ZVZIP-NEXT: csrr a5, vlenb
+; ZVZIP-NEXT: slli a5, a5, 3
+; ZVZIP-NEXT: mv a6, a5
+; ZVZIP-NEXT: slli a5, a5, 3
+; ZVZIP-NEXT: add a5, a5, a6
+; ZVZIP-NEXT: add a5, sp, a5
+; ZVZIP-NEXT: addi a5, a5, 16
+; ZVZIP-NEXT: vs8r.v v8, (a5) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: csrr a5, vlenb
; ZVZIP-NEXT: slli a5, a5, 4
; ZVZIP-NEXT: mv a6, a5
+; ZVZIP-NEXT: slli a5, a5, 4
+; ZVZIP-NEXT: add a5, a5, a6
+; ZVZIP-NEXT: add a5, sp, a5
+; ZVZIP-NEXT: addi a5, a5, 784
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v8, v8, a4
+; ZVZIP-NEXT: csrr a6, vlenb
+; ZVZIP-NEXT: slli a6, a6, 5
+; ZVZIP-NEXT: mv t0, a6
+; ZVZIP-NEXT: slli a6, a6, 2
+; ZVZIP-NEXT: add a6, a6, t0
+; ZVZIP-NEXT: add a6, sp, a6
+; ZVZIP-NEXT: addi a6, a6, 16
+; ZVZIP-NEXT: vs8r.v v8, (a6) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vle8.v v8, (a5)
+; ZVZIP-NEXT: csrr a5, vlenb
+; ZVZIP-NEXT: slli a5, a5, 3
+; ZVZIP-NEXT: mv a6, a5
; ZVZIP-NEXT: slli a5, a5, 2
; ZVZIP-NEXT: add a5, a5, a6
; ZVZIP-NEXT: add a5, sp, a5
@@ -9531,7 +9657,16 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: addi a5, a3, 384
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v8, v8, a4
+; ZVZIP-NEXT: csrr a6, vlenb
+; ZVZIP-NEXT: slli a6, a6, 4
+; ZVZIP-NEXT: mv t0, a6
+; ZVZIP-NEXT: slli a6, a6, 3
+; ZVZIP-NEXT: add a6, a6, t0
+; ZVZIP-NEXT: add a6, sp, a6
+; ZVZIP-NEXT: addi a6, a6, 16
+; ZVZIP-NEXT: vs8r.v v8, (a6) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+<<<<<<< HEAD
; ZVZIP-NEXT: vle8.v v16, (a5)
; ZVZIP-NEXT: csrr a5, vlenb
; ZVZIP-NEXT: slli a5, a5, 6
@@ -9546,31 +9681,42 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vslideup.vx v24, v8, a4
+=======
+; ZVZIP-NEXT: vle8.v v8, (a5)
+>>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: csrr a5, vlenb
; ZVZIP-NEXT: slli a5, a5, 3
; ZVZIP-NEXT: mv a6, a5
-; ZVZIP-NEXT: slli a5, a5, 2
-; ZVZIP-NEXT: add a6, a6, a5
; ZVZIP-NEXT: slli a5, a5, 1
; ZVZIP-NEXT: add a5, a5, a6
; ZVZIP-NEXT: add a5, sp, a5
; ZVZIP-NEXT: addi a5, a5, 16
-; ZVZIP-NEXT: vs8r.v v24, (a5) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vs8r.v v8, (a5) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: addi a5, a7, 384
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
+; ZVZIP-NEXT: vslidedown.vx v8, v8, a4
+; ZVZIP-NEXT: csrr a6, vlenb
+; ZVZIP-NEXT: slli a6, a6, 3
+; ZVZIP-NEXT: mv t0, a6
+; ZVZIP-NEXT: slli a6, a6, 1
+; ZVZIP-NEXT: add t0, t0, a6
+; ZVZIP-NEXT: slli a6, a6, 1
+; ZVZIP-NEXT: add t0, t0, a6
+; ZVZIP-NEXT: slli a6, a6, 1
+; ZVZIP-NEXT: add a6, a6, t0
+; ZVZIP-NEXT: add a6, sp, a6
+; ZVZIP-NEXT: addi a6, a6, 16
+; ZVZIP-NEXT: vs8r.v v8, (a6) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vle8.v v16, (a5)
+; ZVZIP-NEXT: vle8.v v8, (a5)
; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 4
-; ZVZIP-NEXT: mv a6, a5
-; ZVZIP-NEXT: slli a5, a5, 1
-; ZVZIP-NEXT: add a5, a5, a6
+; ZVZIP-NEXT: slli a5, a5, 3
; ZVZIP-NEXT: add a5, sp, a5
; ZVZIP-NEXT: addi a5, a5, 16
-; ZVZIP-NEXT: vs8r.v v16, (a5) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vs8r.v v8, (a5) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: addi a1, a1, 128
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+<<<<<<< HEAD
; ZVZIP-NEXT: vslidedown.vx v16, v16, a4
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vle8.v v24, (a1)
@@ -9625,10 +9771,13 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: addi a1, a1, 400
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
+=======
+; ZVZIP-NEXT: vslidedown.vx v8, v8, a4
+>>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 6
+; ZVZIP-NEXT: slli a5, a5, 3
; ZVZIP-NEXT: mv a6, a5
-; ZVZIP-NEXT: slli a5, a5, 1
+; ZVZIP-NEXT: slli a5, a5, 4
; ZVZIP-NEXT: add a5, a5, a6
; ZVZIP-NEXT: add a5, sp, a5
; ZVZIP-NEXT: addi a5, a5, 16
@@ -9636,50 +9785,81 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vle8.v v8, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 7
+; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: mv a5, a1
+; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: add a1, a1, a5
; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: addi a1, a1, 400
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v8, a4
+; ZVZIP-NEXT: vslidedown.vx v16, v8, a4
+; ZVZIP-NEXT: csrr a5, vlenb
+; ZVZIP-NEXT: slli a5, a5, 4
+; ZVZIP-NEXT: mv a6, a5
+; ZVZIP-NEXT: slli a5, a5, 1
+; ZVZIP-NEXT: add a6, a6, a5
+; ZVZIP-NEXT: slli a5, a5, 1
+; ZVZIP-NEXT: add a5, a5, a6
+; ZVZIP-NEXT: add a5, sp, a5
+; ZVZIP-NEXT: addi a5, a5, 16
+; ZVZIP-NEXT: vs8r.v v16, (a5) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vle8.v v16, (a3)
+; ZVZIP-NEXT: vle8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: slli a1, a1, 6
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v16, v16, a4
+<<<<<<< HEAD
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v16, v8
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
+=======
+>>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v24, v8, a4
+; ZVZIP-NEXT: vle8.v v24, (a3)
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
+; ZVZIP-NEXT: vslidedown.vx v24, v24, a4
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v0, v24, v16
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: slli a1, a1, 8
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 8
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v16, v16, a4
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
@@ -9688,46 +9868,63 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vle8.v v24, (a7)
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v24, v24, a4
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vzip.vv v0, v16, v24
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v16, v0, a4
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 7
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v24, v24, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v0, v16, v24
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v0, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v0, v16, a4
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v0, v24, v16
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v16, v0, a4
+<<<<<<< HEAD
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v16, v8
; ZVZIP-NEXT: csrr a1, vlenb
@@ -9740,11 +9937,14 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
+=======
+>>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a3, a3, a1
+<<<<<<< HEAD
; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
@@ -9781,25 +9981,16 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
+=======
+>>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 4
+<<<<<<< HEAD
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
@@ -9819,9 +10010,9 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
+=======
+>>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
@@ -9837,17 +10028,14 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v16, v24
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v0, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v0, v16, a4
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 5
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v16, v0, a4
+<<<<<<< HEAD
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v16, v8
; ZVZIP-NEXT: csrr a1, vlenb
@@ -9880,6 +10068,8 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
+=======
+>>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 5
; ZVZIP-NEXT: mv a3, a1
@@ -9887,134 +10077,564 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
+<<<<<<< HEAD
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v24, v16
+=======
+; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
+>>>>>>> c3762a810ef6 (fixup! Rebase)
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+<<<<<<< HEAD
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vzip.vv v16, v24, v8
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v8, v16, a4
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vslideup.vx v16, v8, a4
+; ZVZIP-NEXT: addi a1, sp, 16
+; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v8, v16, a4
+; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vzip.vv v8, v24, v16
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v8, a4
+; ZVZIP-NEXT: vslidedown.vx v0, v8, a4
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vslideup.vx v8, v0, a4
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v0, v8, a4
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vzip.vv v24, v0, v16
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v24, v24, a4
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 5
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vzip.vv v0, v16, v24
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
+=======
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v0, v24, v16
+; ZVZIP-NEXT: addi a1, sp, 16
+>>>>>>> c3762a810ef6 (fixup! Rebase)
+; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v16, v0, a4
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 6
+<<<<<<< HEAD
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 5
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v24, v8
+; ZVZIP-NEXT: vzip.vv v16, v0, v24
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v16, a4
+; ZVZIP-NEXT: vslidedown.vx v24, v16, a4
+; ZVZIP-NEXT: csrr a1, vlenb
+=======
+>>>>>>> c3762a810ef6 (fixup! Rebase)
+; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+<<<<<<< HEAD
+; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v16, v8, a4
+; ZVZIP-NEXT: vzip.vv v16, v0, v24
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v24, v16, a4
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 6
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: addi a1, sp, 16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vzip.vv v16, v8, v24
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v8, v16, a4
; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 8
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vzip.vv v24, v16, v8
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vslideup.vx v24, v8, a4
+; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
+=======
+; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+>>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vzip.vv v24, v8, v16
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 6
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
+<<<<<<< HEAD
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vzip.vv v24, v16, v8
+=======
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v0, v16, v8
+>>>>>>> c3762a810ef6 (fixup! Rebase)
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v8, v0, a4
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 6
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v8, v16, v24
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v16, v8, a4
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v16, v8, v0
+; ZVZIP-NEXT: addi a1, sp, 16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v8, v0, v24
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vse8.v v16, (a0)
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v16, v0, v24
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v24, v16, a4
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: addi a1, a0, 1536
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vse8.v v8, (a1)
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v8, v0, v24
+; ZVZIP-NEXT: addi a1, a0, 1024
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vse8.v v8, (a1)
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 6
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v0, v8, v24
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vzip.vv v24, v0, v16
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v8, v0, v16
+; ZVZIP-NEXT: addi a1, a0, 512
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vse8.v v24, (a1)
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 8
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v8, v24, v16
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v0, v8, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v8, v0, a4
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v0, v8, a4
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v0, v16
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v16, v0, v24
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v24, v8, a4
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: slli a1, a1, 8
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: addi a1, a0, 256
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: slli a1, a1, 6
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v24, v24, a4
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v16, v0, v24
+; ZVZIP-NEXT: addi a1, a0, 128
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a3, a3, a1
@@ -10022,56 +10642,40 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v0, v16, v24
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v0, v24, v16
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 6
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v0, a4
+; ZVZIP-NEXT: vzip.vv v16, v0, v8
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 5
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v8, v24, v0
+; ZVZIP-NEXT: addi a1, a0, 1792
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v0, v24
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v24, v16, a4
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: mv a3, a1
@@ -10079,204 +10683,225 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v0, v24
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v24, v8, a4
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v24, v16, a4
+; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: addi a1, a0, 1664
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 6
+; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: addi a1, sp, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v8, v24
+; ZVZIP-NEXT: addi a1, a0, 1280
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v16, a4
+; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 5
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v16, v24, v8
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 8
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v16, v8
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v24, v8, a4
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v8, v0, v24
+; ZVZIP-NEXT: addi a1, a0, 1152
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v16, v8, v0
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v8, v16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
+; ZVZIP-NEXT: vslidedown.vx v0, v24, a4
+; ZVZIP-NEXT: addi a1, a0, 768
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v24, v8, a4
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: slli a1, a1, 5
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v16, v0, v24
+; ZVZIP-NEXT: addi a1, a0, 640
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 7
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v16, v0, v24
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 6
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v16, v8
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
+; ZVZIP-NEXT: vslidedown.vx v24, v24, a4
+; ZVZIP-NEXT: addi a1, a0, 384
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v24, v8, a4
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 7
+; ZVZIP-NEXT: slli a1, a1, 8
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v0, v24, a4
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v16, v24, v0
+; ZVZIP-NEXT: addi a1, a0, 1920
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 5
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v16, v0, v24
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v8, v8, a4
+; ZVZIP-NEXT: addi a1, a0, 1408
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v8, v24
+<<<<<<< HEAD
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v24, v16, a4
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
@@ -10749,19 +11374,21 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vse8.v v0, (a1)
; ZVZIP-NEXT: vslideup.vx v8, v16, a4
+=======
+>>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: addi a0, a0, 896
-; ZVZIP-NEXT: vse8.v v8, (a0)
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vse8.v v16, (a0)
; ZVZIP-NEXT: csrr a0, vlenb
-; ZVZIP-NEXT: slli a0, a0, 3
+; ZVZIP-NEXT: slli a0, a0, 4
; ZVZIP-NEXT: mv a1, a0
-; ZVZIP-NEXT: slli a0, a0, 2
-; ZVZIP-NEXT: add a1, a1, a0
-; ZVZIP-NEXT: slli a0, a0, 3
+; ZVZIP-NEXT: slli a0, a0, 4
; ZVZIP-NEXT: add a0, a0, a1
; ZVZIP-NEXT: add sp, sp, a0
; ZVZIP-NEXT: addi sp, sp, 16
; ZVZIP-NEXT: ret
;
+<<<<<<< HEAD
; ZVZIP-ZVL2048-LABEL: vector_interleave4_v512i8_v2048i8:
; ZVZIP-ZVL2048: # %bb.0:
; ZVZIP-ZVL2048-NEXT: li a0, 1024
@@ -10782,6 +11409,23 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-ZVL2048-NEXT: vslideup.vx v8, v24, a1
; ZVZIP-ZVL2048-NEXT: vslideup.vx v12, v16, a1
; ZVZIP-ZVL2048-NEXT: ret
+=======
+; ZVZIP-WIDE-LABEL: vector_interleave4_v512i8_v2048i8:
+; ZVZIP-WIDE: # %bb.0:
+; ZVZIP-WIDE-NEXT: li a0, 512
+; ZVZIP-WIDE-NEXT: vsetvli zero, a0, e8, m2, ta, ma
+; ZVZIP-WIDE-NEXT: vzip.vv v16, v10, v14
+; ZVZIP-WIDE-NEXT: vsetvli zero, a0, e8, m4, ta, ma
+; ZVZIP-WIDE-NEXT: vslidedown.vx v20, v16, a0
+; ZVZIP-WIDE-NEXT: vsetvli zero, a0, e8, m2, ta, ma
+; ZVZIP-WIDE-NEXT: vzip.vv v24, v8, v12
+; ZVZIP-WIDE-NEXT: vsetvli zero, a0, e8, m4, ta, ma
+; ZVZIP-WIDE-NEXT: vslidedown.vx v28, v24, a0
+; ZVZIP-WIDE-NEXT: vsetvli zero, a0, e8, m2, ta, ma
+; ZVZIP-WIDE-NEXT: vzip.vv v8, v24, v16
+; ZVZIP-WIDE-NEXT: vzip.vv v12, v28, v20
+; ZVZIP-WIDE-NEXT: ret
+>>>>>>> c3762a810ef6 (fixup! Rebase)
%v = call <2048 x i8> @llvm.vector.interleave4(<512 x i8> %v0, <512 x i8> %v1, <512 x i8> %v2, <512 x i8> %v3)
ret <2048 x i8> %v
}
@@ -11265,33 +11909,28 @@ define <16 x i8> @vector_interleave8_v16i8_v2i8(<2 x i8> %a, <2 x i8> %b, <2 x i
; ZVZIP-NEXT: vzip.vv v11, v9, v13
; ZVZIP-NEXT: vzip.vv v9, v10, v14
; ZVZIP-NEXT: vzip.vv v10, v8, v12
-; ZVZIP-NEXT: vsetivli zero, 2, e8, mf4, ta, ma
-; ZVZIP-NEXT: vslidedown.vi v8, v16, 2
-; ZVZIP-NEXT: vslidedown.vi v12, v11, 2
-; ZVZIP-NEXT: vslidedown.vi v13, v9, 2
-; ZVZIP-NEXT: vslidedown.vi v14, v10, 2
; ZVZIP-NEXT: vsetivli zero, 4, e8, mf4, ta, ma
+<<<<<<< HEAD
; ZVZIP-NEXT: vslideup.vi v16, v8, 2
; ZVZIP-NEXT: vslideup.vi v11, v12, 2
; ZVZIP-NEXT: vslideup.vi v9, v13, 2
; ZVZIP-NEXT: vslideup.vi v10, v14, 2
; ZVZIP-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
+=======
+>>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: vzip.vv v12, v11, v16
; ZVZIP-NEXT: vzip.vv v11, v10, v9
-; ZVZIP-NEXT: vsetivli zero, 4, e8, mf2, ta, ma
-; ZVZIP-NEXT: vslidedown.vi v8, v12, 4
-; ZVZIP-NEXT: vslidedown.vi v9, v11, 4
; ZVZIP-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
+<<<<<<< HEAD
; ZVZIP-NEXT: vslideup.vi v12, v8, 4
; ZVZIP-NEXT: vslideup.vi v11, v9, 4
; ZVZIP-NEXT: vsetivli zero, 16, e8, m1, ta, ma
+=======
+>>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: vzip.vv v8, v11, v12
-; ZVZIP-NEXT: vsetivli zero, 8, e8, m1, ta, ma
-; ZVZIP-NEXT: vslidedown.vi v9, v8, 8
-; ZVZIP-NEXT: vsetivli zero, 16, e8, m1, ta, ma
-; ZVZIP-NEXT: vslideup.vi v8, v9, 8
; ZVZIP-NEXT: ret
;
+<<<<<<< HEAD
; ZVZIP-ZVL2048-LABEL: vector_interleave8_v16i8_v2i8:
; ZVZIP-ZVL2048: # %bb.0:
; ZVZIP-ZVL2048-NEXT: vsetivli zero, 4, e8, mf4, ta, ma
@@ -11349,6 +11988,49 @@ define <16 x i8> @vector_interleave8_v16i8_v2i8(<2 x i8> %a, <2 x i8> %b, <2 x i
; ZVZIP-ZVL2048-NEXT: vsetivli zero, 16, e8, mf8, ta, ma
; ZVZIP-ZVL2048-NEXT: vslideup.vi v8, v9, 14
; ZVZIP-ZVL2048-NEXT: ret
+=======
+; ZVZIP-WIDE-LABEL: vector_interleave8_v16i8_v2i8:
+; ZVZIP-WIDE: # %bb.0:
+; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
+; ZVZIP-WIDE-NEXT: vzip.vv v16, v11, v15
+; ZVZIP-WIDE-NEXT: vzip.vv v11, v9, v13
+; ZVZIP-WIDE-NEXT: vzip.vv v9, v10, v14
+; ZVZIP-WIDE-NEXT: vzip.vv v10, v8, v12
+; ZVZIP-WIDE-NEXT: vsetivli zero, 4, e8, mf8, ta, ma
+; ZVZIP-WIDE-NEXT: vzip.vv v8, v11, v16
+; ZVZIP-WIDE-NEXT: vzip.vv v11, v10, v9
+; ZVZIP-WIDE-NEXT: vsetivli zero, 8, e8, mf8, ta, ma
+; ZVZIP-WIDE-NEXT: vzip.vv v9, v11, v8
+; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
+; ZVZIP-WIDE-NEXT: vslidedown.vi v10, v9, 2
+; ZVZIP-WIDE-NEXT: vmv1r.v v8, v9
+; ZVZIP-WIDE-NEXT: vslidedown.vi v11, v9, 4
+; ZVZIP-WIDE-NEXT: vsetivli zero, 4, e8, mf8, tu, ma
+; ZVZIP-WIDE-NEXT: vslideup.vi v8, v10, 2
+; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
+; ZVZIP-WIDE-NEXT: vslidedown.vi v10, v9, 6
+; ZVZIP-WIDE-NEXT: vsetivli zero, 6, e8, mf8, tu, ma
+; ZVZIP-WIDE-NEXT: vslideup.vi v8, v11, 4
+; ZVZIP-WIDE-NEXT: vsetivli zero, 8, e8, mf8, ta, ma
+; ZVZIP-WIDE-NEXT: vslidedown.vi v9, v9, 8
+; ZVZIP-WIDE-NEXT: vsetvli zero, zero, e8, mf8, tu, ma
+; ZVZIP-WIDE-NEXT: vslideup.vi v8, v10, 6
+; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
+; ZVZIP-WIDE-NEXT: vslidedown.vi v10, v9, 2
+; ZVZIP-WIDE-NEXT: vsetivli zero, 10, e8, mf8, tu, ma
+; ZVZIP-WIDE-NEXT: vslideup.vi v8, v9, 8
+; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
+; ZVZIP-WIDE-NEXT: vslidedown.vi v11, v9, 4
+; ZVZIP-WIDE-NEXT: vsetivli zero, 12, e8, mf8, tu, ma
+; ZVZIP-WIDE-NEXT: vslideup.vi v8, v10, 10
+; ZVZIP-WIDE-NEXT: vsetivli zero, 14, e8, mf8, tu, ma
+; ZVZIP-WIDE-NEXT: vslideup.vi v8, v11, 12
+; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
+; ZVZIP-WIDE-NEXT: vslidedown.vi v9, v9, 6
+; ZVZIP-WIDE-NEXT: vsetivli zero, 16, e8, mf8, ta, ma
+; ZVZIP-WIDE-NEXT: vslideup.vi v8, v9, 14
+; ZVZIP-WIDE-NEXT: ret
+>>>>>>> c3762a810ef6 (fixup! Rebase)
%res = call <16 x i8> @llvm.vector.interleave8.v16i8(<2 x i8> %a, <2 x i8> %b, <2 x i8> %c, <2 x i8> %d, <2 x i8> %e, <2 x i8> %f, <2 x i8> %g, <2 x i8> %h)
ret <16 x i8> %res
}
>From e00387720f8264398ffae5313e70afa884877e95 Mon Sep 17 00:00:00 2001
From: Min-Yih Hsu <min.hsu at sifive.com>
Date: Wed, 16 Sep 2026 15:25:02 -0700
Subject: [PATCH 4/8] fixup! Address review comments
---
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 40 ++++++++++-----------
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index e3c5a301f0b44..62e72ca479901 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -22269,51 +22269,51 @@ static SDValue performVSlideUpDownCombine(SDNode *N, SelectionDAG &DAG,
const RISCVSubtarget &Subtarget) {
unsigned Opcode = N->getOpcode();
assert(Opcode == RISCVISD::VSLIDEUP_VL || Opcode == RISCVISD::VSLIDEDOWN_VL);
- SDValue Passthru = N->getOperand(0);
- SDValue Val = N->getOperand(1);
- SDValue ShiftAmt = N->getOperand(2);
- SDValue Mask = N->getOperand(3);
- SDValue VL = N->getOperand(4);
// Trivial case.
if (N->getOperand(1)->isUndef())
return N->getOperand(0);
+ SDValue SlideDown = N->getOperand(1);
+ SDValue SlideUpOffset = N->getOperand(2);
+ SDValue SlideUpMask = N->getOperand(3);
+ SDValue SlideUpVL = N->getOperand(4);
+
// Given this pattern
// ```
- // %down = RISCVISD::VSLIDEDOWN_VL undef, %val, %shift, %mask, %vl0
- // %up = RISCVISD::VSLIDEUP_VL %val, %down, %shift, %mask, %vl1
+ // %down = RISCVISD::VSLIDEDOWN_VL undef, %val, %offset, %mask, %vl0
+ // %up = RISCVISD::VSLIDEUP_VL %val, %down, %offset, %mask, %vl1
// ```
// We can simplify it with `%val`, as it's doing redundant shifting.
// Note that we actually don't need to check their VLs: First, VSLIDEUP_VL
// is literally just putting %down back to their original position in %val.
// The only situation we need to worry about is actually the zeros shifted
// into VSLIDEDOWN_VL. In this scenario, the worst case would be %vl0 = VLMAX,
- // as %down is gaurantee to have those zeros. Our goal here is to ensure
+ // as %down is guaranteed to have those zeros. Our goal here is to ensure
// elements from %down that are actually inserted into %up are not those
// zeros. The number of %down that are actually inserted would be `%vl1 -
- // %shift`, and the number of non-zero elements from %down would be `VLMAX -
- // %shift`. Therefore, the invariant would be
- // `%vl1 - %shift <= VLMAX - %shift` ---> `%vl1 <= VLMAX`
+ // %offset`, and the number of non-zero elements from %down would be `VLMAX -
+ // %offset`. Therefore, the invariant would be
+ // `%vl1 - %offset <= VLMAX - %offset` ---> `%vl1 <= VLMAX`
// Thus, we will never read those zeros that are shifted in by VSLIDEDOWN_VL.
- if (Opcode != RISCVISD::VSLIDEUP_VL || !Val ||
- Val->getOpcode() != RISCVISD::VSLIDEDOWN_VL)
+ if (Opcode != RISCVISD::VSLIDEUP_VL ||
+ SlideDown.getOpcode() != RISCVISD::VSLIDEDOWN_VL)
return SDValue();
- SDValue SlideDown = Val;
SDValue SlideDownPassthru = SlideDown->getOperand(0);
SDValue SlideDownVal = SlideDown->getOperand(1);
- SDValue SlideDownShiftAmt = SlideDown->getOperand(2);
+ SDValue SlideDownOffset = SlideDown->getOperand(2);
SDValue SlideDownMask = SlideDown->getOperand(3);
SDValue SlideDownVL = SlideDown->getOperand(4);
- if (!SlideDownPassthru.isUndef() || SlideDownVal != Passthru ||
- SlideDownShiftAmt != ShiftAmt)
+ if (!SlideDownPassthru.isUndef() || SlideDownVal != N->getOperand(0) ||
+ SlideDownOffset != SlideUpOffset)
return SDValue();
// We can loosen the mask requirement in the future.
- if (SlideDownMask != Mask &&
+ if (SlideDownMask != SlideUpMask &&
(SlideDownMask.getOpcode() != RISCVISD::VMSET_VL ||
- Mask.getOpcode() != RISCVISD::VMSET_VL ||
- SlideDownMask.getOperand(0) != SlideDownVL || Mask.getOperand(0) != VL))
+ SlideUpMask.getOpcode() != RISCVISD::VMSET_VL ||
+ SlideDownMask.getOperand(0) != SlideDownVL ||
+ SlideUpMask.getOperand(0) != SlideUpVL))
return SDValue();
return SlideDownVal;
>From a7e104cda2bdcd77d1a578d20cb5ec64bdc93aea Mon Sep 17 00:00:00 2001
From: Min-Yih Hsu <min.hsu at sifive.com>
Date: Thu, 17 Sep 2026 15:35:20 -0700
Subject: [PATCH 5/8] fixup! Loosen the mask condition
---
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 20 +++++++----
.../RISCV/rvv/vector-interleave-fixed.ll | 33 +++----------------
2 files changed, 19 insertions(+), 34 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 62e72ca479901..0c5c4adb20767 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -22308,12 +22308,20 @@ static SDValue performVSlideUpDownCombine(SDNode *N, SelectionDAG &DAG,
if (!SlideDownPassthru.isUndef() || SlideDownVal != N->getOperand(0) ||
SlideDownOffset != SlideUpOffset)
return SDValue();
- // We can loosen the mask requirement in the future.
- if (SlideDownMask != SlideUpMask &&
- (SlideDownMask.getOpcode() != RISCVISD::VMSET_VL ||
- SlideUpMask.getOpcode() != RISCVISD::VMSET_VL ||
- SlideDownMask.getOperand(0) != SlideDownVL ||
- SlideUpMask.getOperand(0) != SlideUpVL))
+
+ auto isAllSetMask = [&DAG](SDValue V, SDValue VL) -> bool {
+ using namespace SDPatternMatch;
+ SDValue VMSet;
+ return sd_match(V, m_Node(RISCVISD::VMSET_VL, m_Value(VMSet))) &&
+ ((isa<RegisterSDNode>(VMSet) &&
+ cast<RegisterSDNode>(VMSet)->getReg() == RISCV::X0) ||
+ isAllOnesConstant(VMSet) ||
+ KnownBits::uge(DAG.computeKnownBits(VMSet),
+ DAG.computeKnownBits(VL))
+ .value_or(false));
+ };
+ if (!isAllSetMask(SlideDownMask, SlideDownVL) ||
+ !isAllSetMask(SlideUpMask, SlideUpVL))
return SDValue();
return SlideDownVal;
diff --git a/llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll b/llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
index b4ccc99a24d88..3f8ff869dc237 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
@@ -384,16 +384,9 @@ define <8 x i32> @vector_interleave4_v8i32_v2i32(<2 x i32> %a, <2 x i32> %b, <2
; ZVZIP-WIDE-NEXT: vzip.vv v9, v8, v10
; ZVZIP-WIDE-NEXT: vsetivli zero, 4, e32, mf2, ta, ma
; ZVZIP-WIDE-NEXT: vzip.vv v8, v9, v12
+; ZVZIP-WIDE-NEXT: vslidedown.vi v9, v8, 4
; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
-; ZVZIP-WIDE-NEXT: vslidedown.vi v9, v8, 2
-; ZVZIP-WIDE-NEXT: vsetivli zero, 4, e32, mf2, ta, ma
-; ZVZIP-WIDE-NEXT: vslidedown.vi v10, v8, 4
-; ZVZIP-WIDE-NEXT: vsetvli zero, zero, e32, mf2, tu, ma
-; ZVZIP-WIDE-NEXT: vslideup.vi v8, v9, 2
-; ZVZIP-WIDE-NEXT: vsetivli zero, 6, e32, mf2, tu, ma
-; ZVZIP-WIDE-NEXT: vslideup.vi v8, v10, 4
-; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
-; ZVZIP-WIDE-NEXT: vslidedown.vi v9, v10, 2
+; ZVZIP-WIDE-NEXT: vslidedown.vi v9, v9, 2
; ZVZIP-WIDE-NEXT: vsetivli zero, 8, e32, mf2, ta, ma
; ZVZIP-WIDE-NEXT: vslideup.vi v8, v9, 6
; ZVZIP-WIDE-NEXT: ret
@@ -11997,29 +11990,13 @@ define <16 x i8> @vector_interleave8_v16i8_v2i8(<2 x i8> %a, <2 x i8> %b, <2 x i
; ZVZIP-WIDE-NEXT: vzip.vv v9, v10, v14
; ZVZIP-WIDE-NEXT: vzip.vv v10, v8, v12
; ZVZIP-WIDE-NEXT: vsetivli zero, 4, e8, mf8, ta, ma
-; ZVZIP-WIDE-NEXT: vzip.vv v8, v11, v16
+; ZVZIP-WIDE-NEXT: vzip.vv v12, v11, v16
; ZVZIP-WIDE-NEXT: vzip.vv v11, v10, v9
; ZVZIP-WIDE-NEXT: vsetivli zero, 8, e8, mf8, ta, ma
-; ZVZIP-WIDE-NEXT: vzip.vv v9, v11, v8
-; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
-; ZVZIP-WIDE-NEXT: vslidedown.vi v10, v9, 2
-; ZVZIP-WIDE-NEXT: vmv1r.v v8, v9
-; ZVZIP-WIDE-NEXT: vslidedown.vi v11, v9, 4
-; ZVZIP-WIDE-NEXT: vsetivli zero, 4, e8, mf8, tu, ma
-; ZVZIP-WIDE-NEXT: vslideup.vi v8, v10, 2
-; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
-; ZVZIP-WIDE-NEXT: vslidedown.vi v10, v9, 6
-; ZVZIP-WIDE-NEXT: vsetivli zero, 6, e8, mf8, tu, ma
-; ZVZIP-WIDE-NEXT: vslideup.vi v8, v11, 4
-; ZVZIP-WIDE-NEXT: vsetivli zero, 8, e8, mf8, ta, ma
-; ZVZIP-WIDE-NEXT: vslidedown.vi v9, v9, 8
-; ZVZIP-WIDE-NEXT: vsetvli zero, zero, e8, mf8, tu, ma
-; ZVZIP-WIDE-NEXT: vslideup.vi v8, v10, 6
+; ZVZIP-WIDE-NEXT: vzip.vv v8, v11, v12
+; ZVZIP-WIDE-NEXT: vslidedown.vi v9, v8, 8
; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
; ZVZIP-WIDE-NEXT: vslidedown.vi v10, v9, 2
-; ZVZIP-WIDE-NEXT: vsetivli zero, 10, e8, mf8, tu, ma
-; ZVZIP-WIDE-NEXT: vslideup.vi v8, v9, 8
-; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
; ZVZIP-WIDE-NEXT: vslidedown.vi v11, v9, 4
; ZVZIP-WIDE-NEXT: vsetivli zero, 12, e8, mf8, tu, ma
; ZVZIP-WIDE-NEXT: vslideup.vi v8, v10, 10
>From 86ad67fbe7ec25fe116ccbcbf22fc0262d150348 Mon Sep 17 00:00:00 2001
From: Min-Yih Hsu <min.hsu at sifive.com>
Date: Thu, 17 Sep 2026 16:07:39 -0700
Subject: [PATCH 6/8] fixup! Add extra condition on VL
---
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 53 ++++++++++++++-------
1 file changed, 35 insertions(+), 18 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 0c5c4adb20767..826befc50f3a3 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -22285,17 +22285,6 @@ static SDValue performVSlideUpDownCombine(SDNode *N, SelectionDAG &DAG,
// %up = RISCVISD::VSLIDEUP_VL %val, %down, %offset, %mask, %vl1
// ```
// We can simplify it with `%val`, as it's doing redundant shifting.
- // Note that we actually don't need to check their VLs: First, VSLIDEUP_VL
- // is literally just putting %down back to their original position in %val.
- // The only situation we need to worry about is actually the zeros shifted
- // into VSLIDEDOWN_VL. In this scenario, the worst case would be %vl0 = VLMAX,
- // as %down is guaranteed to have those zeros. Our goal here is to ensure
- // elements from %down that are actually inserted into %up are not those
- // zeros. The number of %down that are actually inserted would be `%vl1 -
- // %offset`, and the number of non-zero elements from %down would be `VLMAX -
- // %offset`. Therefore, the invariant would be
- // `%vl1 - %offset <= VLMAX - %offset` ---> `%vl1 <= VLMAX`
- // Thus, we will never read those zeros that are shifted in by VSLIDEDOWN_VL.
if (Opcode != RISCVISD::VSLIDEUP_VL ||
SlideDown.getOpcode() != RISCVISD::VSLIDEDOWN_VL)
return SDValue();
@@ -22309,16 +22298,44 @@ static SDValue performVSlideUpDownCombine(SDNode *N, SelectionDAG &DAG,
SlideDownOffset != SlideUpOffset)
return SDValue();
- auto isAllSetMask = [&DAG](SDValue V, SDValue VL) -> bool {
+ auto isVLMax = [](SDValue VL) {
+ return (isa<RegisterSDNode>(VL) &&
+ cast<RegisterSDNode>(VL)->getReg() == RISCV::X0) ||
+ isAllOnesConstant(VL);
+ };
+
+ // Check VLs.
+ // First, we need to worry about the zeros shifted into VSLIDEDOWN_VL. In this
+ // scenario, the worst case would be %vl0 = VLMAX, as %down is guaranteed to
+ // have those zeros. Our goal here is to ensure elements from %down that are
+ // actually inserted into %up are not those zeros. The number of %down that
+ // are actually inserted would be `%vl1 - %offset`, and the number of non-zero
+ // elements from %down would be `VLMAX - %offset`. Therefore, the invariant
+ // would be
+ // `%vl1 - %offset <= VLMAX - %offset` ---> `%vl1 <= VLMAX`
+ // Thus, we will never read those zeros that are shifted in by VSLIDEDOWN_VL.
+ // Second, we don't want slideup to read pass the result produced by
+ // slidedown. So the condition for this case would be `%vl0 + %offset >=
+ // %vl1`.
+ if (!isVLMax(SlideDownVL)) {
+ KnownBits DownVLKB = DAG.computeKnownBits(SlideDownVL);
+ KnownBits UpVLKB = DAG.computeKnownBits(SlideUpVL);
+ KnownBits OffsetKB = DAG.computeKnownBits(SlideDownOffset);
+ if (!KnownBits::uge(KnownBits::add(DownVLKB, OffsetKB, /*NSW=*/false,
+ /*NUW=*/true),
+ UpVLKB)
+ .value_or(false))
+ return SDValue();
+ }
+
+ // Check Masks.
+ auto isAllSetMask = [&](SDValue V, SDValue VL) -> bool {
using namespace SDPatternMatch;
SDValue VMSet;
return sd_match(V, m_Node(RISCVISD::VMSET_VL, m_Value(VMSet))) &&
- ((isa<RegisterSDNode>(VMSet) &&
- cast<RegisterSDNode>(VMSet)->getReg() == RISCV::X0) ||
- isAllOnesConstant(VMSet) ||
- KnownBits::uge(DAG.computeKnownBits(VMSet),
- DAG.computeKnownBits(VL))
- .value_or(false));
+ (isVLMax(VMSet) || KnownBits::uge(DAG.computeKnownBits(VMSet),
+ DAG.computeKnownBits(VL))
+ .value_or(false));
};
if (!isAllSetMask(SlideDownMask, SlideDownVL) ||
!isAllSetMask(SlideUpMask, SlideUpVL))
>From 20088aecb7cedc9622e89d75c66df85991d2f7d6 Mon Sep 17 00:00:00 2001
From: Min-Yih Hsu <min.hsu at sifive.com>
Date: Fri, 18 Sep 2026 11:38:10 -0700
Subject: [PATCH 7/8] fixup! Rebase
---
.../RISCV/rvv/vector-interleave-fixed.ll | 1705 +++--------------
.../CodeGen/RISCV/rvv/vector-interleave.ll | 290 +--
2 files changed, 386 insertions(+), 1609 deletions(-)
diff --git a/llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll b/llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
index 3f8ff869dc237..f5bebd1208195 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
@@ -339,58 +339,24 @@ define <8 x i32> @vector_interleave4_v8i32_v2i32(<2 x i32> %a, <2 x i32> %b, <2
; ZVZIP-NEXT: vsetivli zero, 4, e32, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v11, v8, v10
-; ZVZIP-NEXT: vsetivli zero, 4, e32, m1, ta, ma
-<<<<<<< HEAD
-; ZVZIP-NEXT: vslideup.vi v12, v8, 2
-; ZVZIP-NEXT: vslideup.vi v11, v9, 2
; ZVZIP-NEXT: vsetivli zero, 8, e32, m2, ta, ma
-=======
->>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: vzip.vv v8, v11, v12
; ZVZIP-NEXT: ret
;
-<<<<<<< HEAD
; ZVZIP-ZVL2048-LABEL: vector_interleave4_v8i32_v2i32:
; ZVZIP-ZVL2048: # %bb.0:
; ZVZIP-ZVL2048-NEXT: vsetivli zero, 4, e32, m1, ta, ma
; ZVZIP-ZVL2048-NEXT: vzip.vv v12, v9, v11
; ZVZIP-ZVL2048-NEXT: vzip.vv v9, v8, v10
-; ZVZIP-ZVL2048-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
-; ZVZIP-ZVL2048-NEXT: vslidedown.vi v8, v12, 2
-; ZVZIP-ZVL2048-NEXT: vslidedown.vi v10, v9, 2
-; ZVZIP-ZVL2048-NEXT: vsetivli zero, 4, e32, mf2, ta, ma
-; ZVZIP-ZVL2048-NEXT: vslideup.vi v12, v8, 2
-; ZVZIP-ZVL2048-NEXT: vslideup.vi v9, v10, 2
; ZVZIP-ZVL2048-NEXT: vsetivli zero, 8, e32, m1, ta, ma
; ZVZIP-ZVL2048-NEXT: vzip.vv v8, v9, v12
-; ZVZIP-ZVL2048-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
-; ZVZIP-ZVL2048-NEXT: vslidedown.vi v9, v8, 2
; ZVZIP-ZVL2048-NEXT: vsetivli zero, 4, e32, mf2, ta, ma
-; ZVZIP-ZVL2048-NEXT: vslidedown.vi v10, v8, 4
-; ZVZIP-ZVL2048-NEXT: vsetvli zero, zero, e32, mf2, tu, ma
-; ZVZIP-ZVL2048-NEXT: vslideup.vi v8, v9, 2
-; ZVZIP-ZVL2048-NEXT: vsetivli zero, 6, e32, mf2, tu, ma
-; ZVZIP-ZVL2048-NEXT: vslideup.vi v8, v10, 4
+; ZVZIP-ZVL2048-NEXT: vslidedown.vi v9, v8, 4
; ZVZIP-ZVL2048-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
-; ZVZIP-ZVL2048-NEXT: vslidedown.vi v9, v10, 2
+; ZVZIP-ZVL2048-NEXT: vslidedown.vi v9, v9, 2
; ZVZIP-ZVL2048-NEXT: vsetivli zero, 8, e32, mf2, ta, ma
; ZVZIP-ZVL2048-NEXT: vslideup.vi v8, v9, 6
; ZVZIP-ZVL2048-NEXT: ret
-=======
-; ZVZIP-WIDE-LABEL: vector_interleave4_v8i32_v2i32:
-; ZVZIP-WIDE: # %bb.0:
-; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
-; ZVZIP-WIDE-NEXT: vzip.vv v12, v9, v11
-; ZVZIP-WIDE-NEXT: vzip.vv v9, v8, v10
-; ZVZIP-WIDE-NEXT: vsetivli zero, 4, e32, mf2, ta, ma
-; ZVZIP-WIDE-NEXT: vzip.vv v8, v9, v12
-; ZVZIP-WIDE-NEXT: vslidedown.vi v9, v8, 4
-; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
-; ZVZIP-WIDE-NEXT: vslidedown.vi v9, v9, 2
-; ZVZIP-WIDE-NEXT: vsetivli zero, 8, e32, mf2, ta, ma
-; ZVZIP-WIDE-NEXT: vslideup.vi v8, v9, 6
-; ZVZIP-WIDE-NEXT: ret
->>>>>>> c3762a810ef6 (fixup! Rebase)
%res = call <8 x i32> @llvm.vector.interleave4.v8i32(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c, <2 x i32> %d)
ret <8 x i32> %res
}
@@ -9348,48 +9314,6 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vs8r.v v8, (a5) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: addi a5, a7, 128
; ZVZIP-NEXT: vslidedown.vx v8, v16, a4
-<<<<<<< HEAD
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vle8.v v16, (a5)
-; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 4
-; ZVZIP-NEXT: mv a6, a5
-; ZVZIP-NEXT: slli a5, a5, 1
-; ZVZIP-NEXT: add a6, a6, a5
-; ZVZIP-NEXT: slli a5, a5, 2
-; ZVZIP-NEXT: add a5, a5, a6
-; ZVZIP-NEXT: add a5, sp, a5
-; ZVZIP-NEXT: addi a5, a5, 16
-; ZVZIP-NEXT: vs8r.v v16, (a5) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v16, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v8, v16
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v24, v8, a4
-; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 4
-; ZVZIP-NEXT: mv a6, a5
-; ZVZIP-NEXT: slli a5, a5, 4
-; ZVZIP-NEXT: add a5, a5, a6
-; ZVZIP-NEXT: add a5, sp, a5
-; ZVZIP-NEXT: addi a5, a5, 16
-; ZVZIP-NEXT: vs8r.v v24, (a5) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 3
-; ZVZIP-NEXT: mv a6, a5
-; ZVZIP-NEXT: slli a5, a5, 2
-; ZVZIP-NEXT: add a6, a6, a5
-; ZVZIP-NEXT: slli a5, a5, 3
-; ZVZIP-NEXT: add a5, a5, a6
-; ZVZIP-NEXT: add a5, sp, a5
-; ZVZIP-NEXT: addi a5, a5, 656
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
-=======
->>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: csrr a6, vlenb
; ZVZIP-NEXT: slli a6, a6, 3
; ZVZIP-NEXT: mv t0, a6
@@ -9423,107 +9347,6 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: addi a5, a5, 656
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v8, v8, a4
-<<<<<<< HEAD
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vle8.v v16, (a5)
-; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 3
-; ZVZIP-NEXT: mv a6, a5
-; ZVZIP-NEXT: slli a5, a5, 4
-; ZVZIP-NEXT: add a5, a5, a6
-; ZVZIP-NEXT: add a5, sp, a5
-; ZVZIP-NEXT: addi a5, a5, 16
-; ZVZIP-NEXT: vs8r.v v16, (a5) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v16, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v16, v8
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v24, v8, a4
-; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 3
-; ZVZIP-NEXT: mv a6, a5
-; ZVZIP-NEXT: slli a5, a5, 1
-; ZVZIP-NEXT: add a6, a6, a5
-; ZVZIP-NEXT: slli a5, a5, 1
-; ZVZIP-NEXT: add a6, a6, a5
-; ZVZIP-NEXT: slli a5, a5, 1
-; ZVZIP-NEXT: add a5, a5, a6
-; ZVZIP-NEXT: add a5, sp, a5
-; ZVZIP-NEXT: addi a5, a5, 16
-; ZVZIP-NEXT: vs8r.v v24, (a5) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v0, v24, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vle8.v v8, (a1)
-; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 3
-; ZVZIP-NEXT: mv a6, a5
-; ZVZIP-NEXT: slli a5, a5, 1
-; ZVZIP-NEXT: add a6, a6, a5
-; ZVZIP-NEXT: slli a5, a5, 2
-; ZVZIP-NEXT: add a5, a5, a6
-; ZVZIP-NEXT: add a5, sp, a5
-; ZVZIP-NEXT: addi a5, a5, 16
-; ZVZIP-NEXT: vs8r.v v8, (a5) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: addi a5, a7, 256
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v8, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vle8.v v8, (a5)
-; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 3
-; ZVZIP-NEXT: mv a6, a5
-; ZVZIP-NEXT: slli a5, a5, 3
-; ZVZIP-NEXT: add a5, a5, a6
-; ZVZIP-NEXT: add a5, sp, a5
-; ZVZIP-NEXT: addi a5, a5, 16
-; ZVZIP-NEXT: vs8r.v v8, (a5) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v24, v8, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v8, v16, v24
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v8, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v8, v16, a4
-; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 5
-; ZVZIP-NEXT: mv a6, a5
-; ZVZIP-NEXT: slli a5, a5, 1
-; ZVZIP-NEXT: add a5, a5, a6
-; ZVZIP-NEXT: add a5, sp, a5
-; ZVZIP-NEXT: addi a5, a5, 16
-; ZVZIP-NEXT: vs8r.v v8, (a5) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v8, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v16, v0
-; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 4
-; ZVZIP-NEXT: mv a6, a5
-; ZVZIP-NEXT: slli a5, a5, 2
-; ZVZIP-NEXT: add a6, a6, a5
-; ZVZIP-NEXT: slli a5, a5, 1
-; ZVZIP-NEXT: add a5, a5, a6
-; ZVZIP-NEXT: add a5, sp, a5
-; ZVZIP-NEXT: addi a5, a5, 16
-; ZVZIP-NEXT: vs8r.v v24, (a5) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 3
-; ZVZIP-NEXT: mv a6, a5
-; ZVZIP-NEXT: slli a5, a5, 2
-; ZVZIP-NEXT: add a6, a6, a5
-; ZVZIP-NEXT: slli a5, a5, 3
-; ZVZIP-NEXT: add a5, a5, a6
-; ZVZIP-NEXT: add a5, sp, a5
-; ZVZIP-NEXT: addi a5, a5, 784
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
-=======
->>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: csrr a6, vlenb
; ZVZIP-NEXT: slli a6, a6, 3
; ZVZIP-NEXT: mv t0, a6
@@ -9563,7 +9386,7 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vs8r.v v16, (a5) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v16, v16, a4
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v16, v8
; ZVZIP-NEXT: csrr a5, vlenb
; ZVZIP-NEXT: slli a5, a5, 4
@@ -9659,24 +9482,7 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: addi a6, a6, 16
; ZVZIP-NEXT: vs8r.v v8, (a6) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-<<<<<<< HEAD
-; ZVZIP-NEXT: vle8.v v16, (a5)
-; ZVZIP-NEXT: csrr a5, vlenb
-; ZVZIP-NEXT: slli a5, a5, 6
-; ZVZIP-NEXT: add a5, sp, a5
-; ZVZIP-NEXT: addi a5, a5, 16
-; ZVZIP-NEXT: vs8r.v v16, (a5) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v16, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v16, v8
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v24, v8, a4
-=======
; ZVZIP-NEXT: vle8.v v8, (a5)
->>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: csrr a5, vlenb
; ZVZIP-NEXT: slli a5, a5, 3
; ZVZIP-NEXT: mv a6, a5
@@ -9709,64 +9515,7 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vs8r.v v8, (a5) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: addi a1, a1, 128
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-<<<<<<< HEAD
-; ZVZIP-NEXT: vslidedown.vx v16, v16, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vle8.v v24, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a5, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a5
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v24, v24, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v0, v24, v16
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v0, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v0, v16, a4
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a5, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a5, a5, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a5
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v0, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v16, v8
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a5, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a5, a5, a1
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: add a1, a1, a5
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a5, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a5, a5, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a1, a1, a5
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 400
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
-=======
; ZVZIP-NEXT: vslidedown.vx v8, v8, a4
->>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: csrr a5, vlenb
; ZVZIP-NEXT: slli a5, a5, 3
; ZVZIP-NEXT: mv a6, a5
@@ -9805,13 +9554,6 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v16, v16, a4
-<<<<<<< HEAD
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v16, v8
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
-=======
->>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vle8.v v24, (a3)
; ZVZIP-NEXT: csrr a1, vlenb
@@ -9824,7 +9566,7 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v24, v24, a4
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v24, v16
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 8
@@ -9903,7 +9645,7 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v24, v16
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
@@ -9917,94 +9659,51 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v16, v0, a4
-<<<<<<< HEAD
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v16, v8
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
-=======
->>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a3, a3, a1
-<<<<<<< HEAD
-; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v8, v24, v16
+; ZVZIP-NEXT: vzip.vv v0, v16, v24
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: slli a1, a1, 5
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v8, a4
+; ZVZIP-NEXT: vslidedown.vx v16, v0, a4
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 5
; ZVZIP-NEXT: mv a3, a1
-=======
->>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-<<<<<<< HEAD
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v16, v8
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v24, v8, a4
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
-; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
-=======
->>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
@@ -10014,69 +9713,32 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v0, v16, v24
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vzip.vv v0, v24, v16
+; ZVZIP-NEXT: addi a1, sp, 16
; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v16, v0, a4
-<<<<<<< HEAD
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v0, v16, v8
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v0, a4
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-=======
->>>>>>> c3762a810ef6 (fixup! Rebase)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-<<<<<<< HEAD
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v8, v24, v16
-=======
-; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
->>>>>>> c3762a810ef6 (fixup! Rebase)
+; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
@@ -10084,34 +9746,22 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-<<<<<<< HEAD
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v24, v8
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v16, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v16, v8, a4
-; ZVZIP-NEXT: addi a1, sp, 16
-; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v16, a4
+; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: slli a1, a1, 6
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: mv a3, a1
@@ -10120,156 +9770,90 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v8, v24, v16
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v0, v8, a4
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v8, v0, a4
+; ZVZIP-NEXT: vzip.vv v0, v16, v8
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v0, v8, a4
+; ZVZIP-NEXT: vslidedown.vx v8, v0, a4
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: slli a1, a1, 6
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v0, v16
+; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v24, v24, a4
-; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vzip.vv v8, v16, v24
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v16, v8, a4
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v0, v16, v24
+; ZVZIP-NEXT: vzip.vv v16, v8, v0
+; ZVZIP-NEXT: addi a1, sp, 16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-=======
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v0, v24, v16
-; ZVZIP-NEXT: addi a1, sp, 16
->>>>>>> c3762a810ef6 (fixup! Rebase)
-; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v0, a4
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v8, v0, v24
+; ZVZIP-NEXT: vse8.v v16, (a0)
; ZVZIP-NEXT: csrr a1, vlenb
-<<<<<<< HEAD
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v0, v24
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
; ZVZIP-NEXT: vslidedown.vx v24, v16, a4
; ZVZIP-NEXT: csrr a1, vlenb
-=======
->>>>>>> c3762a810ef6 (fixup! Rebase)
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: slli a1, a1, 5
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-<<<<<<< HEAD
; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: addi a1, a0, 1536
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v0, v24
+; ZVZIP-NEXT: vse8.v v8, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
@@ -10279,64 +9863,34 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v24, v16, a4
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 6
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: addi a1, sp, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v8, v24
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: slli a1, a1, 5
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v16, a4
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v8, v0, v24
+; ZVZIP-NEXT: addi a1, a0, 1024
+; ZVZIP-NEXT: vse8.v v8, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 6
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 8
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v16, v8
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v24, v8, a4
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v0, v8, v24
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
@@ -10346,720 +9900,13 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vzip.vv v24, v0, v16
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-=======
-; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
->>>>>>> c3762a810ef6 (fixup! Rebase)
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v8, v16
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v24, a4
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 6
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-<<<<<<< HEAD
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v24, v16, v8
-=======
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v0, v16, v8
->>>>>>> c3762a810ef6 (fixup! Rebase)
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v0, a4
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 6
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v8, v16, v24
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v8, a4
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v8, v0
-; ZVZIP-NEXT: addi a1, sp, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vzip.vv v8, v0, v24
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v16, (a0)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v0, v24
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v24, v16, a4
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: addi a1, a0, 1536
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v8, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v8, v0, v24
-; ZVZIP-NEXT: addi a1, a0, 1024
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v8, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 6
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v0, v8, v24
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vzip.vv v24, v0, v16
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vzip.vv v8, v0, v16
-; ZVZIP-NEXT: addi a1, a0, 512
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v24, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 8
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v0, v24
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v24, v8, a4
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 8
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: addi a1, a0, 256
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v16, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 6
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v0, v24
-; ZVZIP-NEXT: addi a1, a0, 128
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v16, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v0, v24, v16
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 6
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vzip.vv v16, v0, v8
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vzip.vv v8, v24, v0
-; ZVZIP-NEXT: addi a1, a0, 1792
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v16, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v0, v24
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v24, v8, a4
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: addi a1, a0, 1664
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v16, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v8, v24
-; ZVZIP-NEXT: addi a1, a0, 1280
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v16, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v24, v8
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vzip.vv v8, v0, v24
-; ZVZIP-NEXT: addi a1, a0, 1152
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v16, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v8, v0
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v0, v24, a4
-; ZVZIP-NEXT: addi a1, a0, 768
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v16, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v0, v24
-; ZVZIP-NEXT: addi a1, a0, 640
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v16, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 7
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v0, v24
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 6
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v24, v24, a4
-; ZVZIP-NEXT: addi a1, a0, 384
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v16, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 8
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v24, v0
-; ZVZIP-NEXT: addi a1, a0, 1920
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v16, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m4, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v0, v24
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v8, a4
-; ZVZIP-NEXT: addi a1, a0, 1408
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v16, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v16, v8, v24
-<<<<<<< HEAD
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v24, v16, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v16, v24, a4
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v24, v16, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v8, v24, v0
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 8
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v8, a4
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v0, v24, v8
-; ZVZIP-NEXT: vmv.v.v v24, v0
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v8, v0, a4
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 7
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vzip.vv v8, v16, v0
-; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v8, a4
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vslideup.vx v8, v16, a4
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vslideup.vx v0, v16, a4
-; ZVZIP-NEXT: vse8.v v8, (a0)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 6
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vslideup.vx v8, v16, a4
-; ZVZIP-NEXT: addi a1, a0, 1536
-; ZVZIP-NEXT: vse8.v v0, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vslideup.vx v24, v16, a4
-; ZVZIP-NEXT: addi a1, a0, 1024
-; ZVZIP-NEXT: vse8.v v8, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vslideup.vx v0, v8, a4
-; ZVZIP-NEXT: addi a1, a0, 512
-; ZVZIP-NEXT: vse8.v v24, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vslideup.vx v8, v16, a4
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 8
+; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
@@ -11071,123 +9918,108 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vslideup.vx v16, v24, a4
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v8, v0, v16
+; ZVZIP-NEXT: addi a1, a0, 512
+; ZVZIP-NEXT: vse8.v v24, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 8
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: addi a1, a0, 256
-; ZVZIP-NEXT: vse8.v v8, (a1)
-; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a1, a1, a3
-; ZVZIP-NEXT: add a1, sp, a1
-; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vzip.vv v8, v24, v16
-; ZVZIP-NEXT: addi a1, a0, 128
-; ZVZIP-NEXT: csrr a3, vlenb
-; ZVZIP-NEXT: slli a3, a3, 8
-; ZVZIP-NEXT: add a3, sp, a3
-; ZVZIP-NEXT: addi a3, a3, 16
-; ZVZIP-NEXT: vl8r.v v16, (a3) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vse8.v v16, (a1)
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v16, v0, v24
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v8, a4
-; ZVZIP-NEXT: addi a1, a0, 1792
+; ZVZIP-NEXT: vslidedown.vx v24, v8, a4
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 8
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: addi a1, a0, 256
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v0, (a1)
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
-; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: slli a1, a1, 6
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vslideup.vx v24, v0, a4
+; ZVZIP-NEXT: vzip.vv v16, v0, v24
+; ZVZIP-NEXT: addi a1, a0, 128
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
-; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v0, v24, v16
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 6
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vslideup.vx v24, v0, a4
+; ZVZIP-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vzip.vv v16, v0, v8
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: addi a1, a0, 1664
-; ZVZIP-NEXT: csrr a3, vlenb
-; ZVZIP-NEXT: slli a3, a3, 5
-; ZVZIP-NEXT: mv a5, a3
-; ZVZIP-NEXT: slli a3, a3, 3
-; ZVZIP-NEXT: add a3, a3, a5
-; ZVZIP-NEXT: add a3, sp, a3
-; ZVZIP-NEXT: addi a3, a3, 16
-; ZVZIP-NEXT: vl8r.v v24, (a3) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vse8.v v24, (a1)
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v8, v24, v0
+; ZVZIP-NEXT: addi a1, a0, 1792
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
@@ -11195,68 +10027,69 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vslideup.vx v24, v0, a4
+; ZVZIP-NEXT: vzip.vv v16, v0, v24
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v24, v8, a4
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vs8r.v v24, (a1) # vscale x 64-byte Folded Spill
-; ZVZIP-NEXT: addi a1, a0, 1280
-; ZVZIP-NEXT: csrr a3, vlenb
-; ZVZIP-NEXT: slli a3, a3, 3
-; ZVZIP-NEXT: mv a5, a3
-; ZVZIP-NEXT: slli a3, a3, 5
-; ZVZIP-NEXT: add a3, a3, a5
-; ZVZIP-NEXT: add a3, sp, a3
-; ZVZIP-NEXT: addi a3, a3, 16
-; ZVZIP-NEXT: vl8r.v v24, (a3) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vse8.v v24, (a1)
+; ZVZIP-NEXT: addi a1, a0, 1664
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v16, v8, v24
+; ZVZIP-NEXT: addi a1, a0, 1280
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vslideup.vx v24, v0, a4
-; ZVZIP-NEXT: addi a1, a0, 1152
-; ZVZIP-NEXT: csrr a3, vlenb
-; ZVZIP-NEXT: slli a3, a3, 4
-; ZVZIP-NEXT: mv a5, a3
-; ZVZIP-NEXT: slli a3, a3, 4
-; ZVZIP-NEXT: add a3, a3, a5
-; ZVZIP-NEXT: add a3, sp, a3
-; ZVZIP-NEXT: addi a3, a3, 16
-; ZVZIP-NEXT: vl8r.v v0, (a3) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vse8.v v0, (a1)
-; ZVZIP-NEXT: vslideup.vx v8, v16, a4
-; ZVZIP-NEXT: addi a1, a0, 768
-; ZVZIP-NEXT: vse8.v v24, (a1)
+; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: mv a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a3
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v16, v24, v8
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
@@ -11272,105 +10105,130 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vslideup.vx v0, v16, a4
-; ZVZIP-NEXT: addi a1, a0, 640
-; ZVZIP-NEXT: vse8.v v8, (a1)
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v8, v0, v24
+; ZVZIP-NEXT: addi a1, a0, 1152
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v16, v8, v0
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
+; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vslideup.vx v8, v16, a4
-; ZVZIP-NEXT: addi a1, a0, 384
-; ZVZIP-NEXT: vse8.v v8, (a1)
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v0, v24, a4
+; ZVZIP-NEXT: addi a1, a0, 768
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 4
+; ZVZIP-NEXT: slli a1, a1, 5
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v8, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v16, v0, v24
+; ZVZIP-NEXT: addi a1, a0, 640
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 6
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vslideup.vx v8, v16, a4
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 7
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v16, v0, v24
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 6
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
-; ZVZIP-NEXT: add a3, a3, a1
-; ZVZIP-NEXT: slli a1, a1, 4
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
+; ZVZIP-NEXT: vslidedown.vx v24, v24, a4
+; ZVZIP-NEXT: addi a1, a0, 384
+; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
+; ZVZIP-NEXT: vse8.v v16, (a1)
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: slli a1, a1, 8
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v16, v24, v0
+; ZVZIP-NEXT: addi a1, a0, 1920
+; ZVZIP-NEXT: vse8.v v16, (a1)
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 5
; ZVZIP-NEXT: mv a3, a1
-; ZVZIP-NEXT: slli a1, a1, 2
-; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v16, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
; ZVZIP-NEXT: csrr a1, vlenb
-; ZVZIP-NEXT: slli a1, a1, 5
+; ZVZIP-NEXT: slli a1, a1, 3
; ZVZIP-NEXT: mv a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
; ZVZIP-NEXT: add a3, a3, a1
; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a3, a3, a1
+; ZVZIP-NEXT: slli a1, a1, 2
; ZVZIP-NEXT: add a1, a1, a3
; ZVZIP-NEXT: add a1, sp, a1
; ZVZIP-NEXT: addi a1, a1, 16
-; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vzip.vv v8, v24, v16
-; ZVZIP-NEXT: addi a1, a0, 1920
-; ZVZIP-NEXT: csrr a3, vlenb
-; ZVZIP-NEXT: slli a3, a3, 3
-; ZVZIP-NEXT: mv a5, a3
-; ZVZIP-NEXT: slli a3, a3, 1
-; ZVZIP-NEXT: add a5, a5, a3
-; ZVZIP-NEXT: slli a3, a3, 4
-; ZVZIP-NEXT: add a3, a3, a5
-; ZVZIP-NEXT: add a3, sp, a3
-; ZVZIP-NEXT: addi a3, a3, 16
-; ZVZIP-NEXT: vl8r.v v16, (a3) # vscale x 64-byte Folded Reload
-; ZVZIP-NEXT: vse8.v v16, (a1)
+; ZVZIP-NEXT: vl8r.v v0, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v16, v0, v24
; ZVZIP-NEXT: vsetvli zero, a4, e8, m8, ta, ma
-; ZVZIP-NEXT: vslidedown.vx v16, v8, a4
+; ZVZIP-NEXT: vslidedown.vx v8, v8, a4
; ZVZIP-NEXT: addi a1, a0, 1408
; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
-; ZVZIP-NEXT: vse8.v v0, (a1)
-; ZVZIP-NEXT: vslideup.vx v8, v16, a4
-=======
->>>>>>> c3762a810ef6 (fixup! Rebase)
+; ZVZIP-NEXT: vse8.v v16, (a1)
+; ZVZIP-NEXT: csrr a1, vlenb
+; ZVZIP-NEXT: slli a1, a1, 3
+; ZVZIP-NEXT: mv a2, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a2, a2, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a2, a2, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a2, a2, a1
+; ZVZIP-NEXT: slli a1, a1, 1
+; ZVZIP-NEXT: add a1, a1, a2
+; ZVZIP-NEXT: add a1, sp, a1
+; ZVZIP-NEXT: addi a1, a1, 16
+; ZVZIP-NEXT: vl8r.v v24, (a1) # vscale x 64-byte Folded Reload
+; ZVZIP-NEXT: vzip.vv v16, v8, v24
; ZVZIP-NEXT: addi a0, a0, 896
-; ZVZIP-NEXT: vsetvli zero, a2, e8, m8, ta, ma
; ZVZIP-NEXT: vse8.v v16, (a0)
; ZVZIP-NEXT: csrr a0, vlenb
; ZVZIP-NEXT: slli a0, a0, 4
@@ -11381,44 +10239,22 @@ define <2048 x i8> @vector_interleave4_v512i8_v2048i8(<512 x i8> %v0, <512 x i8>
; ZVZIP-NEXT: addi sp, sp, 16
; ZVZIP-NEXT: ret
;
-<<<<<<< HEAD
; ZVZIP-ZVL2048-LABEL: vector_interleave4_v512i8_v2048i8:
; ZVZIP-ZVL2048: # %bb.0:
; ZVZIP-ZVL2048-NEXT: li a0, 1024
; ZVZIP-ZVL2048-NEXT: vsetvli zero, a0, e8, m4, ta, ma
; ZVZIP-ZVL2048-NEXT: vzip.vv v16, v10, v14
-; ZVZIP-ZVL2048-NEXT: vzip.vv v20, v8, v12
-; ZVZIP-ZVL2048-NEXT: vzip.vv v8, v20, v16
; ZVZIP-ZVL2048-NEXT: li a1, 512
; ZVZIP-ZVL2048-NEXT: vsetvli zero, a1, e8, m4, ta, ma
-; ZVZIP-ZVL2048-NEXT: vslidedown.vx v24, v8, a1
-; ZVZIP-ZVL2048-NEXT: vslidedown.vx v16, v16, a1
-; ZVZIP-ZVL2048-NEXT: vslidedown.vx v20, v20, a1
+; ZVZIP-ZVL2048-NEXT: vslidedown.vx v20, v16, a1
; ZVZIP-ZVL2048-NEXT: vsetvli zero, a0, e8, m4, ta, ma
-; ZVZIP-ZVL2048-NEXT: vzip.vv v12, v20, v16
+; ZVZIP-ZVL2048-NEXT: vzip.vv v24, v8, v12
; ZVZIP-ZVL2048-NEXT: vsetvli zero, a1, e8, m4, ta, ma
-; ZVZIP-ZVL2048-NEXT: vslidedown.vx v16, v12, a1
+; ZVZIP-ZVL2048-NEXT: vslidedown.vx v28, v24, a1
; ZVZIP-ZVL2048-NEXT: vsetvli zero, a0, e8, m4, ta, ma
-; ZVZIP-ZVL2048-NEXT: vslideup.vx v8, v24, a1
-; ZVZIP-ZVL2048-NEXT: vslideup.vx v12, v16, a1
+; ZVZIP-ZVL2048-NEXT: vzip.vv v8, v24, v16
+; ZVZIP-ZVL2048-NEXT: vzip.vv v12, v28, v20
; ZVZIP-ZVL2048-NEXT: ret
-=======
-; ZVZIP-WIDE-LABEL: vector_interleave4_v512i8_v2048i8:
-; ZVZIP-WIDE: # %bb.0:
-; ZVZIP-WIDE-NEXT: li a0, 512
-; ZVZIP-WIDE-NEXT: vsetvli zero, a0, e8, m2, ta, ma
-; ZVZIP-WIDE-NEXT: vzip.vv v16, v10, v14
-; ZVZIP-WIDE-NEXT: vsetvli zero, a0, e8, m4, ta, ma
-; ZVZIP-WIDE-NEXT: vslidedown.vx v20, v16, a0
-; ZVZIP-WIDE-NEXT: vsetvli zero, a0, e8, m2, ta, ma
-; ZVZIP-WIDE-NEXT: vzip.vv v24, v8, v12
-; ZVZIP-WIDE-NEXT: vsetvli zero, a0, e8, m4, ta, ma
-; ZVZIP-WIDE-NEXT: vslidedown.vx v28, v24, a0
-; ZVZIP-WIDE-NEXT: vsetvli zero, a0, e8, m2, ta, ma
-; ZVZIP-WIDE-NEXT: vzip.vv v8, v24, v16
-; ZVZIP-WIDE-NEXT: vzip.vv v12, v28, v20
-; ZVZIP-WIDE-NEXT: ret
->>>>>>> c3762a810ef6 (fixup! Rebase)
%v = call <2048 x i8> @llvm.vector.interleave4(<512 x i8> %v0, <512 x i8> %v1, <512 x i8> %v2, <512 x i8> %v3)
ret <2048 x i8> %v
}
@@ -11902,28 +10738,13 @@ define <16 x i8> @vector_interleave8_v16i8_v2i8(<2 x i8> %a, <2 x i8> %b, <2 x i
; ZVZIP-NEXT: vzip.vv v11, v9, v13
; ZVZIP-NEXT: vzip.vv v9, v10, v14
; ZVZIP-NEXT: vzip.vv v10, v8, v12
-; ZVZIP-NEXT: vsetivli zero, 4, e8, mf4, ta, ma
-<<<<<<< HEAD
-; ZVZIP-NEXT: vslideup.vi v16, v8, 2
-; ZVZIP-NEXT: vslideup.vi v11, v12, 2
-; ZVZIP-NEXT: vslideup.vi v9, v13, 2
-; ZVZIP-NEXT: vslideup.vi v10, v14, 2
; ZVZIP-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-=======
->>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: vzip.vv v12, v11, v16
; ZVZIP-NEXT: vzip.vv v11, v10, v9
-; ZVZIP-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
-<<<<<<< HEAD
-; ZVZIP-NEXT: vslideup.vi v12, v8, 4
-; ZVZIP-NEXT: vslideup.vi v11, v9, 4
; ZVZIP-NEXT: vsetivli zero, 16, e8, m1, ta, ma
-=======
->>>>>>> c3762a810ef6 (fixup! Rebase)
; ZVZIP-NEXT: vzip.vv v8, v11, v12
; ZVZIP-NEXT: ret
;
-<<<<<<< HEAD
; ZVZIP-ZVL2048-LABEL: vector_interleave8_v16i8_v2i8:
; ZVZIP-ZVL2048: # %bb.0:
; ZVZIP-ZVL2048-NEXT: vsetivli zero, 4, e8, mf4, ta, ma
@@ -11931,46 +10752,15 @@ define <16 x i8> @vector_interleave8_v16i8_v2i8(<2 x i8> %a, <2 x i8> %b, <2 x i
; ZVZIP-ZVL2048-NEXT: vzip.vv v11, v9, v13
; ZVZIP-ZVL2048-NEXT: vzip.vv v9, v10, v14
; ZVZIP-ZVL2048-NEXT: vzip.vv v10, v8, v12
-; ZVZIP-ZVL2048-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
-; ZVZIP-ZVL2048-NEXT: vslidedown.vi v8, v16, 2
-; ZVZIP-ZVL2048-NEXT: vslidedown.vi v12, v11, 2
-; ZVZIP-ZVL2048-NEXT: vslidedown.vi v13, v9, 2
-; ZVZIP-ZVL2048-NEXT: vslidedown.vi v14, v10, 2
-; ZVZIP-ZVL2048-NEXT: vsetivli zero, 4, e8, mf8, ta, ma
-; ZVZIP-ZVL2048-NEXT: vslideup.vi v16, v8, 2
-; ZVZIP-ZVL2048-NEXT: vslideup.vi v11, v12, 2
-; ZVZIP-ZVL2048-NEXT: vslideup.vi v9, v13, 2
-; ZVZIP-ZVL2048-NEXT: vslideup.vi v10, v14, 2
; ZVZIP-ZVL2048-NEXT: vsetivli zero, 8, e8, mf4, ta, ma
-; ZVZIP-ZVL2048-NEXT: vzip.vv v8, v11, v16
+; ZVZIP-ZVL2048-NEXT: vzip.vv v12, v11, v16
; ZVZIP-ZVL2048-NEXT: vzip.vv v11, v10, v9
-; ZVZIP-ZVL2048-NEXT: vsetivli zero, 4, e8, mf8, ta, ma
-; ZVZIP-ZVL2048-NEXT: vslidedown.vi v9, v8, 4
-; ZVZIP-ZVL2048-NEXT: vslidedown.vi v10, v11, 4
-; ZVZIP-ZVL2048-NEXT: vsetivli zero, 8, e8, mf8, ta, ma
-; ZVZIP-ZVL2048-NEXT: vslideup.vi v8, v9, 4
-; ZVZIP-ZVL2048-NEXT: vslideup.vi v11, v10, 4
; ZVZIP-ZVL2048-NEXT: vsetivli zero, 16, e8, mf4, ta, ma
-; ZVZIP-ZVL2048-NEXT: vzip.vv v9, v11, v8
-; ZVZIP-ZVL2048-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
-; ZVZIP-ZVL2048-NEXT: vslidedown.vi v10, v9, 2
-; ZVZIP-ZVL2048-NEXT: vmv1r.v v8, v9
-; ZVZIP-ZVL2048-NEXT: vslidedown.vi v11, v9, 4
-; ZVZIP-ZVL2048-NEXT: vsetivli zero, 4, e8, mf8, tu, ma
-; ZVZIP-ZVL2048-NEXT: vslideup.vi v8, v10, 2
-; ZVZIP-ZVL2048-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
-; ZVZIP-ZVL2048-NEXT: vslidedown.vi v10, v9, 6
-; ZVZIP-ZVL2048-NEXT: vsetivli zero, 6, e8, mf8, tu, ma
-; ZVZIP-ZVL2048-NEXT: vslideup.vi v8, v11, 4
+; ZVZIP-ZVL2048-NEXT: vzip.vv v8, v11, v12
; ZVZIP-ZVL2048-NEXT: vsetivli zero, 8, e8, mf8, ta, ma
-; ZVZIP-ZVL2048-NEXT: vslidedown.vi v9, v9, 8
-; ZVZIP-ZVL2048-NEXT: vsetvli zero, zero, e8, mf8, tu, ma
-; ZVZIP-ZVL2048-NEXT: vslideup.vi v8, v10, 6
+; ZVZIP-ZVL2048-NEXT: vslidedown.vi v9, v8, 8
; ZVZIP-ZVL2048-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
; ZVZIP-ZVL2048-NEXT: vslidedown.vi v10, v9, 2
-; ZVZIP-ZVL2048-NEXT: vsetivli zero, 10, e8, mf8, tu, ma
-; ZVZIP-ZVL2048-NEXT: vslideup.vi v8, v9, 8
-; ZVZIP-ZVL2048-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
; ZVZIP-ZVL2048-NEXT: vslidedown.vi v11, v9, 4
; ZVZIP-ZVL2048-NEXT: vsetivli zero, 12, e8, mf8, tu, ma
; ZVZIP-ZVL2048-NEXT: vslideup.vi v8, v10, 10
@@ -11981,33 +10771,6 @@ define <16 x i8> @vector_interleave8_v16i8_v2i8(<2 x i8> %a, <2 x i8> %b, <2 x i
; ZVZIP-ZVL2048-NEXT: vsetivli zero, 16, e8, mf8, ta, ma
; ZVZIP-ZVL2048-NEXT: vslideup.vi v8, v9, 14
; ZVZIP-ZVL2048-NEXT: ret
-=======
-; ZVZIP-WIDE-LABEL: vector_interleave8_v16i8_v2i8:
-; ZVZIP-WIDE: # %bb.0:
-; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
-; ZVZIP-WIDE-NEXT: vzip.vv v16, v11, v15
-; ZVZIP-WIDE-NEXT: vzip.vv v11, v9, v13
-; ZVZIP-WIDE-NEXT: vzip.vv v9, v10, v14
-; ZVZIP-WIDE-NEXT: vzip.vv v10, v8, v12
-; ZVZIP-WIDE-NEXT: vsetivli zero, 4, e8, mf8, ta, ma
-; ZVZIP-WIDE-NEXT: vzip.vv v12, v11, v16
-; ZVZIP-WIDE-NEXT: vzip.vv v11, v10, v9
-; ZVZIP-WIDE-NEXT: vsetivli zero, 8, e8, mf8, ta, ma
-; ZVZIP-WIDE-NEXT: vzip.vv v8, v11, v12
-; ZVZIP-WIDE-NEXT: vslidedown.vi v9, v8, 8
-; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
-; ZVZIP-WIDE-NEXT: vslidedown.vi v10, v9, 2
-; ZVZIP-WIDE-NEXT: vslidedown.vi v11, v9, 4
-; ZVZIP-WIDE-NEXT: vsetivli zero, 12, e8, mf8, tu, ma
-; ZVZIP-WIDE-NEXT: vslideup.vi v8, v10, 10
-; ZVZIP-WIDE-NEXT: vsetivli zero, 14, e8, mf8, tu, ma
-; ZVZIP-WIDE-NEXT: vslideup.vi v8, v11, 12
-; ZVZIP-WIDE-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
-; ZVZIP-WIDE-NEXT: vslidedown.vi v9, v9, 6
-; ZVZIP-WIDE-NEXT: vsetivli zero, 16, e8, mf8, ta, ma
-; ZVZIP-WIDE-NEXT: vslideup.vi v8, v9, 14
-; ZVZIP-WIDE-NEXT: ret
->>>>>>> c3762a810ef6 (fixup! Rebase)
%res = call <16 x i8> @llvm.vector.interleave8.v16i8(<2 x i8> %a, <2 x i8> %b, <2 x i8> %c, <2 x i8> %d, <2 x i8> %e, <2 x i8> %f, <2 x i8> %g, <2 x i8> %h)
ret <16 x i8> %res
}
diff --git a/llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll b/llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
index e1ae4595f363e..8493eca74d81b 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
@@ -58,7 +58,9 @@ define <vscale x 32 x i1> @vector_interleave_nxv32i1_nxv16i1(<vscale x 16 x i1>
; ZVZIP-NEXT: vmerge.vim v12, v10, 1, v0
; ZVZIP-NEXT: vmv1r.v v0, v9
; ZVZIP-NEXT: vmerge.vim v14, v10, 1, v0
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vmsne.vi v12, v10, 0
; ZVZIP-NEXT: vmsne.vi v0, v8, 0
; ZVZIP-NEXT: csrr a0, vlenb
@@ -92,7 +94,7 @@ define <vscale x 32 x i8> @vector_interleave_nxv32i8_nxv16i8(<vscale x 16 x i8>
;
; ZVZIP-LABEL: vector_interleave_nxv32i8_nxv16i8:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vmv2r.v v12, v10
; ZVZIP-NEXT: vmv2r.v v14, v8
; ZVZIP-NEXT: vzip.vv v8, v14, v12
@@ -123,7 +125,7 @@ define <vscale x 16 x i16> @vector_interleave_nxv16i16_nxv8i16(<vscale x 8 x i16
;
; ZVZIP-LABEL: vector_interleave_nxv16i16_nxv8i16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vmv2r.v v12, v10
; ZVZIP-NEXT: vmv2r.v v14, v8
; ZVZIP-NEXT: vzip.vv v8, v14, v12
@@ -155,7 +157,7 @@ define <vscale x 8 x i32> @vector_interleave_nxv8i32_nxv4i32(<vscale x 4 x i32>
;
; ZVZIP-LABEL: vector_interleave_nxv8i32_nxv4i32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vmv2r.v v12, v10
; ZVZIP-NEXT: vmv2r.v v14, v8
; ZVZIP-NEXT: vzip.vv v8, v14, v12
@@ -197,7 +199,7 @@ define <vscale x 4 x i64> @vector_interleave_nxv4i64_nxv2i64(<vscale x 2 x i64>
;
; ZVZIP-LABEL: vector_interleave_nxv4i64_nxv2i64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vmv2r.v v12, v10
; ZVZIP-NEXT: vmv2r.v v14, v8
; ZVZIP-NEXT: vzip.vv v8, v14, v12
@@ -258,13 +260,9 @@ define <vscale x 128 x i1> @vector_interleave_nxv128i1_nxv64i1(<vscale x 64 x i1
; ZVZIP-NEXT: vmerge.vim v16, v24, 1, v0
; ZVZIP-NEXT: vmv1r.v v0, v9
; ZVZIP-NEXT: vmerge.vim v8, v24, 1, v0
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vmsne.vi v0, v24, 0
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v12, v20
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vmsne.vi v8, v24, 0
; ZVZIP-NEXT: ret
%res = call <vscale x 128 x i1> @llvm.vector.interleave2.nxv128i1(<vscale x 64 x i1> %a, <vscale x 64 x i1> %b)
@@ -297,11 +295,11 @@ define <vscale x 128 x i8> @vector_interleave_nxv128i8_nxv64i8(<vscale x 64 x i8
;
; ZVZIP-LABEL: vector_interleave_nxv128i8_nxv64i8:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: vzip.vv v0, v12, v20
-; ZVZIP-NEXT: vmv8r.v v8, v24
-; ZVZIP-NEXT: vmv8r.v v16, v0
+; ZVZIP-NEXT: vmv.v.v v8, v24
+; ZVZIP-NEXT: vmv.v.v v16, v0
; ZVZIP-NEXT: ret
%res = call <vscale x 128 x i8> @llvm.vector.interleave2.nxv128i8(<vscale x 64 x i8> %a, <vscale x 64 x i8> %b)
ret <vscale x 128 x i8> %res
@@ -333,11 +331,11 @@ define <vscale x 64 x i16> @vector_interleave_nxv64i16_nxv32i16(<vscale x 32 x i
;
; ZVZIP-LABEL: vector_interleave_nxv64i16_nxv32i16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: vzip.vv v0, v12, v20
-; ZVZIP-NEXT: vmv8r.v v8, v24
-; ZVZIP-NEXT: vmv8r.v v16, v0
+; ZVZIP-NEXT: vmv.v.v v8, v24
+; ZVZIP-NEXT: vmv.v.v v16, v0
; ZVZIP-NEXT: ret
%res = call <vscale x 64 x i16> @llvm.vector.interleave2.nxv64i16(<vscale x 32 x i16> %a, <vscale x 32 x i16> %b)
ret <vscale x 64 x i16> %res
@@ -370,11 +368,11 @@ define <vscale x 32 x i32> @vector_interleave_nxv32i32_nxv16i32(<vscale x 16 x i
;
; ZVZIP-LABEL: vector_interleave_nxv32i32_nxv16i32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: vzip.vv v0, v12, v20
-; ZVZIP-NEXT: vmv8r.v v8, v24
-; ZVZIP-NEXT: vmv8r.v v16, v0
+; ZVZIP-NEXT: vmv.v.v v8, v24
+; ZVZIP-NEXT: vmv.v.v v16, v0
; ZVZIP-NEXT: ret
%res = call <vscale x 32 x i32> @llvm.vector.interleave2.nxv32i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b)
ret <vscale x 32 x i32> %res
@@ -425,11 +423,11 @@ define <vscale x 16 x i64> @vector_interleave_nxv16i64_nxv8i64(<vscale x 8 x i64
;
; ZVZIP-LABEL: vector_interleave_nxv16i64_nxv8i64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: vzip.vv v0, v12, v20
-; ZVZIP-NEXT: vmv8r.v v8, v24
-; ZVZIP-NEXT: vmv8r.v v16, v0
+; ZVZIP-NEXT: vmv.v.v v8, v24
+; ZVZIP-NEXT: vmv.v.v v16, v0
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x i64> @llvm.vector.interleave2.nxv16i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b)
ret <vscale x 16 x i64> %res
@@ -871,7 +869,9 @@ define <vscale x 64 x i1> @vector_interleave_nxv64i1_nxv16i1(<vscale x 16 x i1>
; ZVZIP-NEXT: vmerge.vim v16, v20, 1, v0
; ZVZIP-NEXT: vmv1r.v v0, v8
; ZVZIP-NEXT: vmerge.vim v18, v20, 1, v0
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v18, v16
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vmsne.vi v8, v14, 0
; ZVZIP-NEXT: vmsne.vi v0, v12, 0
; ZVZIP-NEXT: csrr a0, vlenb
@@ -886,14 +886,18 @@ define <vscale x 64 x i1> @vector_interleave_nxv64i1_nxv16i1(<vscale x 16 x i1>
; ZVZIP-NEXT: vmerge.vim v22, v20, 1, v0
; ZVZIP-NEXT: vmv1r.v v0, v11
; ZVZIP-NEXT: vmerge.vim v20, v20, 1, v0
+; ZVZIP-NEXT: vsetvli a2, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v22
+; ZVZIP-NEXT: vsetvli a2, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vmsne.vi v20, v10, 0
; ZVZIP-NEXT: vmsne.vi v0, v8, 0
; ZVZIP-NEXT: vsetvli a2, zero, e8, mf2, ta, ma
; ZVZIP-NEXT: vslideup.vx v0, v20, a1
; ZVZIP-NEXT: vsetvli a1, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vmerge.vim v20, v12, 1, v0
+; ZVZIP-NEXT: vsetvli a1, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
+; ZVZIP-NEXT: vsetvli a1, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vmsne.vi v16, v12, 0
; ZVZIP-NEXT: vmsne.vi v0, v8, 0
; ZVZIP-NEXT: srli a0, a0, 1
@@ -956,10 +960,10 @@ define <vscale x 64 x i8> @vector_interleave_nxv64i8_nxv16i8(<vscale x 16 x i8>
;
; ZVZIP-LABEL: vector_interleave_nxv64i8_nxv16i8:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v10, v14
; ZVZIP-NEXT: vzip.vv v20, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 64 x i8> @llvm.vector.interleave4.nxv64i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c, <vscale x 16 x i8> %d)
@@ -1015,10 +1019,10 @@ define <vscale x 32 x i8> @vector_interleave_nxv32i8_nxv8i8(<vscale x 8 x i8> %a
;
; ZVZIP-LABEL: vector_interleave_nxv32i8_nxv8i8:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v14, v8, v10
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 32 x i8> @llvm.vector.interleave4.nxv32i8(<vscale x 8 x i8> %a, <vscale x 8 x i8> %b, <vscale x 8 x i8> %c, <vscale x 8 x i8> %d)
@@ -1077,10 +1081,10 @@ define <vscale x 16 x i32> @vector_interleave_nxv16i32_nxv4i32(<vscale x 4 x i32
;
; ZVZIP-LABEL: vector_interleave_nxv16i32_nxv4i32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v10, v14
; ZVZIP-NEXT: vzip.vv v20, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x i32> @llvm.vector.interleave4.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c, <vscale x 4 x i32> %d)
@@ -1139,10 +1143,10 @@ define <vscale x 8 x i64> @vector_interleave_nxv8i64_nxv2i64(<vscale x 2 x i64>
;
; ZVZIP-LABEL: vector_interleave_nxv8i64_nxv2i64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v10, v14
; ZVZIP-NEXT: vzip.vv v20, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 8 x i64> @llvm.vector.interleave4.nxv8i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i64> %c, <vscale x 2 x i64> %d)
@@ -5727,7 +5731,9 @@ define <vscale x 128 x i1> @vector_interleave_nxv128i1_nxv16i1(<vscale x 16 x i1
; ZVZIP-NEXT: vmerge.vim v20, v2, 1, v0
; ZVZIP-NEXT: vmv1r.v v0, v10
; ZVZIP-NEXT: vmerge.vim v22, v2, 1, v0
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v22, v20
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vmsne.vi v10, v18, 0
; ZVZIP-NEXT: vmsne.vi v0, v16, 0
; ZVZIP-NEXT: csrr a1, vlenb
@@ -5742,14 +5748,18 @@ define <vscale x 128 x i1> @vector_interleave_nxv128i1_nxv16i1(<vscale x 16 x i1
; ZVZIP-NEXT: vmerge.vim v24, v2, 1, v0
; ZVZIP-NEXT: vmv1r.v v0, v14
; ZVZIP-NEXT: vmerge.vim v14, v2, 1, v0
+; ZVZIP-NEXT: vsetvli a2, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v20, v14, v24
+; ZVZIP-NEXT: vsetvli a2, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vmsne.vi v10, v22, 0
; ZVZIP-NEXT: vmsne.vi v0, v20, 0
; ZVZIP-NEXT: vsetvli a2, zero, e8, mf2, ta, ma
; ZVZIP-NEXT: vslideup.vx v0, v10, a0
; ZVZIP-NEXT: vsetvli a2, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vmerge.vim v20, v4, 1, v0
+; ZVZIP-NEXT: vsetvli a2, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v20, v16
+; ZVZIP-NEXT: vsetvli a2, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vmsne.vi v10, v28, 0
; ZVZIP-NEXT: vmsne.vi v0, v24, 0
; ZVZIP-NEXT: srli a1, a1, 1
@@ -5763,7 +5773,9 @@ define <vscale x 128 x i1> @vector_interleave_nxv128i1_nxv16i1(<vscale x 16 x i1
; ZVZIP-NEXT: vmerge.vim v16, v2, 1, v0
; ZVZIP-NEXT: vmv1r.v v0, v9
; ZVZIP-NEXT: vmerge.vim v18, v2, 1, v0
+; ZVZIP-NEXT: vsetvli a2, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v18, v16
+; ZVZIP-NEXT: vsetvli a2, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vmsne.vi v9, v14, 0
; ZVZIP-NEXT: vmsne.vi v0, v12, 0
; ZVZIP-NEXT: vsetvli a2, zero, e8, mf2, ta, ma
@@ -5775,14 +5787,18 @@ define <vscale x 128 x i1> @vector_interleave_nxv128i1_nxv16i1(<vscale x 16 x i1
; ZVZIP-NEXT: vmerge.vim v12, v2, 1, v0
; ZVZIP-NEXT: vmv1r.v v0, v8
; ZVZIP-NEXT: vmerge.vim v14, v2, 1, v0
+; ZVZIP-NEXT: vsetvli a2, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
+; ZVZIP-NEXT: vsetvli a2, zero, e8, m2, ta, ma
; ZVZIP-NEXT: vmsne.vi v12, v10, 0
; ZVZIP-NEXT: vmsne.vi v0, v8, 0
; ZVZIP-NEXT: vsetvli a2, zero, e8, mf2, ta, ma
; ZVZIP-NEXT: vslideup.vx v0, v12, a0
; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vmerge.vim v20, v4, 1, v0
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vmsne.vi v16, v12, 0
; ZVZIP-NEXT: vmsne.vi v0, v8, 0
; ZVZIP-NEXT: vsetvli a0, zero, e8, m1, ta, ma
@@ -5790,13 +5806,9 @@ define <vscale x 128 x i1> @vector_interleave_nxv128i1_nxv16i1(<vscale x 16 x i1
; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vmv.v.i v8, 0
; ZVZIP-NEXT: vmerge.vim v8, v8, 1, v0
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v8, v24
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vmsne.vi v0, v16, 0
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v12, v28
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vmsne.vi v8, v16, 0
; ZVZIP-NEXT: ret
%res = call <vscale x 128 x i1> @llvm.vector.interleave8.nxv128i1(<vscale x 16 x i1> %a, <vscale x 16 x i1> %b, <vscale x 16 x i1> %c, <vscale x 16 x i1> %d, <vscale x 16 x i1> %e, <vscale x 16 x i1> %f, <vscale x 16 x i1> %g, <vscale x 16 x i1> %h)
@@ -5942,17 +5954,17 @@ define <vscale x 128 x i8> @vector_interleave_nxv128i8_nxv16i8(<vscale x 16 x i8
;
; ZVZIP-LABEL: vector_interleave_nxv128i8_nxv16i8:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vmv2r.v v24, v22
; ZVZIP-NEXT: vmv2r.v v22, v8
; ZVZIP-NEXT: vzip.vv v4, v14, v24
; ZVZIP-NEXT: vzip.vv v0, v10, v18
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v0, v4
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v12, v20
; ZVZIP-NEXT: vzip.vv v12, v22, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e8, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v12, v8
; ZVZIP-NEXT: vzip.vv v8, v0, v24
; ZVZIP-NEXT: vzip.vv v16, v4, v28
@@ -6100,17 +6112,17 @@ define <vscale x 64 x i16> @vector_interleave_nxv64i16_nxv8i16(<vscale x 8 x i16
;
; ZVZIP-LABEL: vector_interleave_nxv64i16_nxv8i16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vmv2r.v v24, v22
; ZVZIP-NEXT: vmv2r.v v22, v8
; ZVZIP-NEXT: vzip.vv v4, v14, v24
; ZVZIP-NEXT: vzip.vv v0, v10, v18
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v0, v4
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v12, v20
; ZVZIP-NEXT: vzip.vv v12, v22, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v12, v8
; ZVZIP-NEXT: vzip.vv v8, v0, v24
; ZVZIP-NEXT: vzip.vv v16, v4, v28
@@ -6258,17 +6270,17 @@ define <vscale x 32 x i32> @vector_interleave_nxv32i32_nxv4i32(<vscale x 4 x i32
;
; ZVZIP-LABEL: vector_interleave_nxv32i32_nxv4i32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vmv2r.v v24, v22
; ZVZIP-NEXT: vmv2r.v v22, v8
; ZVZIP-NEXT: vzip.vv v4, v14, v24
; ZVZIP-NEXT: vzip.vv v0, v10, v18
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v0, v4
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v12, v20
; ZVZIP-NEXT: vzip.vv v12, v22, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v12, v8
; ZVZIP-NEXT: vzip.vv v8, v0, v24
; ZVZIP-NEXT: vzip.vv v16, v4, v28
@@ -6415,17 +6427,17 @@ define <vscale x 16 x i64> @vector_interleave_nxv16i64_nxv2i64(<vscale x 2 x i64
;
; ZVZIP-LABEL: vector_interleave_nxv16i64_nxv2i64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vmv2r.v v24, v22
; ZVZIP-NEXT: vmv2r.v v22, v8
; ZVZIP-NEXT: vzip.vv v4, v14, v24
; ZVZIP-NEXT: vzip.vv v0, v10, v18
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v0, v4
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v12, v20
; ZVZIP-NEXT: vzip.vv v12, v22, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v12, v8
; ZVZIP-NEXT: vzip.vv v8, v0, v24
; ZVZIP-NEXT: vzip.vv v16, v4, v28
@@ -6466,9 +6478,9 @@ define <vscale x 4 x bfloat> @vector_interleave_nxv4bf16_nxv2bf16(<vscale x 2 x
;
; ZVZIP-LABEL: vector_interleave_nxv4bf16_nxv2bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v10, v8, v9
-; ZVZIP-NEXT: vmv1r.v v8, v10
+; ZVZIP-NEXT: vmv.v.v v8, v10
; ZVZIP-NEXT: ret
%res = call <vscale x 4 x bfloat> @llvm.vector.interleave2.nxv4bf16(<vscale x 2 x bfloat> %a, <vscale x 2 x bfloat> %b)
ret <vscale x 4 x bfloat> %res
@@ -6496,7 +6508,7 @@ define <vscale x 8 x bfloat> @vector_interleave_nxv8bf16_nxv4bf16(<vscale x 4 x
;
; ZVZIP-LABEL: vector_interleave_nxv8bf16_nxv4bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vmv1r.v v10, v9
; ZVZIP-NEXT: vmv1r.v v11, v8
; ZVZIP-NEXT: vzip.vv v8, v11, v10
@@ -6535,9 +6547,9 @@ define <vscale x 4 x half> @vector_interleave_nxv4f16_nxv2f16(<vscale x 2 x half
;
; ZVZIP-LABEL: vector_interleave_nxv4f16_nxv2f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v10, v8, v9
-; ZVZIP-NEXT: vmv1r.v v8, v10
+; ZVZIP-NEXT: vmv.v.v v8, v10
; ZVZIP-NEXT: ret
%res = call <vscale x 4 x half> @llvm.vector.interleave2.nxv4f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b)
ret <vscale x 4 x half> %res
@@ -6565,7 +6577,7 @@ define <vscale x 8 x half> @vector_interleave_nxv8f16_nxv4f16(<vscale x 4 x half
;
; ZVZIP-LABEL: vector_interleave_nxv8f16_nxv4f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vmv1r.v v10, v9
; ZVZIP-NEXT: vmv1r.v v11, v8
; ZVZIP-NEXT: vzip.vv v8, v11, v10
@@ -6597,7 +6609,7 @@ define <vscale x 4 x float> @vector_interleave_nxv4f32_nxv2f32(<vscale x 2 x flo
;
; ZVZIP-LABEL: vector_interleave_nxv4f32_nxv2f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vmv1r.v v10, v9
; ZVZIP-NEXT: vmv1r.v v11, v8
; ZVZIP-NEXT: vzip.vv v8, v11, v10
@@ -6628,7 +6640,7 @@ define <vscale x 16 x bfloat> @vector_interleave_nxv16bf16_nxv8bf16(<vscale x 8
;
; ZVZIP-LABEL: vector_interleave_nxv16bf16_nxv8bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vmv2r.v v12, v10
; ZVZIP-NEXT: vmv2r.v v14, v8
; ZVZIP-NEXT: vzip.vv v8, v14, v12
@@ -6659,7 +6671,7 @@ define <vscale x 16 x half> @vector_interleave_nxv16f16_nxv8f16(<vscale x 8 x ha
;
; ZVZIP-LABEL: vector_interleave_nxv16f16_nxv8f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vmv2r.v v12, v10
; ZVZIP-NEXT: vmv2r.v v14, v8
; ZVZIP-NEXT: vzip.vv v8, v14, v12
@@ -6691,7 +6703,7 @@ define <vscale x 8 x float> @vector_interleave_nxv8f32_nxv4f32(<vscale x 4 x flo
;
; ZVZIP-LABEL: vector_interleave_nxv8f32_nxv4f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vmv2r.v v12, v10
; ZVZIP-NEXT: vmv2r.v v14, v8
; ZVZIP-NEXT: vzip.vv v8, v14, v12
@@ -6733,7 +6745,7 @@ define <vscale x 4 x double> @vector_interleave_nxv4f64_nxv2f64(<vscale x 2 x do
;
; ZVZIP-LABEL: vector_interleave_nxv4f64_nxv2f64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vmv2r.v v12, v10
; ZVZIP-NEXT: vmv2r.v v14, v8
; ZVZIP-NEXT: vzip.vv v8, v14, v12
@@ -6770,11 +6782,11 @@ define <vscale x 64 x bfloat> @vector_interleave_nxv64bf16_nxv32bf16(<vscale x 3
;
; ZVZIP-LABEL: vector_interleave_nxv64bf16_nxv32bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: vzip.vv v0, v12, v20
-; ZVZIP-NEXT: vmv8r.v v8, v24
-; ZVZIP-NEXT: vmv8r.v v16, v0
+; ZVZIP-NEXT: vmv.v.v v8, v24
+; ZVZIP-NEXT: vmv.v.v v16, v0
; ZVZIP-NEXT: ret
%res = call <vscale x 64 x bfloat> @llvm.vector.interleave2.nxv64bf16(<vscale x 32 x bfloat> %a, <vscale x 32 x bfloat> %b)
ret <vscale x 64 x bfloat> %res
@@ -6806,11 +6818,11 @@ define <vscale x 64 x half> @vector_interleave_nxv64f16_nxv32f16(<vscale x 32 x
;
; ZVZIP-LABEL: vector_interleave_nxv64f16_nxv32f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: vzip.vv v0, v12, v20
-; ZVZIP-NEXT: vmv8r.v v8, v24
-; ZVZIP-NEXT: vmv8r.v v16, v0
+; ZVZIP-NEXT: vmv.v.v v8, v24
+; ZVZIP-NEXT: vmv.v.v v16, v0
; ZVZIP-NEXT: ret
%res = call <vscale x 64 x half> @llvm.vector.interleave2.nxv64f16(<vscale x 32 x half> %a, <vscale x 32 x half> %b)
ret <vscale x 64 x half> %res
@@ -6843,11 +6855,11 @@ define <vscale x 32 x float> @vector_interleave_nxv32f32_nxv16f32(<vscale x 16 x
;
; ZVZIP-LABEL: vector_interleave_nxv32f32_nxv16f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: vzip.vv v0, v12, v20
-; ZVZIP-NEXT: vmv8r.v v8, v24
-; ZVZIP-NEXT: vmv8r.v v16, v0
+; ZVZIP-NEXT: vmv.v.v v8, v24
+; ZVZIP-NEXT: vmv.v.v v16, v0
; ZVZIP-NEXT: ret
%res = call <vscale x 32 x float> @llvm.vector.interleave2.nxv32f32(<vscale x 16 x float> %a, <vscale x 16 x float> %b)
ret <vscale x 32 x float> %res
@@ -6898,11 +6910,11 @@ define <vscale x 16 x double> @vector_interleave_nxv16f64_nxv8f64(<vscale x 8 x
;
; ZVZIP-LABEL: vector_interleave_nxv16f64_nxv8f64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v8, v16
; ZVZIP-NEXT: vzip.vv v0, v12, v20
-; ZVZIP-NEXT: vmv8r.v v8, v24
-; ZVZIP-NEXT: vmv8r.v v16, v0
+; ZVZIP-NEXT: vmv.v.v v8, v24
+; ZVZIP-NEXT: vmv.v.v v16, v0
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x double> @llvm.vector.interleave2.nxv16f64(<vscale x 8 x double> %a, <vscale x 8 x double> %b)
ret <vscale x 16 x double> %res
@@ -7547,10 +7559,10 @@ define <vscale x 8 x half> @vector_interleave_nxv8f16_nxv2f16(<vscale x 2 x half
;
; ZVZIP-LABEL: vector_interleave_nxv8f16_nxv2f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v11, v8, v10
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v11, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 8 x half> @llvm.vector.interleave4.nxv8f16(<vscale x 2 x half> %v0, <vscale x 2 x half> %v1, <vscale x 2 x half> %v2, <vscale x 2 x half> %v3)
@@ -7606,10 +7618,10 @@ define <vscale x 16 x half> @vector_interleave_nxv16f16_nxv4f16(<vscale x 4 x ha
;
; ZVZIP-LABEL: vector_interleave_nxv16f16_nxv4f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v14, v8, v10
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x half> @llvm.vector.interleave4.nxv16f16(<vscale x 4 x half> %v0, <vscale x 4 x half> %v1, <vscale x 4 x half> %v2, <vscale x 4 x half> %v3)
@@ -7667,10 +7679,10 @@ define <vscale x 32 x half> @vector_interleave_nxv32f16_nxv8f16(<vscale x 8 x ha
;
; ZVZIP-LABEL: vector_interleave_nxv32f16_nxv8f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v10, v14
; ZVZIP-NEXT: vzip.vv v20, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 32 x half> @llvm.vector.interleave4.nxv32f16(<vscale x 8 x half> %v0, <vscale x 8 x half> %v1, <vscale x 8 x half> %v2, <vscale x 8 x half> %v3)
@@ -7740,10 +7752,10 @@ define <vscale x 8 x bfloat> @vector_interleave_nxv8bf16_nxv2bf16(<vscale x 2 x
;
; ZVZIP-LABEL: vector_interleave_nxv8bf16_nxv2bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v11, v8, v10
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v11, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 8 x bfloat> @llvm.vector.interleave4.nxv8bf16(<vscale x 2 x bfloat> %v0, <vscale x 2 x bfloat> %v1, <vscale x 2 x bfloat> %v2, <vscale x 2 x bfloat> %v3)
@@ -7799,10 +7811,10 @@ define <vscale x 16 x bfloat> @vector_interleave_nxv16bf16_nxv4bf16(<vscale x 4
;
; ZVZIP-LABEL: vector_interleave_nxv16bf16_nxv4bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v14, v8, v10
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x bfloat> @llvm.vector.interleave4.nxv16bf16(<vscale x 4 x bfloat> %v0, <vscale x 4 x bfloat> %v1, <vscale x 4 x bfloat> %v2, <vscale x 4 x bfloat> %v3)
@@ -7860,10 +7872,10 @@ define <vscale x 32 x bfloat> @vector_interleave_nxv32bf16_nxv8bf16(<vscale x 8
;
; ZVZIP-LABEL: vector_interleave_nxv32bf16_nxv8bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v10, v14
; ZVZIP-NEXT: vzip.vv v20, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 32 x bfloat> @llvm.vector.interleave4.nxv32bf16(<vscale x 8 x bfloat> %v0, <vscale x 8 x bfloat> %v1, <vscale x 8 x bfloat> %v2, <vscale x 8 x bfloat> %v3)
@@ -7933,10 +7945,10 @@ define <vscale x 4 x float> @vector_interleave_nxv4f32_nxv1f32(<vscale x 1 x flo
;
; ZVZIP-LABEL: vector_interleave_nxv4f32_nxv1f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v11, v8, v10
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v11, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 4 x float> @llvm.vector.interleave4.nxv4f32(<vscale x 1 x float> %v0, <vscale x 1 x float> %v1, <vscale x 1 x float> %v2, <vscale x 1 x float> %v3)
@@ -7992,10 +8004,10 @@ define <vscale x 8 x float> @vector_interleave_nxv8f32_nxv2f32(<vscale x 2 x flo
;
; ZVZIP-LABEL: vector_interleave_nxv8f32_nxv2f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v14, v8, v10
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 8 x float> @llvm.vector.interleave4.nxv8f32(<vscale x 2 x float> %v0, <vscale x 2 x float> %v1, <vscale x 2 x float> %v2, <vscale x 2 x float> %v3)
@@ -8053,10 +8065,10 @@ define <vscale x 16 x float> @vector_interleave_nxv16f32_nxv4f32(<vscale x 4 x f
;
; ZVZIP-LABEL: vector_interleave_nxv16f32_nxv4f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v10, v14
; ZVZIP-NEXT: vzip.vv v20, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x float> @llvm.vector.interleave4.nxv16f32(<vscale x 4 x float> %v0, <vscale x 4 x float> %v1, <vscale x 4 x float> %v2, <vscale x 4 x float> %v3)
@@ -8112,10 +8124,10 @@ define <vscale x 4 x double> @vector_interleave_nxv4f64_nxv1f64(<vscale x 1 x do
;
; ZVZIP-LABEL: vector_interleave_nxv4f64_nxv1f64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v9, v11
; ZVZIP-NEXT: vzip.vv v14, v8, v10
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 4 x double> @llvm.vector.interleave4.nxv4f64(<vscale x 1 x double> %v0, <vscale x 1 x double> %v1, <vscale x 1 x double> %v2, <vscale x 1 x double> %v3)
@@ -8173,10 +8185,10 @@ define <vscale x 8 x double> @vector_interleave_nxv8f64_nxv2f64(<vscale x 2 x do
;
; ZVZIP-LABEL: vector_interleave_nxv8f64_nxv2f64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v10, v14
; ZVZIP-NEXT: vzip.vv v20, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 8 x double> @llvm.vector.interleave4.nxv6f64(<vscale x 2 x double> %v0, <vscale x 2 x double> %v1, <vscale x 2 x double> %v2, <vscale x 2 x double> %v3)
@@ -14140,15 +14152,15 @@ define <vscale x 16 x half> @vector_interleave_nxv16f16_nxv2f16(<vscale x 2 x ha
;
; ZVZIP-LABEL: vector_interleave_nxv16f16_nxv2f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v11, v15
; ZVZIP-NEXT: vzip.vv v11, v9, v13
; ZVZIP-NEXT: vzip.vv v9, v10, v14
; ZVZIP-NEXT: vzip.vv v10, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v11, v16
; ZVZIP-NEXT: vzip.vv v14, v10, v9
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x half> @llvm.vector.interleave8.nxv16f16(<vscale x 2 x half> %v0, <vscale x 2 x half> %v1, <vscale x 2 x half> %v2, <vscale x 2 x half> %v3, <vscale x 2 x half> %v4, <vscale x 2 x half> %v5, <vscale x 2 x half> %v6, <vscale x 2 x half> %v7)
@@ -14220,17 +14232,17 @@ define <vscale x 32 x half> @vector_interleave_nxv32f16_nxv4f16(<vscale x 4 x ha
;
; ZVZIP-LABEL: vector_interleave_nxv32f16_nxv4f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v20, v11, v15
; ZVZIP-NEXT: vzip.vv v22, v9, v13
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v22, v20
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v10, v14
; ZVZIP-NEXT: vzip.vv v10, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
-; ZVZIP-NEXT: vzip.vv v20, v10, v24
; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v20, v10, v24
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 32 x half> @llvm.vector.interleave8.nxv32f16(<vscale x 4 x half> %v0, <vscale x 4 x half> %v1, <vscale x 4 x half> %v2, <vscale x 4 x half> %v3, <vscale x 4 x half> %v4, <vscale x 4 x half> %v5, <vscale x 4 x half> %v6, <vscale x 4 x half> %v7)
@@ -14374,17 +14386,17 @@ define <vscale x 64 x half> @vector_interleave_nxv64f16_nxv8f16(<vscale x 8 x ha
;
; ZVZIP-LABEL: vector_interleave_nxv64f16_nxv8f16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vmv2r.v v24, v22
; ZVZIP-NEXT: vmv2r.v v22, v8
; ZVZIP-NEXT: vzip.vv v4, v14, v24
; ZVZIP-NEXT: vzip.vv v0, v10, v18
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v0, v4
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v12, v20
; ZVZIP-NEXT: vzip.vv v12, v22, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v12, v8
; ZVZIP-NEXT: vzip.vv v8, v0, v24
; ZVZIP-NEXT: vzip.vv v16, v4, v28
@@ -14484,15 +14496,15 @@ define <vscale x 16 x bfloat> @vector_interleave_nxv16bf16_nxv2bf16(<vscale x 2
;
; ZVZIP-LABEL: vector_interleave_nxv16bf16_nxv2bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v11, v15
; ZVZIP-NEXT: vzip.vv v11, v9, v13
; ZVZIP-NEXT: vzip.vv v9, v10, v14
; ZVZIP-NEXT: vzip.vv v10, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v11, v16
; ZVZIP-NEXT: vzip.vv v14, v10, v9
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x bfloat> @llvm.vector.interleave8.nxv16bf16(<vscale x 2 x bfloat> %v0, <vscale x 2 x bfloat> %v1, <vscale x 2 x bfloat> %v2, <vscale x 2 x bfloat> %v3, <vscale x 2 x bfloat> %v4, <vscale x 2 x bfloat> %v5, <vscale x 2 x bfloat> %v6, <vscale x 2 x bfloat> %v7)
@@ -14564,17 +14576,17 @@ define <vscale x 32 x bfloat> @vector_interleave_nxv32bf16_nxv4bf16(<vscale x 4
;
; ZVZIP-LABEL: vector_interleave_nxv32bf16_nxv4bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v20, v11, v15
; ZVZIP-NEXT: vzip.vv v22, v9, v13
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v22, v20
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v10, v14
; ZVZIP-NEXT: vzip.vv v10, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
-; ZVZIP-NEXT: vzip.vv v20, v10, v24
; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v20, v10, v24
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 32 x bfloat> @llvm.vector.interleave8.nxv32bf16(<vscale x 4 x bfloat> %v0, <vscale x 4 x bfloat> %v1, <vscale x 4 x bfloat> %v2, <vscale x 4 x bfloat> %v3, <vscale x 4 x bfloat> %v4, <vscale x 4 x bfloat> %v5, <vscale x 4 x bfloat> %v6, <vscale x 4 x bfloat> %v7)
@@ -14718,17 +14730,17 @@ define <vscale x 64 x bfloat> @vector_interleave_nxv64bf16_nxv8bf16(<vscale x 8
;
; ZVZIP-LABEL: vector_interleave_nxv64bf16_nxv8bf16:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vmv2r.v v24, v22
; ZVZIP-NEXT: vmv2r.v v22, v8
; ZVZIP-NEXT: vzip.vv v4, v14, v24
; ZVZIP-NEXT: vzip.vv v0, v10, v18
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v0, v4
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v12, v20
; ZVZIP-NEXT: vzip.vv v12, v22, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v12, v8
; ZVZIP-NEXT: vzip.vv v8, v0, v24
; ZVZIP-NEXT: vzip.vv v16, v4, v28
@@ -14828,15 +14840,15 @@ define <vscale x 8 x float> @vector_interleave_nxv8f32_nxv1f32(<vscale x 1 x flo
;
; ZVZIP-LABEL: vector_interleave_nxv8f32_nxv1f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v11, v15
; ZVZIP-NEXT: vzip.vv v11, v9, v13
; ZVZIP-NEXT: vzip.vv v9, v10, v14
; ZVZIP-NEXT: vzip.vv v10, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v12, v11, v16
; ZVZIP-NEXT: vzip.vv v14, v10, v9
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v14, v12
; ZVZIP-NEXT: ret
%res = call <vscale x 8 x float> @llvm.vector.interleave8.nxv8f32(<vscale x 1 x float> %v0, <vscale x 1 x float> %v1, <vscale x 1 x float> %v2, <vscale x 1 x float> %v3, <vscale x 1 x float> %v4, <vscale x 1 x float> %v5, <vscale x 1 x float> %v6, <vscale x 1 x float> %v8)
@@ -14908,17 +14920,17 @@ define <vscale x 16 x float> @vector_interleave_nxv16f32_nxv2f32(<vscale x 2 x f
;
; ZVZIP-LABEL: vector_interleave_nxv16f32_nxv2f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v20, v11, v15
; ZVZIP-NEXT: vzip.vv v22, v9, v13
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v22, v20
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v10, v14
; ZVZIP-NEXT: vzip.vv v10, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
-; ZVZIP-NEXT: vzip.vv v20, v10, v24
; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v20, v10, v24
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 16 x float> @llvm.vector.interleave8.nxv16f32(<vscale x 2 x float> %v0, <vscale x 2 x float> %v1, <vscale x 2 x float> %v2, <vscale x 2 x float> %v3, <vscale x 2 x float> %v4, <vscale x 2 x float> %v5, <vscale x 2 x float> %v6, <vscale x 2 x float> %v7)
@@ -15062,17 +15074,17 @@ define <vscale x 32 x float> @vector_interleave_nxv32f32_nxv4f32(<vscale x 4 x f
;
; ZVZIP-LABEL: vector_interleave_nxv32f32_nxv4f32:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vmv2r.v v24, v22
; ZVZIP-NEXT: vmv2r.v v22, v8
; ZVZIP-NEXT: vzip.vv v4, v14, v24
; ZVZIP-NEXT: vzip.vv v0, v10, v18
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v0, v4
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v12, v20
; ZVZIP-NEXT: vzip.vv v12, v22, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e32, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v12, v8
; ZVZIP-NEXT: vzip.vv v8, v0, v24
; ZVZIP-NEXT: vzip.vv v16, v4, v28
@@ -15146,17 +15158,17 @@ define <vscale x 8 x double> @vector_interleave_nxv8f64_nxv1f64(<vscale x 1 x do
;
; ZVZIP-LABEL: vector_interleave_nxv8f64_nxv1f64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v20, v11, v15
; ZVZIP-NEXT: vzip.vv v22, v9, v13
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v16, v22, v20
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m1, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v10, v14
; ZVZIP-NEXT: vzip.vv v10, v8, v12
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
-; ZVZIP-NEXT: vzip.vv v20, v10, v24
; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vzip.vv v20, v10, v24
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v20, v16
; ZVZIP-NEXT: ret
%res = call <vscale x 8 x double> @llvm.vector.interleave8.nxv8f64(<vscale x 1 x double> %v0, <vscale x 1 x double> %v1, <vscale x 1 x double> %v2, <vscale x 1 x double> %v3, <vscale x 1 x double> %v4, <vscale x 1 x double> %v5, <vscale x 1 x double> %v6, <vscale x 1 x double> %v8)
@@ -15300,17 +15312,17 @@ define <vscale x 16 x double> @vector_interleave_nxv16f64_nxv2f64(<vscale x 2 x
;
; ZVZIP-LABEL: vector_interleave_nxv16f64_nxv2f64:
; ZVZIP: # %bb.0:
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vmv2r.v v24, v22
; ZVZIP-NEXT: vmv2r.v v22, v8
; ZVZIP-NEXT: vzip.vv v4, v14, v24
; ZVZIP-NEXT: vzip.vv v0, v10, v18
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v24, v0, v4
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v12, v20
; ZVZIP-NEXT: vzip.vv v12, v22, v16
-; ZVZIP-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; ZVZIP-NEXT: vsetvli a0, zero, e64, m8, ta, ma
; ZVZIP-NEXT: vzip.vv v0, v12, v8
; ZVZIP-NEXT: vzip.vv v8, v0, v24
; ZVZIP-NEXT: vzip.vv v16, v4, v28
@@ -15370,6 +15382,7 @@ define <vscale x 4 x i16> @interleave2_diff_const_splat_nxv4i16() {
; ZVZIP-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
; ZVZIP-NEXT: vmv.v.i v9, 4
; ZVZIP-NEXT: vmv.v.i v10, 3
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v10, v9
; ZVZIP-NEXT: ret
%retval = call <vscale x 4 x i16> @llvm.vector.interleave2.v4i16(<vscale x 2 x i16> splat(i16 3), <vscale x 2 x i16> splat(i16 4))
@@ -15427,6 +15440,7 @@ define <vscale x 4 x i16> @interleave2_diff_nonconst_splat_nxv4i16(i16 %a, i16 %
; ZVZIP-NEXT: vsetvli a2, zero, e16, mf2, ta, ma
; ZVZIP-NEXT: vmv.v.x v9, a0
; ZVZIP-NEXT: vmv.v.x v10, a1
+; ZVZIP-NEXT: vsetvli a0, zero, e16, m1, ta, ma
; ZVZIP-NEXT: vzip.vv v8, v9, v10
; ZVZIP-NEXT: ret
%ins1 = insertelement <vscale x 2 x i16> poison, i16 %a, i32 0
>From efb894d3509277937992e08fab058031eea03a68 Mon Sep 17 00:00:00 2001
From: Min-Yih Hsu <min.hsu at sifive.com>
Date: Mon, 21 Sep 2026 09:50:44 -0700
Subject: [PATCH 8/8] fixup! Loosen the mask conditions
---
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 14 +++-----------
1 file changed, 3 insertions(+), 11 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 826befc50f3a3..9589d0de75f09 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -22328,17 +22328,9 @@ static SDValue performVSlideUpDownCombine(SDNode *N, SelectionDAG &DAG,
return SDValue();
}
- // Check Masks.
- auto isAllSetMask = [&](SDValue V, SDValue VL) -> bool {
- using namespace SDPatternMatch;
- SDValue VMSet;
- return sd_match(V, m_Node(RISCVISD::VMSET_VL, m_Value(VMSet))) &&
- (isVLMax(VMSet) || KnownBits::uge(DAG.computeKnownBits(VMSet),
- DAG.computeKnownBits(VL))
- .value_or(false));
- };
- if (!isAllSetMask(SlideDownMask, SlideDownVL) ||
- !isAllSetMask(SlideUpMask, SlideUpVL))
+ // Check if they are both all-ones masks.
+ if (SlideDownMask.getOpcode() != RISCVISD::VMSET_VL ||
+ SlideUpMask.getOpcode() != RISCVISD::VMSET_VL)
return SDValue();
return SlideDownVal;
More information about the llvm-commits
mailing list